100mV DC supply

Hi All,

I have a need to generate +100mV DC to drive a load which is capable of sourcing up to ~50mA but will typically see high impedance. Easily available I have a clean 24V source and 208VAC. My intent is to drop from 24V to ~1.8V using a buck converter then follow it up with a 1.0V precision shunt (ADR510 or other) followed by a 9:1 precision resistor divider. Buffer the 100mV output by a low noise single supply op-amp such as ltc1014. Although it looks like ltc1014 won't be able to source enough current so possibly followed with a BJT?

Voltage drift is more important than precision for this application and +/- 3mV should be good enough. The environment the board will reside in is ~25C +/- 5deg. The output voltage must not drift above ~130mV to prevent causing issues in the test chamber. 

The voltage across the load is buffered, low-pass filtered (2-pole active = 1kHz) and multiplied by 10x before being sampled. The low pass filter frequency is chosen to preserve rise times in the ~500uS range. 

I expect that the largest source of noise will not be from the shunt (70ppm/C), the resistor divider (25ppm/C), or the Op-Amp ~160uV but from the 5 foot run of cable to the test chamber and back and am interested in best practice shielding techniques to mitigate induced noise.  

I'm not much of an electrical designer and haven't designed anything similar to this before so I'm interested in hearing about other possible topologies that can meet the requirements or how others would approach the problem. The solution will be put onto a pcb as part of a larger circuit so i cannot use a benchtop supply. 

To summarize:

 - Vin = +24V and/or 208VAC 
 - Vout= 100mV DC +/- 2mV 
 - Iout = up to 50mA into short circuit load

Thank you,

Mark 

Marke wrote:

-----------------


> 
> I have a need to generate +100mV DC to drive a load which is capable of sourcing up to ~50mA but will typically see high impedance. Easily available I have a clean 24V source and 208VAC. My intent is to drop from 24V to ~1.8V using a buck converter then follow it up with a 1.0V precision shunt (ADR510 or other) followed by a 9:1 precision resistor divider. Buffer the 100mV output by a low noise single supply op-amp such as ltc1014. Although it looks like ltc1014 won't be able to source enough current so possibly followed with a BJT?
> 
> Voltage drift is more important than precision for this application and +/- 3mV should be good enough. The environment the board will reside in is ~25C +/- 5deg. The output voltage must not drift above ~130mV to prevent causing issues in the test chamber. 
> 
> The voltage across the load is buffered, low-pass filtered (2-pole active = 1kHz) and multiplied by 10x before being sampled. The low pass filter frequency is chosen to preserve rise times in the ~500uS range. 
> 
> I expect that the largest source of noise will not be from the shunt (70ppm/C), the resistor divider (25ppm/C), or the Op-Amp ~160uV but from the 5 foot run of cable to the test chamber and back and am interested in best practice shielding techniques to mitigate induced noise.  
> 
> I'm not much of an electrical designer and haven't designed anything similar to this before so I'm interested in hearing about other possible topologies that can meet the requirements or how others would approach the problem. The solution will be put onto a pcb as part of a larger circuit so i cannot use a benchtop supply. 
> 
> To summarize:
> 
>  - Vin = +24V and/or 208VAC 
>  - Vout= 100mV DC +/- 2mV 
>  - Iout = up to 50mA into short circuit load
> 
> Thank you,
> 
>

** Using the KISS principle, all you need is a 5V, 1Amp TO220 reg IC and 3 resistors. The resistors are 120ohm, 82ohm and 1ohm - all 1% types.

The 120ohm & 82ohm go in parallel to make 48.7ohms, then 1ohm in series across 5V.

This makes a 1:49.7 divider so you get 100mV with a 1 ohm source impedance and  a SCC of 100mA. 

A small cap is also needed across the output of the reg IC for stability. 



....  Phil 

On Thursday, July 13, 2017 at 9:32:23 AM UTC+2, Marke wrote:
> Hi All,
> 
> I have a need to generate +100mV DC to drive a load which is capable of sourcing up to ~50mA but will typically see high impedance. Easily available I have a clean 24V source and 208VAC. My intent is to drop from 24V to ~1.8V using a buck converter then follow it up with a 1.0V precision shunt (ADR510 or other) followed by a 9:1 precision resistor divider. Buffer the 100mV output by a low noise single supply op-amp such as ltc1014. Although it looks like ltc1014 won't be able to source enough current so possibly followed with a BJT?
> 
> Voltage drift is more important than precision for this application and +/- 3mV should be good enough. The environment the board will reside in is ~25C +/- 5deg. The output voltage must not drift above ~130mV to prevent causing issues in the test chamber. 
> 
> The voltage across the load is buffered, low-pass filtered (2-pole active = 1kHz) and multiplied by 10x before being sampled. The low pass filter frequency is chosen to preserve rise times in the ~500uS range. 
> 
> I expect that the largest source of noise will not be from the shunt (70ppm/C), the resistor divider (25ppm/C), or the Op-Amp ~160uV but from the 5 foot run of cable to the test chamber and back and am interested in best practice shielding techniques to mitigate induced noise.  
> 
> I'm not much of an electrical designer and haven't designed anything similar to this before so I'm interested in hearing about other possible topologies that can meet the requirements or how others would approach the problem. The solution will be put onto a pcb as part of a larger circuit so i cannot use a benchtop supply. 
> 
> To summarize:
> 
>  - Vin = +24V and/or 208VAC 
>  - Vout= 100mV DC +/- 2mV 
>  - Iout = up to 50mA into short circuit load

The LM10 give you a 200mV reference voltage output which you could divde to exactly 100mV with 25-turn trim-pot. The op-amp part of the device could then buffer that voltage. You might have to load the output with a resistor ground, but the data sheet spells it all out.

http://uk.farnell.com/w/c/semiconductors-ics/amplifiers-comparators/operational-amplifiers-op-amps?brand=texas-instruments&st=LM10

http://www.ti.com/lit/ds/symlink/lm10.pdf

-- 
Bill Sloman, Sydney

On Thursday, July 13, 2017 at 12:32:23 AM UTC-7, Marke wrote:

> I have a need to generate +100mV DC to drive a load which is capable of sourcing up to ~50mA ...intent is to drop from 24V to ~1.8V using a buck converter

Yep, that's good for power efficiency.   At 50 mA, that 1.8V won't take more than a tenth watt,
though; what kind of buck converter is really designed for such a low load?  There's probably
other low voltage requirements you can combine


>  - Vin = +24V and/or 208VAC 
>  - Vout= 100mV DC +/- 2mV 
>  - Iout = up to 50mA into short circuit load

For 2 mV, your reference voltage requirement is a problem.
A good low-voltage LDO  <http://ww1.microchip.com/downloads/en/DeviceDoc/mic47100.pdf>
at 0.8V output, with a 7:1 divider string (14 ohm pullup,2 ohm pulldown) has
the right voltage, and only 2 ohms impedance (so your 50 mA current
draws it down, but doesn't burn anything up).   Would that work for you?

On Thursday, July 13, 2017 at 3:32:23 AM UTC-4, Marke wrote:
> Hi All,
> 
> I have a need to generate +100mV DC to drive a load which is capable of sourcing up to ~50mA but will typically see high impedance. Easily available I have a clean 24V source and 208VAC. My intent is to drop from 24V to ~1.8V using a buck converter then follow it up with a 1.0V precision shunt (ADR510 or other) followed by a 9:1 precision resistor divider. Buffer the 100mV output by a low noise single supply op-amp such as ltc1014. Although it looks like ltc1014 won't be able to source enough current so possibly followed with a BJT?
> 
> Voltage drift is more important than precision for this application and +/- 3mV should be good enough. The environment the board will reside in is ~25C +/- 5deg. The output voltage must not drift above ~130mV to prevent causing issues in the test chamber. 
> 
> The voltage across the load is buffered, low-pass filtered (2-pole active = 1kHz) and multiplied by 10x before being sampled. The low pass filter frequency is chosen to preserve rise times in the ~500uS range. 
> 
> I expect that the largest source of noise will not be from the shunt (70ppm/C), the resistor divider (25ppm/C), or the Op-Amp ~160uV but from the 5 foot run of cable to the test chamber and back and am interested in best practice shielding techniques to mitigate induced noise.  
> 
> I'm not much of an electrical designer and haven't designed anything similar to this before so I'm interested in hearing about other possible topologies that can meet the requirements or how others would approach the problem. The solution will be put onto a pcb as part of a larger circuit so i cannot use a benchtop supply. 
> 
> To summarize:
> 
>  - Vin = +24V and/or 208VAC 
>  - Vout= 100mV DC +/- 2mV 
>  - Iout = up to 50mA into short circuit load
> 
> Thank you,
> 
> Mark

Once you have +1.8V, why not something like this?


    (view in Courier font)
                                   +1.8V
Vref >---.                          -+-
         |                           |
        [R1]                        [R4] 20
         |   100mV  |\               |
         +----------|+\            |/  Q1
         |          |  >---[R3]----|
        [R2]    .---|-/            |>.
         |      |   |/               |
        ===     |                    |
                '--------------------+-----> Vout = +100mV
                                     |
                                    [1k] R5
                                     |
                                    ===

Vout is a precision, low-impedance output.  R4 provides
short-circuit protection. R5 provides an optional
minimum load.

Cheers,
James Arthur

On Thursday, July 13, 2017 at 4:00:57 AM UTC-4, Phil Allison wrote:
> Marke wrote:
> 
> -----------------
> 
> 
> > 
> > I have a need to generate +100mV DC to drive a load which is capable of sourcing up to ~50mA but will typically see high impedance. Easily available I have a clean 24V source and 208VAC. My intent is to drop from 24V to ~1.8V using a buck converter then follow it up with a 1.0V precision shunt (ADR510 or other) followed by a 9:1 precision resistor divider. Buffer the 100mV output by a low noise single supply op-amp such as ltc1014. Although it looks like ltc1014 won't be able to source enough current so possibly followed with a BJT?
> > 
> > Voltage drift is more important than precision for this application and +/- 3mV should be good enough. The environment the board will reside in is ~25C +/- 5deg. The output voltage must not drift above ~130mV to prevent causing issues in the test chamber. 
> > 
> > The voltage across the load is buffered, low-pass filtered (2-pole active = 1kHz) and multiplied by 10x before being sampled. The low pass filter frequency is chosen to preserve rise times in the ~500uS range. 
> > 
> > I expect that the largest source of noise will not be from the shunt (70ppm/C), the resistor divider (25ppm/C), or the Op-Amp ~160uV but from the 5 foot run of cable to the test chamber and back and am interested in best practice shielding techniques to mitigate induced noise.  
> > 
> > I'm not much of an electrical designer and haven't designed anything similar to this before so I'm interested in hearing about other possible topologies that can meet the requirements or how others would approach the problem. The solution will be put onto a pcb as part of a larger circuit so i cannot use a benchtop supply. 
> > 
> > To summarize:
> > 
> >  - Vin = +24V and/or 208VAC 
> >  - Vout= 100mV DC +/- 2mV 
> >  - Iout = up to 50mA into short circuit load
> > 
> > Thank you,
> > 
> >
> 
> ** Using the KISS principle, all you need is a 5V, 1Amp TO220 reg IC and 3 resistors. The resistors are 120ohm, 82ohm and 1ohm - all 1% types.
> 
> The 120ohm & 82ohm go in parallel to make 48.7ohms, then 1ohm in series across 5V.
> 
> This makes a 1:49.7 divider so you get 100mV with a 1 ohm source impedance and  a SCC of 100mA. 
> 
> A small cap is also needed across the output of the reg IC for stability. 
> 
> 
> 
> ....  Phil

Right, that's what I'd try.  If you need a lower source impedance
maybe buffer with an opamp.  (Is there some dip opamp that does ~100mA 
besides the TCA0372?.. too lazy to troll Digikey.)  

George H.  

On Thursday, July 13, 2017 at 10:13:13 AM UTC-4, George Herold wrote:
> On Thursday, July 13, 2017 at 4:00:57 AM UTC-4, Phil Allison wrote:
> > Marke wrote:
> > 
> > -----------------
> > 
> > 
> > > 
> > > I have a need to generate +100mV DC to drive a load which is capable of sourcing up to ~50mA but will typically see high impedance. Easily available I have a clean 24V source and 208VAC. My intent is to drop from 24V to ~1.8V using a buck converter then follow it up with a 1.0V precision shunt (ADR510 or other) followed by a 9:1 precision resistor divider. Buffer the 100mV output by a low noise single supply op-amp such as ltc1014. Although it looks like ltc1014 won't be able to source enough current so possibly followed with a BJT?
> > > 
> > > Voltage drift is more important than precision for this application and +/- 3mV should be good enough. The environment the board will reside in is ~25C +/- 5deg. The output voltage must not drift above ~130mV to prevent causing issues in the test chamber. 
> > > 
> > > The voltage across the load is buffered, low-pass filtered (2-pole active = 1kHz) and multiplied by 10x before being sampled. The low pass filter frequency is chosen to preserve rise times in the ~500uS range. 
> > > 
> > > I expect that the largest source of noise will not be from the shunt (70ppm/C), the resistor divider (25ppm/C), or the Op-Amp ~160uV but from the 5 foot run of cable to the test chamber and back and am interested in best practice shielding techniques to mitigate induced noise.  
> > > 
> > > I'm not much of an electrical designer and haven't designed anything similar to this before so I'm interested in hearing about other possible topologies that can meet the requirements or how others would approach the problem. The solution will be put onto a pcb as part of a larger circuit so i cannot use a benchtop supply. 
> > > 
> > > To summarize:
> > > 
> > >  - Vin = +24V and/or 208VAC 
> > >  - Vout= 100mV DC +/- 2mV 
> > >  - Iout = up to 50mA into short circuit load
> > > 
> > > Thank you,
> > > 
> > >
> > 
> > ** Using the KISS principle, all you need is a 5V, 1Amp TO220 reg IC and 3 resistors. The resistors are 120ohm, 82ohm and 1ohm - all 1% types.
> > 
> > The 120ohm & 82ohm go in parallel to make 48.7ohms, then 1ohm in series across 5V.
> > 
> > This makes a 1:49.7 divider so you get 100mV with a 1 ohm source impedance and  a SCC of 100mA. 
> > 
> > A small cap is also needed across the output of the reg IC for stability. 
> > 
> > 
> > 
> > ....  Phil
> 
> Right, that's what I'd try.  If you need a lower source impedance
> maybe buffer with an opamp.  (Is there some dip opamp that does ~100mA 
> besides the TCA0372?.. too lazy to troll Digikey.)  
> 
> George H.

I interpret the OP as needing 100mV and holding +/-3mV for currents of
0 <= i.out <= 50mA. Most op-amps would need a buffer for that, yes.

If efficiency doesn't matter, just use an LM317 as the preregulator
with the Vadj terminal grounded.  That gets you to 1.2V with one part.
An LMV431-1.2 with a 50mA-limiting resistor to +24V might even be
simpler (& more accurate) for getting to 1.2V.

Cheers,
James Arthur

On Thu, 13 Jul 2017 00:32:12 -0700 (PDT), Marke
<mark.e.emerson@gmail.com> wrote:

>Hi All,
>
>I have a need to generate +100mV DC to drive a load which is capable of sourcing up to ~50mA but will typically see high impedance. Easily available I have a clean 24V source and 208VAC. My intent is to drop from 24V to ~1.8V using a buck converter then follow it up with a 1.0V precision shunt (ADR510 or other) followed by a 9:1 precision resistor divider. Buffer the 100mV output by a low noise single supply op-amp such as ltc1014. Although it looks like ltc1014 won't be able to source enough current so possibly followed with a BJT?
>
>Voltage drift is more important than precision for this application and +/- 3mV should be good enough. The environment the board will reside in is ~25C +/- 5deg. The output voltage must not drift above ~130mV to prevent causing issues in the test chamber. 
>
>The voltage across the load is buffered, low-pass filtered (2-pole active = 1kHz) and multiplied by 10x before being sampled. The low pass filter frequency is chosen to preserve rise times in the ~500uS range. 
>
>I expect that the largest source of noise will not be from the shunt (70ppm/C), the resistor divider (25ppm/C), or the Op-Amp ~160uV but from the 5 foot run of cable to the test chamber and back and am interested in best practice shielding techniques to mitigate induced noise.  
>
>I'm not much of an electrical designer and haven't designed anything similar to this before so I'm interested in hearing about other possible topologies that can meet the requirements or how others would approach the problem. The solution will be put onto a pcb as part of a larger circuit so i cannot use a benchtop supply. 
>
>To summarize:
>
> - Vin = +24V and/or 208VAC 
> - Vout= 100mV DC +/- 2mV 
> - Iout = up to 50mA into short circuit load
>
>Thank you,
>
>Mark 

The best references are mostly in the 2.5 to 10 volt range, so you
could use one of them and divide down. There's an LM4040 at 2.5 volts,
0.1%, fairly cheap. The ADR refs from ADI are amazing, tempcos down to
3 PPM, for a few dollars, so the ADR510 should be OK.

You might consider a 4-wire remote sense configuration to zap the
error of 50 mA in the lead wires.

Susumu makes cheap 0.1% thin-film resistors with tempcos typically
below 10 PPM.

2% tolerance should be easy, unless you have ground-loop issues. You
could start with an isolated DC-DC converter.


-- 

John Larkin         Highland Technology, Inc

lunatic fringe electronics 

On 07/13/2017 09:10 AM, dagmargoodboat@yahoo.com wrote:
> On Thursday, July 13, 2017 at 3:32:23 AM UTC-4, Marke wrote:
>> Hi All,
>>
>> I have a need to generate +100mV DC to drive a load which is capable of sourcing up to ~50mA but will typically see high impedance. Easily available I have a clean 24V source and 208VAC. My intent is to drop from 24V to ~1.8V using a buck converter then follow it up with a 1.0V precision shunt (ADR510 or other) followed by a 9:1 precision resistor divider. Buffer the 100mV output by a low noise single supply op-amp such as ltc1014. Although it looks like ltc1014 won't be able to source enough current so possibly followed with a BJT?
>>
>> Voltage drift is more important than precision for this application and +/- 3mV should be good enough. The environment the board will reside in is ~25C +/- 5deg. The output voltage must not drift above ~130mV to prevent causing issues in the test chamber.
>>
>> The voltage across the load is buffered, low-pass filtered (2-pole active = 1kHz) and multiplied by 10x before being sampled. The low pass filter frequency is chosen to preserve rise times in the ~500uS range.
>>
>> I expect that the largest source of noise will not be from the shunt (70ppm/C), the resistor divider (25ppm/C), or the Op-Amp ~160uV but from the 5 foot run of cable to the test chamber and back and am interested in best practice shielding techniques to mitigate induced noise.
>>
>> I'm not much of an electrical designer and haven't designed anything similar to this before so I'm interested in hearing about other possible topologies that can meet the requirements or how others would approach the problem. The solution will be put onto a pcb as part of a larger circuit so i cannot use a benchtop supply.
>>
>> To summarize:
>>
>>   - Vin = +24V and/or 208VAC
>>   - Vout= 100mV DC +/- 2mV
>>   - Iout = up to 50mA into short circuit load
>>
>> Thank you,
>>
>> Mark
> 
> Once you have +1.8V, why not something like this?
> 
> 
>      (view in Courier font)
>                                     +1.8V
> Vref >---.                          -+-
>           |                           |
>          [R1]                        [R4] 20
>           |   100mV  |\               |
>           +----------|+\            |/  Q1
>           |          |  >---[R3]----|
>          [R2]    .---|-/            |>.
>           |      |   |/               |
>          ===     |                    |
>                  '--------------------+-----> Vout = +100mV
>                                       |
>                                      [1k] R5
>                                       |
>                                      ===
> 
> Vout is a precision, low-impedance output.  R4 provides
> short-circuit protection. R5 provides an optional
> minimum load.
> 
> Cheers,
> James Arthur
> 

Looks like a TL431...

On Thursday, July 13, 2017 at 11:06:46 AM UTC-4, John Larkin wrote:
> On Thu, 13 Jul 2017 00:32:12 -0700 (PDT), Marke
> <mark.e.emerson@gmail.com> wrote:
> 
> >Hi All,
> >
> >I have a need to generate +100mV DC to drive a load which is capable of sourcing up to ~50mA but will typically see high impedance. Easily available I have a clean 24V source and 208VAC. My intent is to drop from 24V to ~1.8V using a buck converter then follow it up with a 1.0V precision shunt (ADR510 or other) followed by a 9:1 precision resistor divider. Buffer the 100mV output by a low noise single supply op-amp such as ltc1014. Although it looks like ltc1014 won't be able to source enough current so possibly followed with a BJT?
> >
> >Voltage drift is more important than precision for this application and +/- 3mV should be good enough. The environment the board will reside in is ~25C +/- 5deg. The output voltage must not drift above ~130mV to prevent causing issues in the test chamber. 
> >
> >The voltage across the load is buffered, low-pass filtered (2-pole active = 1kHz) and multiplied by 10x before being sampled. The low pass filter frequency is chosen to preserve rise times in the ~500uS range. 
> >
> >I expect that the largest source of noise will not be from the shunt (70ppm/C), the resistor divider (25ppm/C), or the Op-Amp ~160uV but from the 5 foot run of cable to the test chamber and back and am interested in best practice shielding techniques to mitigate induced noise.  
> >
> >I'm not much of an electrical designer and haven't designed anything similar to this before so I'm interested in hearing about other possible topologies that can meet the requirements or how others would approach the problem. The solution will be put onto a pcb as part of a larger circuit so i cannot use a benchtop supply. 
> >
> >To summarize:
> >
> > - Vin = +24V and/or 208VAC 
> > - Vout= 100mV DC +/- 2mV 
> > - Iout = up to 50mA into short circuit load
> >
> >Thank you,
> >
> >Mark 
> 
> The best references are mostly in the 2.5 to 10 volt range, so you
> could use one of them and divide down. There's an LM4040 at 2.5 volts,
> 0.1%, fairly cheap. The ADR refs from ADI are amazing, tempcos down to
> 3 PPM, for a few dollars, so the ADR510 should be OK.
> 
> You might consider a 4-wire remote sense configuration to zap the
> error of 50 mA in the lead wires.
> 
> Susumu makes cheap 0.1% thin-film resistors with tempcos typically
> below 10 PPM.
> 
> 2% tolerance should be easy, unless you have ground-loop issues. You
> could start with an isolated DC-DC converter.
> 
> 
> -- 
> 
> John Larkin         Highland Technology, Inc
> 
> lunatic fringe electronics

He only needs +/- 3% over 10oC, so that part should be pretty
straight-forward.  Even the humble LMV431 comes in 0.5%, jelly-bean
from Digikey.

Cheers,
James Arthur