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Opamp (output) over voltage protection

Started by George Herold June 23, 2017
On 06/23/2017 01:42 PM, Jim Thompson wrote:
> On Fri, 23 Jun 2017 09:42:34 -0700 (PDT), George Herold > <gherold@teachspin.com> wrote: > >> On Friday, June 23, 2017 at 12:25:46 PM UTC-4, bitrex wrote: >>> On 06/23/2017 12:20 PM, bitrex wrote: >>>> On 06/23/2017 12:05 PM, George Herold wrote: >>>>> On Friday, June 23, 2017 at 11:04:03 AM UTC-4, bitrex wrote: >>>>>> On 06/23/2017 09:51 AM, George Herold wrote: >>>>>>> On Friday, June 23, 2017 at 9:11:56 AM UTC-4, George Herold wrote: >>>>>>>> Hi all, So I've got an opamp driving a remote FET. The current >>>>>>>> incarnation of >>>>>>>> the circuit has students able to change (screw up) the connections. >>>>>>>> There's a ~60V power supply available so I'd like to make it so >>>>>>>> that the >>>>>>>> opamp survives having it's output connected to 60 V. Since it's >>>>>>>> driving a >>>>>>>> Fet (slowly) there is not much current and I'm sticking in two series >>>>>>>> depletion Fets (LND150's) (input and output by the drains, G and >>>>>>>> S's all >>>>>>>> shorted.) I'm just wondering about this ~1.5 mA feeding back into the >>>>>>>> opamp (opa2134). Should I put diodes to the power rails on the >>>>>>>> output? >>>>>>>> Or can the opamp output withstand the 1 mA? >>>>>>>> >>>>>>>> (I'll find out, but just looking for advice before I let the magic >>>>>>>> smoke >>>>>>>> out. :^) >>>>>>>> >>>>>>>> George H. >>>>>>> >>>>>>> With no diodes to power rail, the 'output' of the opamp went to >>>>>>> ~1.5V above the supply rail. And swallowed the 1.5 mA. Seems OK. >>>>>>> >>>>>>> George H. >>>>>>> >>>>>> >>>>>> Whats the supply voltage? If you're really paranoid you could buffer the >>>>> >>>>> +/- 15V, but I tried it with the supply shut off too. >>>>> Output went to +/- 2.5 V. >>>>> >>>>> I'm not really sure if this is true, but I figure if the IC is only >>>>> dissipating (2.5V * 1.5 mA) ~4 mW nothing can be damaged. >>>>> >>>>>> output of the op amp with CMOS gates, 4 NANDs in parallel to source >>>>>> current into the load, 4 NORs to sink. >>>>>> >>>>>> Socket them so if worst comes to worst and they blow from an incorrect >>>>>> connection you'll be able to have the culprit swap them out >>>>> >>>>> I'm not sure I understand the Cmos idea. This is a linear circuit >>>>> so I need to be able to run the Fet gate at different voltages. >>>> >>>> Ya, no problem! You can send the output of an op-amp into some >>>> paralleled CMOS gate inputs and then run the feedback resistor around >>>> from the paralleled outputs of the gates back to the input of the >>>> op-amp, now it'll work as a linear circuit. The propagation delay of >>>> most 40xx logic gates is in the single-digit ns and shouldn't affect >>>> loop stability at all. >>>> >>>> You get R-R output for "free", too. It's a thing. It's in an app note. >>>> >>> >>> Sorry, 74HC may be in the single-digits, standard 4000 series will be >>> longer but still probably irrelevant >>> >>> Anyway see page 3: >>> >>> <https://www.fairchildsemi.com/application-notes/AN/AN-88.pdf> >> >> OK, I guess these days if I needed R-R output I'd choose an opamp >> that does that. And how does a Cmos 'buffer' on the output save >> me from overvoltage? Are Cmos protected from having their output lifted to +/- 60V? >> >> George H. > > Bitrex thinks so >:-} > > _Some_ 'HC' parts are designed for (tri-state) bus driver/receiver > applications and the output can be driven above local rail voltage > (VDD) without harm... but NOT below VSS. > > ...Jim Thompson >
No, that's why I also suggested putting them in sockets, so that when the dummy blows them by fucking up the connections they can enjoy the experience of grabbing replacements from the bin and swapping them.