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Running out of ideas: stability, bootstrap

Started by Gerhard Hoffmann May 28, 2017
Hi, all,

we had a bank holiday here, nicely positioned close to
the weekend and I took the free time to play with my
multi-IF3601 low noise amplifier.

That was not so funny because it features a negative
input impedance over most frequencies, so with
a suitable inductance on the input it makes a stable
oscillator.

Some observations:

- Zin is negative also with the feedback loop cut

- Choice op op amp does not matter: ADA4898 vs. THS4022

- There is no coupling via the bias system; base bias
   used to have a 2nd current source that shared the
   BAV99 string; that could produce startup problems (solved)

- type of cascode transistor did not make much of a difference,
   using an Infineon BFQ19S instead of FZT851/ZXT690B looked
   slightly better, but not good enough.

- Leaving the cascode transistor out remedied the situation,
   but I need the cascode transistor to introduce the bootstrap
   to eliminate Cgd of the paralleled FETs.

- The THS4022 suppresses the Miller effect quite nicely at
   least to 100 KHz, but the unmultiplied Cgate-drain is still
   easily a nF of more.

- The obvious solution of gate stoppers does not make sense
   because of the noise. A resistor in the base lead of the
   cascode makes things worse; 6R8 between the drains and
   the cascode emitter made no difference. (could not use
   more without messing up the DC operating point, it also
   would interfere with the bootstrap)

- ferrite beads in the gates do exactly nothing.

circuit snippet is at
< 
https://www.flickr.com/photos/137684711@N07/34904768906/in/album-72157682404684680/ 
 >

   Currently, there are 4 FETs in parallel.

Does the combined expertise of the group have any idea on
how to stabilize the cascode or an alternative way to
introduce the bootstrap?

Best regards,

Gerhard




On 05/28/2017 11:11 AM, Gerhard Hoffmann wrote:
> Hi, all, > > we had a bank holiday here, nicely positioned close to > the weekend and I took the free time to play with my > multi-IF3601 low noise amplifier. > > That was not so funny because it features a negative > input impedance over most frequencies, so with > a suitable inductance on the input it makes a stable > oscillator. > > Some observations: > > - Zin is negative also with the feedback loop cut > > - Choice op op amp does not matter: ADA4898 vs. THS4022 > > - There is no coupling via the bias system; base bias > used to have a 2nd current source that shared the > BAV99 string; that could produce startup problems (solved) > > - type of cascode transistor did not make much of a difference, > using an Infineon BFQ19S instead of FZT851/ZXT690B looked > slightly better, but not good enough. > > - Leaving the cascode transistor out remedied the situation, > but I need the cascode transistor to introduce the bootstrap > to eliminate Cgd of the paralleled FETs. > > - The THS4022 suppresses the Miller effect quite nicely at > least to 100 KHz, but the unmultiplied Cgate-drain is still > easily a nF of more. > > - The obvious solution of gate stoppers does not make sense > because of the noise. A resistor in the base lead of the > cascode makes things worse; 6R8 between the drains and > the cascode emitter made no difference. (could not use > more without messing up the DC operating point, it ahlso > would interfere with the bootstrap) > > - ferrite beads in the gates do exactly nothing. > > circuit snippet is at > < > https://www.flickr.com/photos/137684711@N07/34904768906/in/album-72157682404684680/ > > > > Currently, there are 4 FETs in parallel. > > Does the combined expertise of the group have any idea on > how to stabilize the cascode or an alternative way to > introduce the bootstrap? > > Best regards, > > Gerhard
Did you check out some of the ideas guys had on the thread "Fast buffer idea?" As JL might say, this cascode bootstrapping arrangement looks way too complicated and uses too many parts. I don't completely understand it. Why not drive the boostrapping transistor from its base? :-( the mindset is catchy apparently...
On Sun, 28 May 2017 17:11:52 +0200, Gerhard Hoffmann
<ghf@hoffmann-hochfrequenz.de> wrote:

>Hi, all, > >we had a bank holiday here, nicely positioned close to >the weekend and I took the free time to play with my >multi-IF3601 low noise amplifier. > >That was not so funny because it features a negative >input impedance over most frequencies, so with >a suitable inductance on the input it makes a stable >oscillator. > >Some observations: > >- Zin is negative also with the feedback loop cut > >- Choice op op amp does not matter: ADA4898 vs. THS4022 > >- There is no coupling via the bias system; base bias > used to have a 2nd current source that shared the > BAV99 string; that could produce startup problems (solved) > >- type of cascode transistor did not make much of a difference, > using an Infineon BFQ19S instead of FZT851/ZXT690B looked > slightly better, but not good enough. > >- Leaving the cascode transistor out remedied the situation, > but I need the cascode transistor to introduce the bootstrap > to eliminate Cgd of the paralleled FETs. > >- The THS4022 suppresses the Miller effect quite nicely at > least to 100 KHz, but the unmultiplied Cgate-drain is still > easily a nF of more. > >- The obvious solution of gate stoppers does not make sense > because of the noise. A resistor in the base lead of the > cascode makes things worse; 6R8 between the drains and > the cascode emitter made no difference. (could not use > more without messing up the DC operating point, it also > would interfere with the bootstrap) > >- ferrite beads in the gates do exactly nothing. > >circuit snippet is at >< >https://www.flickr.com/photos/137684711@N07/34904768906/in/album-72157682404684680/ > > > > Currently, there are 4 FETs in parallel. > >Does the combined expertise of the group have any idea on >how to stabilize the cascode or an alternative way to >introduce the bootstrap? > >Best regards, > >Gerhard > > >
Over what frequency range is the Zin negative? Where does GATE_BIAS come from? How is this physically assembled? -- John Larkin Highland Technology, Inc jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
Am 28.05.2017 um 18:46 schrieb John Larkin:

> > Over what frequency range is the Zin negative?
The network analyzer starts officially at 300 KHz, non-guaranteed at 150KHz. At 150 KHz Zin is already negative. It seems, at about 10 MHz everything is running out of steam, so it stops being offensive. Every impedance inside the circle that goes through 0 has a positive real part. Everything on the circle through 0 has zero Ohms, only LC. Everything outside of that circle has a negative real part. The Smith diagram is in the same photo album. There are no complaints by LTspice. In a very old version of Genesys, I get about the same behavior regarding Zin. But I could not make the bias loop converge, so setting the operating point is clumsy.
> Where does GATE_BIAS come from?
That comes from an integrator. I have added that part of the circuit. Since the 30uF input capacitance * 66Meg bias resistor takes an eternity to settle, I have added a window comparator & analog switch to reduce the bias resistor by paralleling 4Meg7. That works.
> > How is this physically assembled?
It is all on a small dual-sided circuit board. Pic included. It does no longer look that tidy. :-) < https://www.flickr.com/photos/137684711@N07/albums/72157682404684680 > and the pics left/right of it. cheers, Gerhard
Am 28.05.2017 um 18:09 schrieb bitrex:


> Did you check out some of the ideas guys had on the thread "Fast buffer > idea?" > > As JL might say, this cascode bootstrapping arrangement looks way too > complicated and uses too many parts. I don't completely understand it. > Why not drive the boostrapping transistor from its base?
The bootstrapping is not yet included in the board; only the cascode as a precondition. The cascode also gave quite a rise in bandwidth when I used the ADA4898 and better Miller killing abilities at up to 160 mA. I first wanted to drive the base from a leftover FET opamp used as a follower; OTOH the same voltage is available at the sources of the IF3601; a 0.1 Ohm source resistor looks impressively low impedance, but at this point the signal has already travelled through the cascode and the THS4022 op amp, that introduces unwelcome dependencies. The 0.1 Ohms look small and everything seems common source, but the feedback through the op amp makes it behave like a high impedance current source from the FET's point of view. The source follows the gate quite closely after all. The drain looks into ~ 0 Ohms of the cascode emitter, and if the signal fed back from the op amp has the right phase, it looks capacitively for the FET. That alone could provide the negative input impedance (like in a standard VHF VCO, aka capacitivly loaded follower). Only the fact that Zin is still negative when I cut the feedback makes me assume that the cascode transistor is the culprit. The 0.1 Ohm source resistors btw were necessary with 8 parallel FETs, or they would cost 10 pV/rtHz in simulation when you are just at +/- 100 pV/rtHz.
> :-( the mindset is catchy apparently...
Cheers, Gerhard (got a nice Tempranillo)
On Sun, 28 May 2017 23:01:17 +0200, Gerhard Hoffmann
<ghf@hoffmann-hochfrequenz.de> wrote:

>Am 28.05.2017 um 18:09 schrieb bitrex: > > >> Did you check out some of the ideas guys had on the thread "Fast buffer >> idea?" >> >> As JL might say, this cascode bootstrapping arrangement looks way too >> complicated and uses too many parts. I don't completely understand it. >> Why not drive the boostrapping transistor from its base? > >The bootstrapping is not yet included in the board; only the >cascode as a precondition. The cascode also gave quite a rise >in bandwidth when I used the ADA4898 and better Miller killing >abilities at up to 160 mA. > >I first wanted to drive the base >from a leftover FET opamp used as a follower; OTOH the same >voltage is available at the sources of the IF3601; a 0.1 Ohm >source resistor looks impressively low impedance, but at this >point the signal has already travelled through the cascode >and the THS4022 op amp, that introduces unwelcome dependencies. > >The 0.1 Ohms look small and everything seems common source, >but the feedback through the op amp makes it behave like a high >impedance current source from the FET's point of view. The >source follows the gate quite closely after all. > >The drain looks into ~ 0 Ohms of the cascode emitter, and if >the signal fed back from the op amp has the right phase, it >looks capacitively for the FET. That alone could provide >the negative input impedance (like in a standard VHF VCO, >aka capacitivly loaded follower). > >Only the fact that Zin is still negative when I cut the >feedback makes me assume that the cascode transistor is the >culprit. > >The 0.1 Ohm source resistors btw were necessary with 8 >parallel FETs, or they would cost 10 pV/rtHz in simulation >when you are just at +/- 100 pV/rtHz. > > >> :-( the mindset is catchy apparently... > >Cheers, Gerhard > >(got a nice Tempranillo)
Though it says C4, dni, is it there? Maybe the capacitance at that node is making Q3 unstable? ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Thinking outside the box... producing elegant solutions. "It is not in doing what you like, but in liking what you do that is the secret of happiness." -James Barrie
Am 28.05.2017 um 23:30 schrieb Jim Thompson:

> > Though it says C4, dni, is it there? Maybe the capacitance at that > node is making Q3 unstable?
No, it is not there, just an opportunity so solder something. But adding a capacitor of 150p between base and C of the cascode improves the situation slightly, although not enough, and it looks wrong. cheers, Gerhard (getting tired slowly because of said Tempranillo :.)
On Sun, 28 May 2017 23:56:41 +0200, Gerhard Hoffmann
<ghf@hoffmann-hochfrequenz.de> wrote:

>Am 28.05.2017 um 23:30 schrieb Jim Thompson: > >> >> Though it says C4, dni, is it there? Maybe the capacitance at that >> node is making Q3 unstable? > >No, it is not there, just an opportunity so solder something. > >But adding a capacitor of 150p between base and C of the cascode >improves the situation slightly, although not enough, and it looks >wrong.
Strange.
> >cheers, Gerhard > >(getting tired slowly because of said Tempranillo :.)
Enjoy >:-} ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Thinking outside the box... producing elegant solutions. "It is not in doing what you like, but in liking what you do that is the secret of happiness." -James Barrie
On 05/28/2017 11:11 AM, Gerhard Hoffmann wrote:
> Hi, all, > > we had a bank holiday here, nicely positioned close to > the weekend and I took the free time to play with my > multi-IF3601 low noise amplifier. > > That was not so funny because it features a negative > input impedance over most frequencies, so with > a suitable inductance on the input it makes a stable > oscillator. > > Some observations: > > - Zin is negative also with the feedback loop cut
Which feedback loop? There are two that I see in the circuit as posted: the one driven by the FET source feeding the R17/R23 etc. RC network where U1A is acting as an inverting amplifier, and possibly some kind of integrator network off page used to generate the bias voltage for the FET gate.
> circuit snippet is at > < > https://www.flickr.com/photos/137684711@N07/34904768906/in/album-72157682404684680/ > > > Currently, there are 4 FETs in parallel. > > Does the combined expertise of the group have any idea on > how to stabilize the cascode or an alternative way to > introduce the bootstrap? > > Best regards, > > Gerhard
I'm assuming the goal here is to build a low-noise source follower, with the output buffered by an op amp. It looks like the non-inverting input of U1A is tied to a virtual ground, and the inverting input is tied to the collector of Q3, I'm guessing to try to use negative feedback to fix the collector voltage at 4.57. But since Q3 is fed by current source Q2, the collector of Q3 (test point P3) is a high-impedance node and so it seems to me that the only way the DC voltage there can be controlled is by U1A sensing the source voltage of the FET, through the R17/R23 network, and then around the loop through the integrator (not shown) back to the gate of the FET, if I'm understanding the circuit correctly. The gain from the gate of the cascoded FET to the output of U1A isn't well-defined; from "its perspective" it looks like a current source loaded common-emitter amplifier feeding a transimpedance converter. It will be very large. Plus the phase shift from U1A and the integrator to the gate it sounds like a recipe for oscillation. If I were dead-set on using a current source for the cascode collector load I think it would be better to let one op-amp section handle a feedback loop around the upper current source to set the DC bias at Q3's collector, and let U1A and the integrator just handle setting the FET's bias and the 0V DC level to the post amplifier. Delegate some responsibility...
On 05/29/2017 08:38 AM, bitrex wrote:

> The gain from the gate of the cascoded FET to the output of U1A isn't > well-defined; from "its perspective" it looks like a current source > loaded common-emitter amplifier feeding a transimpedance converter.
Should be "from the gate of the FET to the output of U1A via the collector of the cascode"