How to determine Zin, Yout for RF transistor, from A parameters

On Sat, 06 May 2017 14:12:38 -0400, bitrex wrote:

> If you know how to use a Smith chart you can design an impedance
> matching network for same amp in about 5 minutes that would take you the
> better part of an hour to grunge thru on paper

Well no shit, Sherlock.

On Sat, 06 May 2017 17:05:03 +0000, Jan Panteltje wrote:

> [LT]spice is a joke if it comes to real RF, and normal circuits too.
> it is all about layout

So? Just model the strays and parasitics if they're relevant.

On Sat, 6 May 2017 21:18:44 -0000 (UTC), Cursitor Doom
<curd@notformail.com> wrote:

>On Sat, 06 May 2017 14:12:38 -0400, bitrex wrote:
>
>> If you know how to use a Smith chart you can design an impedance
>> matching network for same amp in about 5 minutes that would take you the
>> better part of an hour to grunge thru on paper
>
>Well no shit, Sherlock.

Sno-o-o-o-ort >:-}
		
                                        ...Jim Thompson
-- 
| James E.Thompson                                 |    mens     |
| Analog Innovations                               |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| STV, Queen Creek, AZ 85142    Skype: skypeanalog |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

     Thinking outside the box... producing elegant solutions.

"It is not in doing what you like, but in liking what you do that
is the secret of happiness."  -James Barrie

On Sat, 06 May 2017 15:16:46 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:

>On Sat, 6 May 2017 21:18:44 -0000 (UTC), Cursitor Doom
><curd@notformail.com> wrote:
>
>>On Sat, 06 May 2017 14:12:38 -0400, bitrex wrote:
>>
>>> If you know how to use a Smith chart you can design an impedance
>>> matching network for same amp in about 5 minutes that would take you the
>>> better part of an hour to grunge thru on paper
>>
>>Well no shit, Sherlock.
>
>Sno-o-o-o-ort >:-}
>		
>                                        ...Jim Thompson

Forgot to add, "...you can design...", means _somebody_ can, but I
seriously doubt that bitrex can.
		
                                        ...Jim Thompson
-- 
| James E.Thompson                                 |    mens     |
| Analog Innovations                               |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| STV, Queen Creek, AZ 85142    Skype: skypeanalog |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

     Thinking outside the box... producing elegant solutions.

"It is not in doing what you like, but in liking what you do that
is the secret of happiness."  -James Barrie

>wrote in message 
>news:e9130191-9658-42f9-bade-df2eb7861db6@googlegroups.com...

>S parameter design for transistor circuits is, essentially, a legacy
>claptrap rut, that many just can't get out off.

>You're obviously not an RF guy.

I am an analog guy that has run, probably 1 million spice runs. I know what 
works.

>S parameters let you calculate analytically things like the stability 
>boundary, active vs passive regions, maximum available gain, and so on.

Only if you're pissing about with a kids walki talkie.

Any equation more complicated then v=ir and i=cdv/dt is pretty much useless 
for design, today. Things are way to optimised now. No one does it it 
designing analog ASICs for starters, which forms the bulk of the billions of 
RF units in mobile phones and stuff in the known 3 universes.

S parameters are only valid as a linear approximation, and give incorrect 
results for stability because of this. They are completely useless for 
determining distortion, phase noise, or the best operating current for a 
design, or for dealing with variations. Because, now get this, they are only 
a linear approximation.

Designing a modern, competitive  analog product today, whatever the 
frequency, requires 10,000s of  DC, AC, TRAN and Nonlinear Steady State 
(PSS) simulations, over temperature, process corners, power supply, and load 
conditions. This requires accurate spice models, usually VBIC in ic designs.

For example, are you aware that modern RF ASIC TXs are hitting a wall 
because their power varies slightly as they are powered up. Techniques are 
needed to dynamically adjust the power supply to keep the output power 
constant on power up. Its impossible to design those type of circuits 
without doing extensive simulations in the time domain.

>Smith charts are super fast and intuitive, as well.

Yeah...

>A single analytical result is worth more than a stack of simulations.

Hardly ever, today. You are obviously not someone that needs to design 
ASICs, that work first time, and work in their millions.

Small signal analysis has absolutely zero chance of doing that.

Once you know what you are doing, setting up worst case runs and parameter 
sweeps over 10,000s of transient runs, will achieve what is absolutely 
impossible to do with manual equations. The world has moved on.

An yes, I know all about manipulating complicated equations.

http://www.kevinaylward.co.uk/gr/riemann/riemann.html

And there is no place for them in modern transistor level design. Period. 
Its a major failing in all the "How to design Analog Circuits" books. They 
produce these huge equations that are impossible to design with.


>There are cases that are too hard analytically, but one-transistor 
>microwave amps are not among them.

Nonsense. Accurate one transistor circuits are not solvable, especially for 
worst case conditions.  Period.

An illustration of this is the effort involved in simply solving for the 
currents in an ideal transistor with just an emitter resister.

http://www.kevinaylward.co.uk/ee/widlarlambert/widlarlambert.xht

Now add in capacitances early effect, rb, rc and hfe variation with current. 
Its a complete non starter.

I await Jim Ts response :-)

-- Kevin Aylward
http://www.anasoft.co.uk - SuperSpice
http://www.kevinaylward.co.uk/ee/index.html 

On Sat, 6 May 2017 23:39:14 +0100, "Kevin Aylward"
<kevinRemovAT@kevinaylward.co.uk> wrote:

>>wrote in message 
>>news:e9130191-9658-42f9-bade-df2eb7861db6@googlegroups.com...
>
>>S parameter design for transistor circuits is, essentially, a legacy
>>claptrap rut, that many just can't get out off.
>
>>You're obviously not an RF guy.
>
>I am an analog guy that has run, probably 1 million spice runs. I know what 
>works.
>
>>S parameters let you calculate analytically things like the stability 
>>boundary, active vs passive regions, maximum available gain, and so on.
>
>Only if you're pissing about with a kids walki talkie.
>
>Any equation more complicated then v=ir and i=cdv/dt is pretty much useless 
>for design, today. Things are way to optimised now. No one does it it 
>designing analog ASICs for starters, which forms the bulk of the billions of 
>RF units in mobile phones and stuff in the known 3 universes.
>
>S parameters are only valid as a linear approximation, and give incorrect 
>results for stability because of this. They are completely useless for 
>determining distortion, phase noise, or the best operating current for a 
>design, or for dealing with variations. Because, now get this, they are only 
>a linear approximation.
>
>Designing a modern, competitive  analog product today, whatever the 
>frequency, requires 10,000s of  DC, AC, TRAN and Nonlinear Steady State 
>(PSS) simulations, over temperature, process corners, power supply, and load 
>conditions. This requires accurate spice models, usually VBIC in ic designs.

How do you know what to simulate? Just plunking parts on a screen and
running Spice only works for very simple circuits. Try designing a
5-resonator hairpin filter by fiddling.

Analytical techniques, like s-plane analysis, control theory, all that
stuff, is sometimes the only way to get a design to analyze. Sure, do
the nonlinear analysis, but you need a starting topology.

I just designed a 7-pole elliptical lowpass filter by adding a notch
cap to a 1dB Chebychev design. The design came from the Williams book;
I managed to fiddle the notch, but I couldn't have possibly fidddled
the main filter. (It tried adding a second notch, and it exploded. One
notch is apparently my fiddle limit.)

Sounds like 10,000 simulations could be a lot of work.


-- 

John Larkin         Highland Technology, Inc

lunatic fringe electronics 

On Sat, 6 May 2017 23:39:14 +0100, "Kevin Aylward"
<kevinRemovAT@kevinaylward.co.uk> wrote:

>>wrote in message 
>>news:e9130191-9658-42f9-bade-df2eb7861db6@googlegroups.com...
>
>>S parameter design for transistor circuits is, essentially, a legacy
>>claptrap rut, that many just can't get out off.
>
>>You're obviously not an RF guy.
>
>I am an analog guy that has run, probably 1 million spice runs. I know what 
>works.
>
>>S parameters let you calculate analytically things like the stability 
>>boundary, active vs passive regions, maximum available gain, and so on.
>
>Only if you're pissing about with a kids walki talkie.
>
>Any equation more complicated then v=ir and i=cdv/dt is pretty much useless 
>for design, today. Things are way to optimised now. No one does it it 
>designing analog ASICs for starters, which forms the bulk of the billions of 
>RF units in mobile phones and stuff in the known 3 universes.
>
>S parameters are only valid as a linear approximation, and give incorrect 
>results for stability because of this. They are completely useless for 
>determining distortion, phase noise, or the best operating current for a 
>design, or for dealing with variations. Because, now get this, they are only 
>a linear approximation.
>
>Designing a modern, competitive  analog product today, whatever the 
>frequency, requires 10,000s of  DC, AC, TRAN and Nonlinear Steady State 
>(PSS) simulations, over temperature, process corners, power supply, and load 
>conditions. This requires accurate spice models, usually VBIC in ic designs.
>
>For example, are you aware that modern RF ASIC TXs are hitting a wall 
>because their power varies slightly as they are powered up. Techniques are 
>needed to dynamically adjust the power supply to keep the output power 
>constant on power up. Its impossible to design those type of circuits 
>without doing extensive simulations in the time domain.
>
>>Smith charts are super fast and intuitive, as well.
>
>Yeah...
>
>>A single analytical result is worth more than a stack of simulations.
>
>Hardly ever, today. You are obviously not someone that needs to design 
>ASICs, that work first time, and work in their millions.

I experienced this year a bad case of a "team" of analog "designers"
whose only "skill set" is cutting and pasting from their textbooks :-(

I was trying to demonstrate simplifications and "reductions to spec"
when I was cut short by my "malady".

I continued to receive the E-mail trail of their "design" efforts...
then I realized they had dumped my contributions and reverted to their
textbooks, as I noted really stupid comments about loop compensation
and the need for trimming (a simple RRIO OpAmp, fixed unity gain,
4.69K on-chip resistive load, Vdd = 1.8V, GBW = 1MHz).

When I inquired, asking for a schematic update, they cut me off from
any further information.

I await the joy when the chip comes out of fab >:-}

>
>Small signal analysis has absolutely zero chance of doing that.
>
>Once you know what you are doing, setting up worst case runs and parameter 
>sweeps over 10,000s of transient runs, will achieve what is absolutely 
>impossible to do with manual equations. The world has moved on.
>
>An yes, I know all about manipulating complicated equations.
>
>http://www.kevinaylward.co.uk/gr/riemann/riemann.html
>
>And there is no place for them in modern transistor level design. Period. 
>Its a major failing in all the "How to design Analog Circuits" books. They 
>produce these huge equations that are impossible to design with.
>
>
>>There are cases that are too hard analytically, but one-transistor 
>>microwave amps are not among them.
>
>Nonsense. Accurate one transistor circuits are not solvable, especially for 
>worst case conditions.  Period.
>
>An illustration of this is the effort involved in simply solving for the 
>currents in an ideal transistor with just an emitter resister.
>
>http://www.kevinaylward.co.uk/ee/widlarlambert/widlarlambert.xht
>
>Now add in capacitances early effect, rb, rc and hfe variation with current. 
>Its a complete non starter.
>
>I await Jim Ts response :-)

SNO-O-O-O-O-ORT >:-}

>
>-- Kevin Aylward
>http://www.anasoft.co.uk - SuperSpice
>http://www.kevinaylward.co.uk/ee/index.html 

But, ultimately, ignorance is good for business.  I once had a case
where I was tossed by an asshole manager (a textbook "designer")...
who also refused to authorize my invoices for work already done.

Three years later, with a new manager at the helm, they comes
a-begging... "save us Jim".

They not only paid me the outstanding invoices but also paid an
outrageous up-front payment to get me to return >:-}

We also have a thread running wild here on S.E.D concerning designing
a 2% oscillator (over PVT)... Bwahahahahaha, I think I need another
glass of wine >:-}
		
                                        ...Jim Thompson
-- 
| James E.Thompson                                 |    mens     |
| Analog Innovations                               |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| STV, Queen Creek, AZ 85142    Skype: skypeanalog |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

     Thinking outside the box... producing elegant solutions.

"It is not in doing what you like, but in liking what you do that
is the secret of happiness."  -James Barrie

On 05/06/2017 05:18 PM, Cursitor Doom wrote:
> On Sat, 06 May 2017 14:12:38 -0400, bitrex wrote:
>
>> If you know how to use a Smith chart you can design an impedance
>> matching network for same amp in about 5 minutes that would take you the
>> better part of an hour to grunge thru on paper
>
> Well no shit, Sherlock.
>

The grandparent poster may not have.

So go die in a fire, pal.

"Cursitor Doom" <curd@notformail.com> wrote in message 
news:oeles8$ksh$5@dont-email.me...
> On Sat, 06 May 2017 17:05:03 +0000, Jan Panteltje wrote:
>
>> [LT]spice is a joke if it comes to real RF, and normal circuits too.
>> it is all about layout
>
> So? Just model the strays and parasitics if they're relevant.

I always liked this comparison:

Sim:
https://www.seventransistorlabs.com/ClassD1/Images/ClassD_GDwav1.png
Gate drive waveform on a "complementary" pair of MOSFETs, driven together 
(more or less) as one half of an H-bridge.

Measured:
https://www.seventransistorlabs.com/ClassD1/Images/ClassD_GateWavScope.jpg

The blips and stuff are in somewhat different places, and the time skew is a 
bit mismatched.  But it's largely all there, including the sharp splat and 
the little kinky thing near the end there.  (Drool on the right hand side 
was probably supply bounce, from not modeling the PDN and cap ESR.)

And I made that while I was still at college...

Tim

-- 
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Contract Design
Website: http://seventransistorlabs.com 

>"John Larkin"  wrote in message 
>news:knksgch7t1hgulv3nkuhrg6ouj193n68td@4ax.com...

On Sat, 6 May 2017 23:39:14 +0100, "Kevin Aylward"
><kevinRemovAT@kevinaylward.co.uk> wrote:

>>>wrote in message
>>>news:e9130191-9658-42f9-bade-df2eb7861db6@googlegroups.com...
>
>>>S parameter design for transistor circuits is, essentially, a legacy
>>>claptrap rut, that many just can't get out off.
>
>>>You're obviously not an RF guy.
>
>>I am an analog guy that has run, probably 1 million spice runs. I know 
>>what
>>works.
>
>>>S parameters let you calculate analytically things like the stability
>>>boundary, active vs passive regions, maximum available gain, and so on.
>
>>Only if you're pissing about with a kids walki talkie.
>
>>Any equation more complicated then v=ir and i=cdv/dt is pretty much 
>>useless
>>for design, today. Things are way to optimised now. No one does it it
>>designing analog ASICs for starters, which forms the bulk of the billions 
>>of
>>RF units in mobile phones and stuff in the known 3 universes.
>
>>S parameters are only valid as a linear approximation, and give incorrect
>>results for stability because of this. They are completely useless for
>>determining distortion, phase noise, or the best operating current for a
>>design, or for dealing with variations. Because, now get this, they are 
>>only
>>a linear approximation.
>
>>Designing a modern, competitive  analog product today, whatever the
>>frequency, requires 10,000s of  DC, AC, TRAN and Nonlinear Steady State
>>(PSS) simulations, over temperature, process corners, power supply, and 
>>load
>>conditions. This requires accurate spice models, usually VBIC in ic 
>>designs.

>How do you know what to simulate?

The technique is have a complete understanding of topological transistor 
level circuit design. This means have a through understanding of all blocks 
such as current mirrors, cascades, feedback theory etc... It means having 
worked out the main simplified equations at some point of the core 
components, to get a feel of what's important.

> Just plunking parts on a screen

That was not the claim.

>and running Spice only works for very simple circuits.

Nonsense. Complex transistor level circuits must be run on spice in todays 
modern asic world.


>Try designing a
>5-resonator hairpin filter by fiddling.

Filter design is a specialised technique that uses specific design tools.

>Analytical techniques, like s-plane analysis, control theory, all that
>stuff, is sometimes the only way to get a design to analyze. Sure, do
>the nonlinear analysis, but you need a starting topology.

Sure, no one has claimed otherwise.

>I just designed a 7-pole elliptical lowpass filter by adding a notch
>cap to a 1dB Chebychev design. The design came from the Williams book;
>I managed to fiddle the notch, but I couldn't have possibly fidddled
>the main filter. (It tried adding a second notch, and it exploded. One
>notch is apparently my fiddle limit.)

It look like you don't know how to run a modern spice tool.

Actually, SS has some limited automatic design and placement of filters

http://www.anasoft.co.uk/images/ff.png

>Sounds like 10,000 simulations could be a lot of work.

Pardon?

Its trivial to do with modern spice tools, that's why its done that way. 
Sure, with LTSpice, I agree, its a no hopper.


http://www.anasoft.co.uk/worstcase.htm
http://www.anasoft.co.uk/images/parametric.png


The Cadence Virtuoso environment is especially good. You can setup process 
corners and parameter sweeps in lots of individual setups. Its got great GUI 
handling of setting up data tests like max/min analysis of anything, like 
rise fall times, loop phase etc. All measurement for all test runs can be 
automatically sent to an excel spread sheet etc...


-- Kevin Aylward
http://www.anasoft.co.uk - SuperSpice
http://www.kevinaylward.co.uk/ee/index.html