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ASIC IP library to check out die usage

Started by Unknown March 8, 2017
Hey

So I am looking into an ASIC to move general parts into an ASIC to reduce costs

It would include opamp, comparator, transistors etc

Before contacting a company that specialises in ASIC I would like to gain more insight

I know IP libraries exist with building blocks like those mentioned above.  

How do I get started in getting libraries and a placement tool/program?

Regards 

Klaus 
On 08/03/2017 22:15, klaus.kragelund@gmail.com wrote:
> Hey > > So I am looking into an ASIC to move general parts into an ASIC to reduce costs > > It would include opamp, comparator, transistors etc > > Before contacting a company that specialises in ASIC I would like to gain more insight > > I know IP libraries exist with building blocks like those mentioned above. > > How do I get started in getting libraries and a placement tool/program? > > Regards > > Klaus >
When I started doing ASICs I was surprised to find that (at least where I worked) people don't tend to use standard libraries for analog circuits. Nearly every op-amp, comparator, etc. on an ASIC would generally be custom designed (by a person) for that particular task, or adapted from one that the designer had used before on the same process. Even if the schematic is borrowed from a previous circuit, very likely the layout will be partially re-done (by a person) to fit into the shape of the available space in the chip floorplan. I think the reason is that you would not get a lot of the supply current, die area (cost) and performance advantages if you tried to make a "one-size-fits-all" opamp instead of at least adjusting if not re-designing each block to suit the needs. Probably someone will sell you an "IP block" if you offer enough money, but you may be disappointed with the result. Also, if you change fabrication process, the cells all need to be re-designed or at least re-simulated (and then probably re-designed). Logic gates on the other hand are almost always from a cell library, and automatically place-and-routed using *very* expensive software that makes slightly smaller layout than the next most expensive software. Imagine the cost of all of the silicon area that could be saved by smaller layout, and you will get some idea of the price to rent that software. There is significant skill required for using it too. You might get the bond pads and ESD cells from some library that has been tested on real silicon. That may work out ok if what you want is very conventional (i.e. boring logic pins etc., and no microwave frequenies or sub-nanoamp leakage requirements). Lots of people like to patent ESD cells, so I would assume that most of the obvious topologies have been patented at least once or twice in the last 20 years.
On 03/08/2017 02:04 PM, Chris Jones wrote:
> > When I started doing ASICs I was surprised to find that (at least > where I worked) people don't tend to use standard libraries for > analog circuits. Nearly every op-amp, comparator, etc. on an ASIC > would generally be custom designed (by a person) for that particular > task, or adapted from one that the designer had used before on the > same process. Even if the schematic is borrowed from a previous > circuit, very likely the layout will be partially re-done (by a > person) to fit into the shape of the available space in the chip > floorplan. > > I think the reason is that you would not get a lot of the supply > current, die area (cost) and performance advantages if you tried to > make a "one-size-fits-all" opamp instead of at least adjusting if not > re-designing each block to suit the needs. Probably someone will sell > you an "IP block" if you offer enough money, but you may be > disappointed with the result. Also, if you change fabrication > process, the cells all need to be re-designed or at least > re-simulated (and then probably re-designed). > > Logic gates on the other hand are almost always from a cell library, > and automatically place-and-routed using *very* expensive software > that makes slightly smaller layout than the next most expensive > software. Imagine the cost of all of the silicon area that could be > saved by smaller layout, and you will get some idea of the price to > rent that software. There is significant skill required for using it > too. > > You might get the bond pads and ESD cells from some library that has > been tested on real silicon. That may work out ok if what you want is > very conventional (i.e. boring logic pins etc., and no microwave > frequenies or sub-nanoamp leakage requirements). Lots of people like > to patent ESD cells, so I would assume that most of the obvious > topologies have been patented at least once or twice in the last 20 > years. >
So, do you just start magic and happily scribble away, or is that kind of thing just good for digital stuff? <http://www.opencircuitdesign.com/magic/>
On Wednesday, March 8, 2017 at 2:04:27 PM UTC+1, Chris Jones wrote:
> On 08/03/2017 22:15, klaus.kragelund@gmail.com wrote: > > Hey > > > > So I am looking into an ASIC to move general parts into an ASIC to reduce costs > > > > It would include opamp, comparator, transistors etc > > > > Before contacting a company that specialises in ASIC I would like to gain more insight > > > > I know IP libraries exist with building blocks like those mentioned above. > > > > How do I get started in getting libraries and a placement tool/program? > > > > Regards > > > > Klaus > > > > When I started doing ASICs I was surprised to find that (at least where > I worked) people don't tend to use standard libraries for analog > circuits. Nearly every op-amp, comparator, etc. on an ASIC would > generally be custom designed (by a person) for that particular task, or > adapted from one that the designer had used before on the same process. > Even if the schematic is borrowed from a previous circuit, very likely > the layout will be partially re-done (by a person) to fit into the shape > of the available space in the chip floorplan. > > I think the reason is that you would not get a lot of the supply > current, die area (cost) and performance advantages if you tried to make > a "one-size-fits-all" opamp instead of at least adjusting if not > re-designing each block to suit the needs. Probably someone will sell > you an "IP block" if you offer enough money, but you may be disappointed > with the result. Also, if you change fabrication process, the cells all > need to be re-designed or at least re-simulated (and then probably > re-designed). >
I was told that the trend the last 5-10 years, is to have a standard library, locked to a given fabrication process. And that today the foundry would supply the library, with proven parts. That way the risk of going into a basic ASIC design would be low, and the design would most often work in the first go MOSIS has design kits, but I need an account before I can access that information: https://www.mosis.com/vendors/view/tsmc/design-kits I don't need the actual routing, just a ball park size estimation, to be able to evaluate price structures Cheers Klaus
On 09/03/2017 01:31, Klaus Kragelund wrote:
> On Wednesday, March 8, 2017 at 2:04:27 PM UTC+1, Chris Jones wrote: >> On 08/03/2017 22:15, klaus.kragelund@gmail.com wrote: >>> Hey >>> >>> So I am looking into an ASIC to move general parts into an ASIC >>> to reduce costs >>> >>> It would include opamp, comparator, transistors etc >>> >>> Before contacting a company that specialises in ASIC I would like >>> to gain more insight >>> >>> I know IP libraries exist with building blocks like those >>> mentioned above. >>> >>> How do I get started in getting libraries and a placement >>> tool/program? >>> >>> Regards >>> >>> Klaus >>> >> >> When I started doing ASICs I was surprised to find that (at least >> where I worked) people don't tend to use standard libraries for >> analog circuits. Nearly every op-amp, comparator, etc. on an ASIC >> would generally be custom designed (by a person) for that >> particular task, or adapted from one that the designer had used >> before on the same process. Even if the schematic is borrowed from >> a previous circuit, very likely the layout will be partially >> re-done (by a person) to fit into the shape of the available space >> in the chip floorplan. >> >> I think the reason is that you would not get a lot of the supply >> current, die area (cost) and performance advantages if you tried to >> make a "one-size-fits-all" opamp instead of at least adjusting if >> not re-designing each block to suit the needs. Probably someone >> will sell you an "IP block" if you offer enough money, but you may >> be disappointed with the result. Also, if you change fabrication >> process, the cells all need to be re-designed or at least >> re-simulated (and then probably re-designed). >> > > I was told that the trend the last 5-10 years, is to have a standard > library, locked to a given fabrication process. And that today the > foundry would supply the library, with proven parts. That way the > risk of going into a basic ASIC design would be low, and the design > would most often work in the first go
Heh... The only IP block I ever recall purchasing (as opposed to designing in-house) had a bug in it, requiring new masks. Make sure that the contract with your "IP vendor" specifies who pays for the new masks. With analog stuff you might get into good arguments about whether the block is really working and you are misapplying it, or it doesn't meet its specs. Also a lot of chips that don't work first time are due to interconnection (e.g. resistance of long metal traces) not the circuit blocks themselves. The circuit blocks would always be simulated in detail, whereas the wiring sometimes isn't, as the extracted metal resistances make the netlist much bigger and so harder for the simulator. With high frequency stuff the inductance matters too, and mutual inductance, and even today I doubt that is feasible to simulate as a matter of course.
> > MOSIS has design kits, but I need an account before I can access that > information: > > https://www.mosis.com/vendors/view/tsmc/design-kits
Usually these contain just the transistors, resistors, etc. and spice models, and layout pcells and design rules. I never saw one with an op-amp in it.
> I don't need the actual routing, just a ball park size estimation, to > be able to evaluate price structures
You will need an IC designer to do that well. For example, the choice of process will greatly affect your costs, but more work would be required to design the circuit on a cheaper process (and the achievable performance may be less good). Also, a textbook topology might require e.g. large capacitors that costs a lot to put on-chip but there may be other circuit topologies that would avoid this, again requiring more design work, or more competent designers.
On Thu, 9 Mar 2017 00:04:21 +1100, Chris Jones
<lugnut808@spam.yahoo.com> wrote:

>On 08/03/2017 22:15, klaus.kragelund@gmail.com wrote: >> Hey >> >> So I am looking into an ASIC to move general parts into an ASIC to reduce costs >> >> It would include opamp, comparator, transistors etc >> >> Before contacting a company that specialises in ASIC I would like to gain more insight >> >> I know IP libraries exist with building blocks like those mentioned above. >> >> How do I get started in getting libraries and a placement tool/program? >> >> Regards >> >> Klaus >> > >When I started doing ASICs I was surprised to find that (at least where >I worked) people don't tend to use standard libraries for analog >circuits. Nearly every op-amp, comparator, etc. on an ASIC would >generally be custom designed (by a person) for that particular task, or >adapted from one that the designer had used before on the same process. >Even if the schematic is borrowed from a previous circuit, very likely >the layout will be partially re-done (by a person) to fit into the shape >of the available space in the chip floorplan. > >I think the reason is that you would not get a lot of the supply >current, die area (cost) and performance advantages if you tried to make >a "one-size-fits-all" opamp instead of at least adjusting if not >re-designing each block to suit the needs. Probably someone will sell >you an "IP block" if you offer enough money, but you may be disappointed >with the result. Also, if you change fabrication process, the cells all >need to be re-designed or at least re-simulated (and then probably >re-designed). > >Logic gates on the other hand are almost always from a cell library, and >automatically place-and-routed using *very* expensive software that >makes slightly smaller layout than the next most expensive software. >Imagine the cost of all of the silicon area that could be saved by >smaller layout, and you will get some idea of the price to rent that >software. There is significant skill required for using it too. > >You might get the bond pads and ESD cells from some library that has >been tested on real silicon. That may work out ok if what you want is >very conventional (i.e. boring logic pins etc., and no microwave >frequenies or sub-nanoamp leakage requirements). Lots of people like to >patent ESD cells, so I would assume that most of the obvious topologies >have been patented at least once or twice in the last 20 years.
Trying to make an ASIC based on pasting "blocks" of OpAmps, etc, ends up making an area way too large. That's why virtually all of Analog ASIC's are custom. Personally I have my netlister set up to show areas in the LVS netlist, mostly as an aid to my layout guy when he is floor-planning. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Thinking outside the box... producing elegant solutions.
On Wed, 8 Mar 2017 06:31:45 -0800 (PST), Klaus Kragelund
<klauskvik@hotmail.com> wrote:

>On Wednesday, March 8, 2017 at 2:04:27 PM UTC+1, Chris Jones wrote: >> On 08/03/2017 22:15, klaus.kragelund@gmail.com wrote: >> > Hey >> > >> > So I am looking into an ASIC to move general parts into an ASIC to reduce costs >> > >> > It would include opamp, comparator, transistors etc >> > >> > Before contacting a company that specialises in ASIC I would like to gain more insight >> > >> > I know IP libraries exist with building blocks like those mentioned above. >> > >> > How do I get started in getting libraries and a placement tool/program? >> > >> > Regards >> > >> > Klaus >> > >> >> When I started doing ASICs I was surprised to find that (at least where >> I worked) people don't tend to use standard libraries for analog >> circuits. Nearly every op-amp, comparator, etc. on an ASIC would >> generally be custom designed (by a person) for that particular task, or >> adapted from one that the designer had used before on the same process. >> Even if the schematic is borrowed from a previous circuit, very likely >> the layout will be partially re-done (by a person) to fit into the shape >> of the available space in the chip floorplan. >> >> I think the reason is that you would not get a lot of the supply >> current, die area (cost) and performance advantages if you tried to make >> a "one-size-fits-all" opamp instead of at least adjusting if not >> re-designing each block to suit the needs. Probably someone will sell >> you an "IP block" if you offer enough money, but you may be disappointed >> with the result. Also, if you change fabrication process, the cells all >> need to be re-designed or at least re-simulated (and then probably >> re-designed). >> > >I was told that the trend the last 5-10 years, is to have a standard library, locked to a given fabrication process. And that today the foundry would supply the library, with proven parts. That way the risk of going into a basic ASIC design would be low, and the design would most often work in the first go
The big con >:-}
> >MOSIS has design kits, but I need an account before I can access that information: > >https://www.mosis.com/vendors/view/tsmc/design-kits > >I don't need the actual routing, just a ball park size estimation, to be able to evaluate price structures > >Cheers > >Klaus
...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Thinking outside the box... producing elegant solutions.
On Wednesday, 8 March 2017 16:39:20 UTC+1, Jim Thompson  wrote:
> On Wed, 8 Mar 2017 06:31:45 -0800 (PST), Klaus Kragelund > <klauskvik@hotmail.com> wrote: > > >On Wednesday, March 8, 2017 at 2:04:27 PM UTC+1, Chris Jones wrote: > >> On 08/03/2017 22:15, klaus.kragelund@gmail.com wrote: > >> > Hey > >> > > >> > So I am looking into an ASIC to move general parts into an ASIC to reduce costs > >> > > >> > It would include opamp, comparator, transistors etc > >> > > >> > Before contacting a company that specialises in ASIC I would like to gain more insight > >> > > >> > I know IP libraries exist with building blocks like those mentioned above. > >> > > >> > How do I get started in getting libraries and a placement tool/program? > >> > > >> > Regards > >> > > >> > Klaus > >> > > >> > >> When I started doing ASICs I was surprised to find that (at least where > >> I worked) people don't tend to use standard libraries for analog > >> circuits. Nearly every op-amp, comparator, etc. on an ASIC would > >> generally be custom designed (by a person) for that particular task, or > >> adapted from one that the designer had used before on the same process. > >> Even if the schematic is borrowed from a previous circuit, very likely > >> the layout will be partially re-done (by a person) to fit into the shape > >> of the available space in the chip floorplan. > >> > >> I think the reason is that you would not get a lot of the supply > >> current, die area (cost) and performance advantages if you tried to make > >> a "one-size-fits-all" opamp instead of at least adjusting if not > >> re-designing each block to suit the needs. Probably someone will sell > >> you an "IP block" if you offer enough money, but you may be disappointed > >> with the result. Also, if you change fabrication process, the cells all > >> need to be re-designed or at least re-simulated (and then probably > >> re-designed). > >> > > > >I was told that the trend the last 5-10 years, is to have a standard library, locked to a given fabrication process. And that today the foundry would supply the library, with proven parts. That way the risk of going into a basic ASIC design would be low, and the design would most often work in the first go > > The big con >:-} >
Maybe, it's one of the biggest ASIC houses in denmark that said so :-) Cheers Klaus
On Wednesday, 8 March 2017 15:57:46 UTC+1, Chris Jones  wrote:
> On 09/03/2017 01:31, Klaus Kragelund wrote: > > On Wednesday, March 8, 2017 at 2:04:27 PM UTC+1, Chris Jones wrote: > >> On 08/03/2017 22:15, klaus.kragelund@gmail.com wrote: > >>> Hey > >>> > >>> So I am looking into an ASIC to move general parts into an ASIC > >>> to reduce costs > >>> > >>> It would include opamp, comparator, transistors etc > >>> > >>> Before contacting a company that specialises in ASIC I would like > >>> to gain more insight > >>> > >>> I know IP libraries exist with building blocks like those > >>> mentioned above. > >>> > >>> How do I get started in getting libraries and a placement > >>> tool/program? > >>> > >>> Regards > >>> > >>> Klaus > >>> > >> > >> When I started doing ASICs I was surprised to find that (at least > >> where I worked) people don't tend to use standard libraries for > >> analog circuits. Nearly every op-amp, comparator, etc. on an ASIC > >> would generally be custom designed (by a person) for that > >> particular task, or adapted from one that the designer had used > >> before on the same process. Even if the schematic is borrowed from > >> a previous circuit, very likely the layout will be partially > >> re-done (by a person) to fit into the shape of the available space > >> in the chip floorplan. > >> > >> I think the reason is that you would not get a lot of the supply > >> current, die area (cost) and performance advantages if you tried to > >> make a "one-size-fits-all" opamp instead of at least adjusting if > >> not re-designing each block to suit the needs. Probably someone > >> will sell you an "IP block" if you offer enough money, but you may > >> be disappointed with the result. Also, if you change fabrication > >> process, the cells all need to be re-designed or at least > >> re-simulated (and then probably re-designed). > >> > > > > I was told that the trend the last 5-10 years, is to have a standard > > library, locked to a given fabrication process. And that today the > > foundry would supply the library, with proven parts. That way the > > risk of going into a basic ASIC design would be low, and the design > > would most often work in the first go > Heh... The only IP block I ever recall purchasing (as opposed to > designing in-house) had a bug in it, requiring new masks. Make sure that > the contract with your "IP vendor" specifies who pays for the new masks. > With analog stuff you might get into good arguments about whether the > block is really working and you are misapplying it, or it doesn't meet > its specs. Also a lot of chips that don't work first time are due to > interconnection (e.g. resistance of long metal traces) not the circuit > blocks themselves. The circuit blocks would always be simulated in > detail, whereas the wiring sometimes isn't, as the extracted metal > resistances make the netlist much bigger and so harder for the > simulator. With high frequency stuff the inductance matters too, and > mutual inductance, and even today I doubt that is feasible to simulate > as a matter of course. > > > > > MOSIS has design kits, but I need an account before I can access that > > information: > > > > https://www.mosis.com/vendors/view/tsmc/design-kits > Usually these contain just the transistors, resistors, etc. and spice > models, and layout pcells and design rules. I never saw one with an > op-amp in it. >
OnSemi has some standard blocks: http://www.onsemi.com/PowerSolutions/content.do?id=17117 Cheers Klaus
On Wed, 8 Mar 2017 12:37:01 -0800 (PST), klaus.kragelund@gmail.com
wrote:

>On Wednesday, 8 March 2017 16:39:20 UTC+1, Jim Thompson wrote: >> On Wed, 8 Mar 2017 06:31:45 -0800 (PST), Klaus Kragelund >> <klauskvik@hotmail.com> wrote: >> >> >On Wednesday, March 8, 2017 at 2:04:27 PM UTC+1, Chris Jones wrote: >> >> On 08/03/2017 22:15, klaus.kragelund@gmail.com wrote: >> >> > Hey >> >> > >> >> > So I am looking into an ASIC to move general parts into an ASIC to reduce costs >> >> > >> >> > It would include opamp, comparator, transistors etc >> >> > >> >> > Before contacting a company that specialises in ASIC I would like to gain more insight >> >> > >> >> > I know IP libraries exist with building blocks like those mentioned above. >> >> > >> >> > How do I get started in getting libraries and a placement tool/program? >> >> > >> >> > Regards >> >> > >> >> > Klaus >> >> > >> >> >> >> When I started doing ASICs I was surprised to find that (at least where >> >> I worked) people don't tend to use standard libraries for analog >> >> circuits. Nearly every op-amp, comparator, etc. on an ASIC would >> >> generally be custom designed (by a person) for that particular task, or >> >> adapted from one that the designer had used before on the same process. >> >> Even if the schematic is borrowed from a previous circuit, very likely >> >> the layout will be partially re-done (by a person) to fit into the shape >> >> of the available space in the chip floorplan. >> >> >> >> I think the reason is that you would not get a lot of the supply >> >> current, die area (cost) and performance advantages if you tried to make >> >> a "one-size-fits-all" opamp instead of at least adjusting if not >> >> re-designing each block to suit the needs. Probably someone will sell >> >> you an "IP block" if you offer enough money, but you may be disappointed >> >> with the result. Also, if you change fabrication process, the cells all >> >> need to be re-designed or at least re-simulated (and then probably >> >> re-designed). >> >> >> > >> >I was told that the trend the last 5-10 years, is to have a standard library, locked to a given fabrication process. And that today the foundry would supply the library, with proven parts. That way the risk of going into a basic ASIC design would be low, and the design would most often work in the first go >> >> The big con >:-} >> > >Maybe, it's one of the biggest ASIC houses in denmark that said so :-) > >Cheers > >Klaus
I'm sure they'll be happy to take your money >:-} (I think you'll find that the "ASIC house" is fabless.) ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Thinking outside the box... producing elegant solutions.