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Spice Model for OpAmp Output Stage

Started by Jim Thompson July 5, 2016
<http://www.analog-innovations.com/DeviceModelsSubckts/OpAmpOutputStageWithFeatures.pdf>
		
                                        ...Jim Thompson
-- 
| James E.Thompson                                 |    mens     |
| Analog Innovations                               |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

             I'm looking for work... see my website.
Nice!

Tim

-- 
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Contract Design
Website: http://seventransistorlabs.com


"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in 
message news:hd1onbp1dhlfanvg6kn8677ojclgk5i5n2@4ax.com...
> <http://www.analog-innovations.com/DeviceModelsSubckts/OpAmpOutputStageWithFeatures.pdf> > > ...Jim Thompson > -- > | James E.Thompson | mens | > | Analog Innovations | et | > | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | > | San Tan Valley, AZ 85142 Skype: Contacts Only | | > | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | > | E-mail Icon at http://www.analog-innovations.com | 1962 | > > I'm looking for work... see my website.
On Tue, 5 Jul 2016 16:44:40 -0500, "Tim Williams"
<tiwill@seventransistorlabs.com> wrote:

>Nice! > >Tim
Thanks! I'll be posting the model as soon as I make sure no bugs lurk in the wings ;-) ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | JU$TICE HA$ BEEN $SERVED, MY A$$
"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in 
message news:vlbonbtvskelph2b047sn54295to61pr5q@4ax.com...
> Thanks! I'll be posting the model as soon as I make sure no bugs lurk > in the wings ;-)
Speaking of models -- I booted up your "behavioral logic" model last night, but it crawls slow as molasses, even just for one gate. And makes divide-by-zero errors around feedback networks (like a simple 2 x NOR R-S f/f). Cranking the sim settings as detailed as I dare go, I find the output risetime is under 200ps (over, at most, three time steps)... what the heck? I realize it's unfinished, but gee, I thought your analog models were famously continuous... :^) FYI. Tim -- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com
On Thu, 7 Jul 2016 08:20:46 -0500, "Tim Williams"
<tiwill@seventransistorlabs.com> wrote:

>"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in >message news:vlbonbtvskelph2b047sn54295to61pr5q@4ax.com... >> Thanks! I'll be posting the model as soon as I make sure no bugs lurk >> in the wings ;-) > >Speaking of models -- I booted up your "behavioral logic" model last night, >but it crawls slow as molasses, even just for one gate. And makes >divide-by-zero errors around feedback networks (like a simple 2 x NOR R-S >f/f). Cranking the sim settings as detailed as I dare go, I find the output >risetime is under 200ps (over, at most, three time steps)... what the heck? > >I realize it's unfinished, but gee, I thought your analog models were >famously continuous... :^) > >FYI. > >Tim
Those are the old way... note the dates... I have better ways now... I'm always improving my modeling >:-} (Don't use the FUNC_... versions; and set "TP" to a rational value.)) "crawls slow as molasses" sounds like you are using LTspice which is famously convergence cantankerous on models that scream elsewhere. Try "Alternate Solver" plus add "startup" to your .TRAN statement... may help, may not. On an R-S flop you may also need to force an pintail state. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Hillary criticizes Trump's business acumen... air tight contracts where he can't lose money on the deal. Yet Hillary sells the US itself down the river simply for contri- butions to the Clinton "Foundation".
On Thu, 07 Jul 2016 08:36:42 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:

>On Thu, 7 Jul 2016 08:20:46 -0500, "Tim Williams" ><tiwill@seventransistorlabs.com> wrote: > >>"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in >>message news:vlbonbtvskelph2b047sn54295to61pr5q@4ax.com... >>> Thanks! I'll be posting the model as soon as I make sure no bugs lurk >>> in the wings ;-) >> >>Speaking of models -- I booted up your "behavioral logic" model last night, >>but it crawls slow as molasses, even just for one gate. And makes >>divide-by-zero errors around feedback networks (like a simple 2 x NOR R-S >>f/f). Cranking the sim settings as detailed as I dare go, I find the output >>risetime is under 200ps (over, at most, three time steps)... what the heck? >> >>I realize it's unfinished, but gee, I thought your analog models were >>famously continuous... :^) >> >>FYI. >> >>Tim > >Those are the old way... note the dates... I have better ways now... >I'm always improving my modeling >:-} > >(Don't use the FUNC_... versions; and set "TP" to a rational value.)) > >"crawls slow as molasses" sounds like you are using LTspice which is >famously convergence cantankerous on models that scream elsewhere. > >Try "Alternate Solver" plus add "startup" to your .TRAN statement... >may help, may not. > >On an R-S flop you may also need to force an pintail state.
Spell checkers :-( should be "initial" ^^^^^^^ ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Hillary criticizes Trump's business acumen... air tight contracts where he can't lose money on the deal. Yet Hillary sells the US itself down the river simply for contri- butions to the Clinton "Foundation".
On 7/7/2016 11:16 AM, Jim Thompson wrote:
> On Thu, 07 Jul 2016 08:36:42 -0700, Jim Thompson > <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: > >> On Thu, 7 Jul 2016 08:20:46 -0500, "Tim Williams" >> <tiwill@seventransistorlabs.com> wrote: >> >>> "Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in >>> message news:vlbonbtvskelph2b047sn54295to61pr5q@4ax.com... >>>> Thanks! I'll be posting the model as soon as I make sure no bugs lurk >>>> in the wings ;-) >>> >>> Speaking of models -- I booted up your "behavioral logic" model last night, >>> but it crawls slow as molasses, even just for one gate. And makes >>> divide-by-zero errors around feedback networks (like a simple 2 x NOR R-S >>> f/f). Cranking the sim settings as detailed as I dare go, I find the output >>> risetime is under 200ps (over, at most, three time steps)... what the heck? >>> >>> I realize it's unfinished, but gee, I thought your analog models were >>> famously continuous... :^) >>> >>> FYI. >>> >>> Tim >> >> Those are the old way... note the dates... I have better ways now... >> I'm always improving my modeling >:-} >> >> (Don't use the FUNC_... versions; and set "TP" to a rational value.)) >> >> "crawls slow as molasses" sounds like you are using LTspice which is >> famously convergence cantankerous on models that scream elsewhere.
So, use only the application Thompson uses? I thought LTSpice was pretty much the defacto standard.
>> Try "Alternate Solver" plus add "startup" to your .TRAN statement... >> may help, may not.
Not worth the effort to learn if "may help" is successful.
>> On an R-S flop you may also need to force an pintail state.
Goody! Another setup requirement.
> > Spell checkers :-( should be "initial" ^^^^^^^ > > ...Jim Thompson >
My spell checker is not brain-dead like yours. I couldn't find a way to come up with pintail by misspelling initial.
"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in 
message news:5ctsnbt8ommqj3gksmi41cv9ofm9n338ji@4ax.com...
> (Don't use the FUNC_... versions; and set "TP" to a rational value.))
Well, I can't /not/ use them, as the B_INPUT_... versions are just pin conditioning. (Which does go faster, but doesn't do anything beyond sharpen the input. And really, still doesn't go fast enough to be useful in a modest sized circuit.)
> "crawls slow as molasses" sounds like you are using LTspice which is > famously convergence cantankerous on models that scream elsewhere.
Worse... Altium. :-P But unless PSPICE has diverged significantly from 3F5 and XSPICE in its solver, it shouldn't be very different.
> Try "Alternate Solver" plus add "startup" to your .TRAN statement... > may help, may not.
Tried everything from TRAP to GEAR 6. RELTOL up to 0.01 (ack), other things looser, RSHUNT and GMIN up and down (not that I would expect those to make a difference here), no breakthroughs. Only thing that helped startup was supply ramping, but the rest of the sim takes seconds per edge (admittedly, on my slow machine, and the solver is single core besides). And like I said, the risetime is undefined, seemingly being as short as possible. Do you have those TANH's wired in a feedback circuit? It's perfectly possible to start with continuous, nonlinear functions and end up with discontinuous functions... The lack of time dependency is a big problem, physically speaking. Can you jam a capacitor into that loop, or something? I'll take a closer look and see if that's what's going on... Related: is it possible Altium's PSPICE syntax isn't in the right order, and feedback is positive somewhere? Normally, you'd use B sources and V={...} or I={...} expressions, whereas you've got E VALUE {...} or G VALUE {...} sources (as is traditional for PSPICE). Tim -- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com
On Thu, 7 Jul 2016 19:18:12 -0500, "Tim Williams"
<tiwill@seventransistorlabs.com> wrote:

>"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in >message news:5ctsnbt8ommqj3gksmi41cv9ofm9n338ji@4ax.com... >> (Don't use the FUNC_... versions; and set "TP" to a rational value.)) > >Well, I can't /not/ use them, as the B_INPUT_... versions are just pin >conditioning. (Which does go faster, but doesn't do anything beyond sharpen >the input. And really, still doesn't go fast enough to be useful in a >modest sized circuit.) > >> "crawls slow as molasses" sounds like you are using LTspice which is >> famously convergence cantankerous on models that scream elsewhere. > >Worse... Altium. :-P But unless PSPICE has diverged significantly from 3F5 >and XSPICE in its solver, it shouldn't be very different. > >> Try "Alternate Solver" plus add "startup" to your .TRAN statement... >> may help, may not. > >Tried everything from TRAP to GEAR 6. RELTOL up to 0.01 (ack), other things >looser, RSHUNT and GMIN up and down (not that I would expect those to make a >difference here), no breakthroughs. > >Only thing that helped startup was supply ramping, but the rest of the sim >takes seconds per edge (admittedly, on my slow machine, and the solver is >single core besides). > >And like I said, the risetime is undefined, seemingly being as short as >possible.
You must be doing something terribly wrong.
> >Do you have those TANH's wired in a feedback circuit? It's perfectly >possible to start with continuous, nonlinear functions and end up with >discontinuous functions...
How do you do that ?>:-}
> >The lack of time dependency is a big problem, physically speaking. Can you >jam a capacitor into that loop, or something?
Duh! There is a capacitor there.
> >I'll take a closer look and see if that's what's going on... > >Related: is it possible Altium's PSPICE syntax isn't in the right order, and >feedback is positive somewhere? > >Normally, you'd use B sources and V={...} or I={...} expressions, whereas >you've got E VALUE {...} or G VALUE {...} sources (as is traditional for >PSPICE). > >Tim
I have no experience with Altium. So I have no way to diagnose the speed issues. Most every simulator recognizes PSpice syntax... even TopSpice >:-} I have D-flops simulating here... simulating about as fast as you can blink. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Hillary criticizes Trump's business acumen... air tight contracts where he can't lose money on the deal. Yet Hillary (aka Judas Chappaqua) sells the US itself down the river simply for contributions to the Clinton "Foundation".
"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in 
message news:mnstnb9au38hcl0ebe4496j7dabftevo7h@4ax.com...
> You must be doing something terribly wrong.
The SUBCKT is verbatim, so it ain't me. I could post the project netlist....but you wouldn't look at it, because there's no need to, and it wouldn't do any good anyway. Expanding it out long hand gives this, http://seventransistorlabs.com/Images/BehNOT1.png for which I discovered they wrote the fucking TANH function wrong -- it produces Inf for arguments over ~15k. Thanks, Altium... Putting a limit into the TANH functions fixed the error (and probably would fix the other errors I've seen, if suitably placed), but I've now broken the function, so I probably fucked up a sign or something... Tim -- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com