Jim Thompson wrote...> > Winfield Hill wrote: >> SPA11N80C3.txt >> from PSpice_CoolMOS-C3_800V.lib >> >> ****** >> .SUBCKT SPA11N80C3_L0 drain gate source >> Lg gate g1 7n >> Ld drain d1 3n >> Ls source s1 7n > [snip] >> R_R001 a b 1 >> V_sense2 b fpar2 0 >> E_E001 fpar2 0 VALUE {-enable_diode*ta/td*I(V_sense)} >> >> .ENDS >> *$ >> ************************ > > How well does that run on LTspice ?>:-}Hah, I thought you had PSpice. I keep thinking about getting a copy, given constant struggles. -- Thanks, - Win
MOSFET Coss(er), Coss(tr), Eoss, etc
Started by ●April 12, 2016
Reply by ●April 12, 20162016-04-12
Reply by ●April 12, 20162016-04-12
On 12 Apr 2016 18:13:08 -0700, Winfield Hill <hill@rowland.harvard.edu> wrote:>Jim Thompson wrote... >> >> Winfield Hill wrote: >>> SPA11N80C3.txt >>> from PSpice_CoolMOS-C3_800V.lib >>> >>> ****** >>> .SUBCKT SPA11N80C3_L0 drain gate source >>> Lg gate g1 7n >>> Ld drain d1 3n >>> Ls source s1 7n >> [snip] >>> R_R001 a b 1 >>> V_sense2 b fpar2 0 >>> E_E001 fpar2 0 VALUE {-enable_diode*ta/td*I(V_sense)} >>> >>> .ENDS >>> *$ >>> ************************ >> >> How well does that run on LTspice ?>:-} > > Hah, I thought you had PSpice. I keep thinking > about getting a copy, given constant struggles.I design on PSpice... by client requirements, my models must run on LTspice... thus my back-handed comment >:-} ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | The touchstone of liberalism is intolerance
Reply by ●April 12, 20162016-04-12
Jim Thompson wrote...> > I design on PSpice... by client requirements, > my models must run on LTspice...Whao, cheap-ass clients! -- Thanks, - Win
Reply by ●April 13, 20162016-04-13
On 12 Apr 2016 19:29:11 -0700, Winfield Hill <hill@rowland.harvard.edu> wrote:>Jim Thompson wrote... >> >> I design on PSpice... by client requirements, >> my models must run on LTspice... > > Whao, cheap-ass clients!Actually not the _client_, the client's _customers_ use LTspice. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | The touchstone of liberalism is intolerance
Reply by ●April 13, 20162016-04-13
"Winfield Hill" <hill@rowland.harvard.edu> wrote in message news:nek3l40129c@drn.newsguy.com...>> Do the Spice models properly model these >> "highly-nonlinear capacitances"? > > I would have said, no, but I found an example to > the contrary. This Infineon link has a 49-page > article by Anders Lind, with "support material". > http://www.infineon.com/dgdl/Infineon-Application+Note+Detailed+MOSFET+Behavioral+Analysis-AN-v01_00-EN.zip?fileId=5546d4624e24005f014e2a32e3f86291 > > [What an insane link address!] > > In that you'll find a spreadsheet with 800 Coss > data points for SPA11N80C3 super-junction MOSFET. > These Coss data points were extracted into Excel > from the part's SPICE model, and they look petty > close to the datasheet plot. The article has > details. The SPICE model will be in my next post.I've got you one better ... if only in one specific case, I guess. Some time ago, I was looking at the STW70N60M2 and related parts in the family. I put it all in a spreadsheet, but it's really rather messy to release, so I'll speak to a screenshot instead: http://seventransistorlabs.com/Images/STW70N60_Capacitance_Worksheet.png My interest was to create a SPICE model of the '70. The '24 (24A class) was available. Surely it's a simple matter of scaling up the terminal currents proportionally -- more or less? So let's see how the 24 works. Hmm. Turns out, the SPICE model is in error by about 150%! This is illustrated as the blue curve in the energy plot (left middle), and the capacitance plot (right middle). Meanwhile, I used SPICE's junction capacitance formula to approximate Coss, on whatever basis I can fit it. This resulted in the blue curves on the top two plots: the energy is best-fit (by eye, to a screenshot of the model; I didn't bother with curve extraction at the time), while the capacitance is pretty reasonably close, except for that bizarre hiccup at 10-15V. What the hell is up with that? Do they *check* these plots? Aside: On a separate occasion, I've measured the STP19NM50N, http://seventransistorlabs.com/Images/STP19NM50N_Cdss_Overlay.jpg and here it's plotted over the datasheet graph. See how it tanks like that? Yeah, the real thing doesn't tank like that. I suspect it's a plotting error (bad use of Bezier objects??), but crap like this /shouldn't make it into datasheets/. So I suspect the energy curve isn't bad, and my model is probably a good fit to the real part. Back to the 24A part's SPICE model. I set up a SPICE "test bench" to directly read off E(V) and C(V), and compared my models (using diodes of appropriate CJO, M and VJ) to the SPICE models. This is where I obtained the 24's erroneous curves, and corrected them. In case you were curious, ST wasn't interested in my fix for their crummy model. ;-) Finally, the bottom two plots show charging curves. These are generated by taking 1000 points (it's a big spreadsheet..) and solving the difference equation for the appropriate equivalent circuit. The three sets of curves are for the '70 (hand-fitted), the '24 (from SPICE), and then the '70 model scaled to the '24's datasheet value (which is also the best-fit red curve in the middle graphs, so indeed this appears to be a geometry scaling only). The "R (us)" curves are the resistor-charge-to-80% value. As you can see, this starts much the same as the CCS method, but has a terribly long tail, so tends to unfairly weight the capacitance at high voltages, which will give a low estimate. The "CCS (us)" curves, of course, are simply by CCS alone. The OP circuit will generate this waveform, backwards of course. In fuchsia, "ramp (us)" was only computed for the '70, and uses a linear current ramp to approximate an inductance. As you can see, it's practically diode recovery: it sits there, below 20V, for a long-ass time, then bolts like a spooked horse! The final output numbers (from these curves) are given near the input parameters: Res = resistive equivalent (100kohm resistor to +600V; equivalent is based on the time taken to 80%, or 480V) CCS = constant current time equivalent Cdss E_eff = energy equivalent ramp eff = inductive hard switching equivalent (my method). As you can see, the equivalents are kind of all over the place; CCS makes the largest equivalent, while energy is the lowest. If you see one but not the other, you can probably guess a datasheet is trying to sell you something. The model data is also present here: Cpar is fixed capacitance, CJO, m and VJ are diode parameters, and both models have two diodes in parallel (allowing two VJ breakpoints). Obviously, the one that's 0nF doesn't count, so a good fit was had with just the one. The m values are quite large (ultrahyperabrupt?), whereas some SPICE engines limit it to 0.9 or something like that, for diodes. (Does anyone have any clue why? It's a completely arbitrary and superfluous limit!) So I also built a nonlinear dependent equivalent, which works fine on any SPICE. Tim -- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com
Reply by ●April 13, 20162016-04-13
