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Design play/challenge: Phase Shift PWM

Started by Tim Williams February 16, 2016
It finally occurred to me, I've been using these things for so long, yet 
never built my own.  And therefore, never fully understood nor trusted 
what the documentation says (or hides!).

So here's the challenge:

Design a phase shift PWM controller.

Example applications:
Full bridge forward converter (SMPS, UPS, motor control, etc.)
Frequency-locked, resonant systems (resonant SMPS, induction heating): PWM 
provides linear, continuous power control, independent of frequency.

Requirements:
- Constant 50% +/- 3% duty cycle per output (complementary outputs with 
dead time for full bridge gate driving are easily added on)
- Variable frequency, using a control voltage/current, or single variable 
resistor (duty cycle and phase shift remain ~constant)
- Variable phase shift, from a control voltage input
- Phase shift adjustable from 0-180 degrees or more (or 180-360, same 
thing)
- Must use continuous-time methods, not sampled/divided.  (Or, ENOB > 12, 
which will rule out most digital methods for rather modest output 
frequencies anyway.)
- Uses discrete transistors, comparators, logic gates (no more than MSI), 
that sort of thing.  ("Transistors" includes the hollow FET kinds, if you 
like.)

Homework:
The basic prototype is an astable multivibrator (makes 50% duty cycle 
reference clock), followed by a delay and ramp circuit.  The tricky parts 
are:
- The multivibrator has to be timed from the same global (frequency 
control) bias current (e.g., using a current steering triangle-wave 
oscillator, like you'd find in an analog function generator)
- Essentially, an oscilloscope's triggered sweep circuit is required for 
the delay generator.  Multivibrator triggers it on rising edge; cap 
charges for almost the whole cycle time (again, charged by the global bias 
current), making a sawtooth wave; comparator picks a point along that 
ramp, thus implementing the delay.
- Thus, delay is adjustable anywhere along the sawtooth ramp, which might 
be, say, 10-350 degrees.  It can't go quite to zero due to delay (which 
could be subtracted out by delaying the original clock source), and can't 
quite go to 360 because of reset time and trigger window.
- To square up the output, a 50% duty cycle generator is needed, which can 
be: injection locked multivibrator (otherwise matched to the clock 
multivibrator); or another triggered delay generator with the required 
slope; or:
- Or instead of using a triggered sweep for the delay generator, the clock 
multivibrator can be a sawtooth type.  Use one comparator to bisect the 
sawtooth, yielding the non-delayed 50% output.  Use another comparator to 
generate the delayed trigger (the multivibrator slope sets range).  A 
triggered delay generator is still required, to produce the delayed 50% 
duty output.
- Symmetry bonus: you can start with a clock pulse, and run two triggered 
delay generators, where one delay control voltage is inverse of the other. 
Each one only needs 90 degrees of adjustable range.  This probably incurs 
more hardware than the lopsided-phase version, though.

Possibly useful: 50% duty can be obtained by dividing a square wave in 
half (type T flip-flop), without having to match capacitors.  But half the 
frequency means twice the phase shift, and if the flip-flops ever end up 
out of sync, phase suddenly inverts.  May be tricky to use.

The basic breadboarding of this ("RTA level") description used an LM339, 
5/6ths CD40106, 1/2 CD4013, and five transistors (true, I could've better 
squared up an edge using /Seven Transistors/..).  On a good old fashioned 
solderless breadboard, that's a full row of stuff.  Very messy!

So if I've captured your fancy at all... Simplify it, if you think you 
can!  ;-)

(Special note to you in the monolithic peanut-gallery: yes, I know you can 
make all of this, and more, in a tiny 1mm chip.  Unless you have one 
available that can be bought for less than the parts listed above, STFU. 
:-P )

Tim

-- 
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Contract Design
Website: http://seventransistorlabs.com 


On 16.2.16 21:56, Tim Williams wrote:
> It finally occurred to me, I've been using these things for so long, yet > never built my own. And therefore, never fully understood nor trusted > what the documentation says (or hides!). > > So here's the challenge: > > Design a phase shift PWM controller. > > Example applications: > Full bridge forward converter (SMPS, UPS, motor control, etc.) > Frequency-locked, resonant systems (resonant SMPS, induction heating): PWM > provides linear, continuous power control, independent of frequency. > > Requirements: > - Constant 50% +/- 3% duty cycle per output (complementary outputs with > dead time for full bridge gate driving are easily added on) > - Variable frequency, using a control voltage/current, or single variable > resistor (duty cycle and phase shift remain ~constant) > - Variable phase shift, from a control voltage input > - Phase shift adjustable from 0-180 degrees or more (or 180-360, same > thing) > - Must use continuous-time methods, not sampled/divided. (Or, ENOB > 12, > which will rule out most digital methods for rather modest output > frequencies anyway.) > - Uses discrete transistors, comparators, logic gates (no more than MSI), > that sort of thing. ("Transistors" includes the hollow FET kinds, if you > like.) > > Homework: > The basic prototype is an astable multivibrator (makes 50% duty cycle > reference clock), followed by a delay and ramp circuit. The tricky parts > are: > - The multivibrator has to be timed from the same global (frequency > control) bias current (e.g., using a current steering triangle-wave > oscillator, like you'd find in an analog function generator) > - Essentially, an oscilloscope's triggered sweep circuit is required for > the delay generator. Multivibrator triggers it on rising edge; cap > charges for almost the whole cycle time (again, charged by the global bias > current), making a sawtooth wave; comparator picks a point along that > ramp, thus implementing the delay. > - Thus, delay is adjustable anywhere along the sawtooth ramp, which might > be, say, 10-350 degrees. It can't go quite to zero due to delay (which > could be subtracted out by delaying the original clock source), and can't > quite go to 360 because of reset time and trigger window. > - To square up the output, a 50% duty cycle generator is needed, which can > be: injection locked multivibrator (otherwise matched to the clock > multivibrator); or another triggered delay generator with the required > slope; or: > - Or instead of using a triggered sweep for the delay generator, the clock > multivibrator can be a sawtooth type. Use one comparator to bisect the > sawtooth, yielding the non-delayed 50% output. Use another comparator to > generate the delayed trigger (the multivibrator slope sets range). A > triggered delay generator is still required, to produce the delayed 50% > duty output. > - Symmetry bonus: you can start with a clock pulse, and run two triggered > delay generators, where one delay control voltage is inverse of the other. > Each one only needs 90 degrees of adjustable range. This probably incurs > more hardware than the lopsided-phase version, though. > > Possibly useful: 50% duty can be obtained by dividing a square wave in > half (type T flip-flop), without having to match capacitors. But half the > frequency means twice the phase shift, and if the flip-flops ever end up > out of sync, phase suddenly inverts. May be tricky to use. > > The basic breadboarding of this ("RTA level") description used an LM339, > 5/6ths CD40106, 1/2 CD4013, and five transistors (true, I could've better > squared up an edge using /Seven Transistors/..). On a good old fashioned > solderless breadboard, that's a full row of stuff. Very messy! > > So if I've captured your fancy at all... Simplify it, if you think you > can! ;-) > > (Special note to you in the monolithic peanut-gallery: yes, I know you can > make all of this, and more, in a tiny 1mm chip. Unless you have one > available that can be bought for less than the parts listed above, STFU. > :-P ) > > Tim >
Make an analytic (sine+cosine) sine wave oscillator and combine the sine and cosine outputs with a two-phase resolver for phase shift. Using a Scott T-transformer, even a three phase synchro will do. -- -TV
On Tuesday, February 16, 2016 at 8:56:53 PM UTC+1, Tim Williams wrote:
> It finally occurred to me, I've been using these things for so long, yet > never built my own. And therefore, never fully understood nor trusted > what the documentation says (or hides!). > > So here's the challenge: > > Design a phase shift PWM controller. > > Example applications: > Full bridge forward converter (SMPS, UPS, motor control, etc.) > Frequency-locked, resonant systems (resonant SMPS, induction heating): PWM > provides linear, continuous power control, independent of frequency. > > Requirements: > - Constant 50% +/- 3% duty cycle per output (complementary outputs with > dead time for full bridge gate driving are easily added on) > - Variable frequency, using a control voltage/current, or single variable > resistor (duty cycle and phase shift remain ~constant) > - Variable phase shift, from a control voltage input > - Phase shift adjustable from 0-180 degrees or more (or 180-360, same > thing) > - Must use continuous-time methods, not sampled/divided. (Or, ENOB > 12, > which will rule out most digital methods for rather modest output > frequencies anyway.) > - Uses discrete transistors, comparators, logic gates (no more than MSI), > that sort of thing. ("Transistors" includes the hollow FET kinds, if you > like.) > > Homework: > The basic prototype is an astable multivibrator (makes 50% duty cycle > reference clock), followed by a delay and ramp circuit. The tricky parts > are: > - The multivibrator has to be timed from the same global (frequency > control) bias current (e.g., using a current steering triangle-wave > oscillator, like you'd find in an analog function generator) > - Essentially, an oscilloscope's triggered sweep circuit is required for > the delay generator. Multivibrator triggers it on rising edge; cap > charges for almost the whole cycle time (again, charged by the global bias > current), making a sawtooth wave; comparator picks a point along that > ramp, thus implementing the delay. > - Thus, delay is adjustable anywhere along the sawtooth ramp, which might > be, say, 10-350 degrees. It can't go quite to zero due to delay (which > could be subtracted out by delaying the original clock source), and can't > quite go to 360 because of reset time and trigger window. > - To square up the output, a 50% duty cycle generator is needed, which can > be: injection locked multivibrator (otherwise matched to the clock > multivibrator); or another triggered delay generator with the required > slope; or: > - Or instead of using a triggered sweep for the delay generator, the clock > multivibrator can be a sawtooth type. Use one comparator to bisect the > sawtooth, yielding the non-delayed 50% output. Use another comparator to > generate the delayed trigger (the multivibrator slope sets range). A > triggered delay generator is still required, to produce the delayed 50% > duty output. > - Symmetry bonus: you can start with a clock pulse, and run two triggered > delay generators, where one delay control voltage is inverse of the other. > Each one only needs 90 degrees of adjustable range. This probably incurs > more hardware than the lopsided-phase version, though. > > Possibly useful: 50% duty can be obtained by dividing a square wave in > half (type T flip-flop), without having to match capacitors. But half the > frequency means twice the phase shift, and if the flip-flops ever end up > out of sync, phase suddenly inverts. May be tricky to use. > > The basic breadboarding of this ("RTA level") description used an LM339, > 5/6ths CD40106, 1/2 CD4013, and five transistors (true, I could've better > squared up an edge using /Seven Transistors/..). On a good old fashioned > solderless breadboard, that's a full row of stuff. Very messy! > > So if I've captured your fancy at all... Simplify it, if you think you > can! ;-) > > (Special note to you in the monolithic peanut-gallery: yes, I know you can > make all of this, and more, in a tiny 1mm chip. Unless you have one > available that can be bought for less than the parts listed above, STFU. > :-P ) >
I would like to challenge not using a micro. If you use a micro with 1Msa 12 bit ADC and feed that with DMA to the frequency setting register, wouldn't that be possible. Even if you have to let the micro do nothing else than this task? Cheers Klaus
"Klaus Kragelund"  wrote in message 
news:0bfe4fd0-2d03-4c61-ba03-cce6341abc46@googlegroups.com...
> I would like to challenge not using a micro. If you use a micro > with 1Msa 12 bit ADC and feed that with DMA to the frequency > setting register, wouldn't that be possible. Even if you have to > let the micro do nothing else than this task?
Still won't meet the continuity requirement. Maybe not bad if you have one with a vernier timer. But anyway, you aren't learning anything, which defeats the purpose of a design _play_. ;) Tim -- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com
On a sunny day (Tue, 16 Feb 2016 14:05:20 -0800 (PST)) it happened Klaus
Kragelund <klauskvik@hotmail.com> wrote in
<0bfe4fd0-2d03-4c61-ba03-cce6341abc46@googlegroups.com>:

>I would like to challenge not using a micro. If you use a micro with 1Msa 12 bit ADC and feed that with DMA to the frequency >setting register, wouldn't that be possible. Even if you have to let the micro do nothing else than this task? > >Cheers > >Klaus
Yep, 2$ PIC can do all that.
On 16/02/2016 19:56, Tim Williams wrote:
> It finally occurred to me, I've been using these things for so long, yet > never built my own. And therefore, never fully understood nor trusted > what the documentation says (or hides!). > > So here's the challenge: > > Design a phase shift PWM controller. > > Example applications: > Full bridge forward converter (SMPS, UPS, motor control, etc.) > Frequency-locked, resonant systems (resonant SMPS, induction heating): PWM > provides linear, continuous power control, independent of frequency. > > Requirements: > - Constant 50% +/- 3% duty cycle per output (complementary outputs with > dead time for full bridge gate driving are easily added on) > - Variable frequency, using a control voltage/current, or single variable > resistor (duty cycle and phase shift remain ~constant) > - Variable phase shift, from a control voltage input > - Phase shift adjustable from 0-180 degrees or more (or 180-360, same > thing) > - Must use continuous-time methods, not sampled/divided. (Or, ENOB > 12, > which will rule out most digital methods for rather modest output > frequencies anyway.) > - Uses discrete transistors, comparators, logic gates (no more than MSI), > that sort of thing. ("Transistors" includes the hollow FET kinds, if you > like.) > > Homework: > The basic prototype is an astable multivibrator (makes 50% duty cycle > reference clock), followed by a delay and ramp circuit. The tricky parts > are: > - The multivibrator has to be timed from the same global (frequency > control) bias current (e.g., using a current steering triangle-wave > oscillator, like you'd find in an analog function generator) > - Essentially, an oscilloscope's triggered sweep circuit is required for > the delay generator. Multivibrator triggers it on rising edge; cap > charges for almost the whole cycle time (again, charged by the global bias > current), making a sawtooth wave; comparator picks a point along that > ramp, thus implementing the delay. > - Thus, delay is adjustable anywhere along the sawtooth ramp, which might > be, say, 10-350 degrees. It can't go quite to zero due to delay (which > could be subtracted out by delaying the original clock source), and can't > quite go to 360 because of reset time and trigger window. > - To square up the output, a 50% duty cycle generator is needed, which can > be: injection locked multivibrator (otherwise matched to the clock > multivibrator); or another triggered delay generator with the required > slope; or: > - Or instead of using a triggered sweep for the delay generator, the clock > multivibrator can be a sawtooth type. Use one comparator to bisect the > sawtooth, yielding the non-delayed 50% output. Use another comparator to > generate the delayed trigger (the multivibrator slope sets range). A > triggered delay generator is still required, to produce the delayed 50% > duty output. > - Symmetry bonus: you can start with a clock pulse, and run two triggered > delay generators, where one delay control voltage is inverse of the other. > Each one only needs 90 degrees of adjustable range. This probably incurs > more hardware than the lopsided-phase version, though. > > Possibly useful: 50% duty can be obtained by dividing a square wave in > half (type T flip-flop), without having to match capacitors. But half the > frequency means twice the phase shift, and if the flip-flops ever end up > out of sync, phase suddenly inverts. May be tricky to use. > > The basic breadboarding of this ("RTA level") description used an LM339, > 5/6ths CD40106, 1/2 CD4013, and five transistors (true, I could've better > squared up an edge using /Seven Transistors/..). On a good old fashioned > solderless breadboard, that's a full row of stuff. Very messy! > > So if I've captured your fancy at all... Simplify it, if you think you > can! ;-) > > (Special note to you in the monolithic peanut-gallery: yes, I know you can > make all of this, and more, in a tiny 1mm chip. Unless you have one > available that can be bought for less than the parts listed above, STFU. > :-P ) > > Tim >
Here is the way I'd start doing it using jelly-bean parts: <https://www.dropbox.com/s/37htfm6qdv6gobi/TimWilliamsChallengeFeb16.pdf> I haven't included the deadtime/overlap requirement which if only a few 00's ns could be RCD delays in the gate drivers. The frequency can be tuned by one resistor. Duty cycle is 50% guaranteed by flip-flops. With more thought I might cross-couple the flip-flops to prevent the phase flip-over risk you mention. Not yet sure this even works! but looks easy enough to spice or breadboard. How did you do it? piglet
Il giorno marted&#2013265932; 16 febbraio 2016 20:56:53 UTC+1, Tim Williams ha scritto:
> It finally occurred to me, I've been using these things for so long, yet > never built my own. And therefore, never fully understood nor trusted > what the documentation says (or hides!). > > So here's the challenge: > > Design a phase shift PWM controller.
Freescale 56F84xxx DSCs have it: http://www.nxp.com/products/microcontrollers-and-processors/more-processors/dsp-dsc/dscs:DSC_HOME probably also other of the family. Bye Jack
"piglet"  wrote in message news:na1jf5$b59$1@dont-email.me...
>Here is the way I'd start doing it using jelly-bean parts: > ><https://www.dropbox.com/s/37htfm6qdv6gobi/TimWilliamsChallengeFeb16.pdf> > >I haven't included the deadtime/overlap requirement which if only a few >00's ns could be RCD delays in the gate drivers. The frequency can be >tuned by one resistor. Duty cycle is 50% guaranteed by flip-flops. > >With more thought I might cross-couple the flip-flops to prevent the >phase flip-over risk you mention. Not yet sure this even works! but looks >easy enough to spice or breadboard. > >How did you do it?
Hmm, delay comparator only covers half a wave at the initial clock, so 1/4 wave at the output, no? In other words, only about 90 degrees of range, not 180? My first attempt did: Sawtooth osc Comparator (sawtooth + fixed threshold) for 50% duty (non-delayed output) Comparator (sawtooth + adj threshold) for adjustable delay (say 10-350 degrees) Triggered ramp generator (aka monostable timer) for 50% duty (delayed output). http://seventransistorlabs.com/Images/PSPWM.png The crossed-out part was as-built, then I realized I could skip the runt-pulse hack with the D f/f (probably). Which can be further simplified to one R-S f/f and a couple gates (the comparator gets hysteresis, to serve as the "slave" f/f in the master-slave D structure), but it's still kind of a lot of logic, or transistors, however you cut it. Not very well optimized. Not very well engineered, you might say! (Oh, and it's not shown with variable frequency, but the current sources are equal, so that is easily included, by anyone "skilled in the art" as they say.) Tim -- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com
On 17/02/2016 16:43, Tim Williams wrote:
> > Hmm, delay comparator only covers half a wave at the initial clock, so 1/4 > wave at the output, no? In other words, only about 90 degrees of range, > not 180? >
No, I think mine might work. At -ve Verr the outputs are tending to be in-phase, at 0v Verr the outputs are 50% out of phase (or 90deg phase shift if you prefer) and at +ve Verr the outputs are tending to be in anti-phase (or 180deg shift)? I think because the flip flop divide-by-two applys to both channels the phase is preserved, or have I blundered? Might have a go at analysis or LT Spice later. Thanks for showing me your circuit, will need to study it. piglet
On Wed, 17 Feb 2016 03:17:02 -0800 (PST), jack4747@gmail.com wrote:

>Il giorno marted&#2013265932; 16 febbraio 2016 20:56:53 UTC+1, Tim Williams ha scritto: >> It finally occurred to me, I've been using these things for so long, yet >> never built my own. And therefore, never fully understood nor trusted >> what the documentation says (or hides!). >> >> So here's the challenge: >> >> Design a phase shift PWM controller. > >Freescale 56F84xxx DSCs have it: > >http://www.nxp.com/products/microcontrollers-and-processors/more-processors/dsp-dsc/dscs:DSC_HOME > >probably also other of the family. > >Bye Jack
Seems so weird to see Freescale/Motorola parts on the NXP websiite ! boB