I tried to reproduce fig.22, p.17 of the datasheet but the output voltage is always about +13 V The VCO alone (like fig.12) works up to about 1 MHz provided the input voltage is in the [-12:0] range. Has anybody a working schematics? Regards, -- Jean-Pierre Coulon
Frequency-to-voltage converter, PLL with an AD650
Started by ●April 21, 2015
Reply by ●April 22, 20152015-04-22
Jean-Pierre Coulon wrote...> > I tried to reproduce fig.22, p.17 of the datasheet but the output > voltage is always about +13 V > > The VCO alone (like fig.12) works up to about 1 MHz provided the > input voltage is in the [-12:0] range.Do you suspect it's locked out of range? Your Vin is into a Fig 20 ckt? You could try increasing the 40k resistor. -- Thanks, - Win
Reply by ●April 22, 20152015-04-22
On 04/21/2015 07:32 AM, Jean-Pierre Coulon wrote:> I tried to reproduce fig.22, p.17 of the datasheet but the output > voltage is always about +13 V > > The VCO alone (like fig.12) works up to about 1 MHz provided the input > voltage is in the [-12:0] range. Has anybody a working schematics? > > Regards,That's a really crappy circuit. Besides using a boutique FET and ancient bipolar logic, it isn't guaranteed to work over the full datasheet range of threshold voltage, and its phase offset depends on the (poorly controlled) TTL output levels and the supply voltages. Interchanging source and drain would help--that would at least force it always to be OFF when the '86 output is low. I'd rip out the 74xx stuff and the FET, and replace it with phase comparator II of a 74HC4046, with the + input of the op amp biased at +2.5V, and a 100k resistor between the PCII output and the - input. Saves two packages and will actually work. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Reply by ●April 23, 20152015-04-23
On Wednesday, April 22, 2015 at 9:06:59 AM UTC-7, Phil Hobbs wrote:> On 04/21/2015 07:32 AM, Jean-Pierre Coulon wrote: > > I tried to reproduce fig.22, p.17 of the datasheet but ...> That's a really crappy circuit. Besides using a boutique FET and > ancient bipolar logic... > I'd rip out the 74xx stuff and the FET, and replace it with phase > comparator II of a 74HC4046, with the + input of the op amp biased at > +2.5V, and a 100k resistor between the PCII output and the - input.Or, just use a 74HC4046 in F/V mode (you have to put a bias resistor pulldown on the 'follower' to get the Vout). Linearity is 1% or so, and for smaller parts of the full range, it would be better than that. The biggest nonlinearity in variants of the '4046 is from the NMOS device that takes VCOin on the gate and develops the program current on the program (source to ground) resistor; the current that drives all the dependent sources is then Idrain = (VCOin -Vgs(Idrain) )/ R Of course, the VCO frequency is accurately proportional to Idrain. The 'follower' pin is your access to a matched FET follower which gives an output voltage compensated for the Vgs 'error' term. It basically mirrors the Idrain onto that follower pulldown.
Reply by ●April 23, 20152015-04-23
On 4/23/2015 5:30 PM, whit3rd wrote:> On Wednesday, April 22, 2015 at 9:06:59 AM UTC-7, Phil Hobbs wrote: >> On 04/21/2015 07:32 AM, Jean-Pierre Coulon wrote: >>> I tried to reproduce fig.22, p.17 of the datasheet but ... > >> That's a really crappy circuit. Besides using a boutique FET and >> ancient bipolar logic... >> I'd rip out the 74xx stuff and the FET, and replace it with phase >> comparator II of a 74HC4046, with the + input of the op amp biased at >> +2.5V, and a 100k resistor between the PCII output and the - input. > > Or, just use a 74HC4046 in F/V mode (you have to put a bias resistor > pulldown on the 'follower' to get the Vout). Linearity is 1% or > so, and for smaller parts of the full range, it would be better than that.The metal gate parts are nice and linear, but the HC ones really really aren't. We had a long thread on that back in 2011: <http://groups.google.com/group/sci.electronics.design/msg/528c22e578dc8c2a> Comparisons of datasheets for HC4046, HC7046, and HC9046 variants revealed nonlinearities of 3:1 to 5:1 in df/dV, iirc. What's more, their oscillators up and quit below about 1-1.3 V, whereas you can tune a CD4046 more than 100:1 (sometimes 1000:1).> > The biggest nonlinearity in variants of the '4046 is from the NMOS device > that takes VCOin on the gate and develops the program current on the program > (source to ground) resistor; the current that drives all the dependent > sources is then > Idrain = (VCOin -Vgs(Idrain) )/ R > > Of course, the VCO frequency is accurately proportional to Idrain. > > The 'follower' pin is your access to a matched FET follower which > gives an output voltage compensated for the Vgs 'error' term. It > basically mirrors the Idrain onto that follower pulldown.That's nice theoretically, but I sort of doubt that it will take a 5:1 worst case slope variation and turn it into 1% linearity. I use the HC4046 PFD, but _never_ the oscillator. Pity, because the metal gate part was quite pretty in a small way. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Reply by ●April 23, 20152015-04-23
On Thu, 23 Apr 2015 17:48:03 -0400, Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:>On 4/23/2015 5:30 PM, whit3rd wrote: >> On Wednesday, April 22, 2015 at 9:06:59 AM UTC-7, Phil Hobbs wrote: >>> On 04/21/2015 07:32 AM, Jean-Pierre Coulon wrote: >>>> I tried to reproduce fig.22, p.17 of the datasheet but ... >> >>> That's a really crappy circuit. Besides using a boutique FET and >>> ancient bipolar logic... >>> I'd rip out the 74xx stuff and the FET, and replace it with phase >>> comparator II of a 74HC4046, with the + input of the op amp biased at >>> +2.5V, and a 100k resistor between the PCII output and the - input. >> >> Or, just use a 74HC4046 in F/V mode (you have to put a bias resistor >> pulldown on the 'follower' to get the Vout). Linearity is 1% or >> so, and for smaller parts of the full range, it would be better than that. > >The metal gate parts are nice and linear, but the HC ones really really >aren't. We had a long thread on that back in 2011: > ><http://groups.google.com/group/sci.electronics.design/msg/528c22e578dc8c2a> > >Comparisons of datasheets for HC4046, HC7046, and HC9046 variants >revealed nonlinearities of 3:1 to 5:1 in df/dV, iirc. > >What's more, their oscillators up and quit below about 1-1.3 V, whereas >you can tune a CD4046 more than 100:1 (sometimes 1000:1). > >> >> The biggest nonlinearity in variants of the '4046 is from the NMOS device >> that takes VCOin on the gate and develops the program current on the program >> (source to ground) resistor; the current that drives all the dependent >> sources is then >> Idrain = (VCOin -Vgs(Idrain) )/ R >> >> Of course, the VCO frequency is accurately proportional to Idrain. >> >> The 'follower' pin is your access to a matched FET follower which >> gives an output voltage compensated for the Vgs 'error' term. It >> basically mirrors the Idrain onto that follower pulldown. > >That's nice theoretically, but I sort of doubt that it will take a 5:1 >worst case slope variation and turn it into 1% linearity. > >I use the HC4046 PFD, but _never_ the oscillator. Pity, because the >metal gate part was quite pretty in a small way. > >Cheers > >Phil HobbsIf you take the output at the follower, the Vgs non-linearity goes away, so it should make a fairly decent F-to-V. See HC4046_VCO.zip on the Device Models & Subcircuits Page of my website, if you want to play. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Reply by ●April 23, 20152015-04-23
On 4/23/2015 6:29 PM, Jim Thompson wrote:> On Thu, 23 Apr 2015 17:48:03 -0400, Phil Hobbs > <pcdhSpamMeSenseless@electrooptical.net> wrote: > >> On 4/23/2015 5:30 PM, whit3rd wrote: >>> On Wednesday, April 22, 2015 at 9:06:59 AM UTC-7, Phil Hobbs wrote: >>>> On 04/21/2015 07:32 AM, Jean-Pierre Coulon wrote: >>>>> I tried to reproduce fig.22, p.17 of the datasheet but ... >>> >>>> That's a really crappy circuit. Besides using a boutique FET and >>>> ancient bipolar logic... >>>> I'd rip out the 74xx stuff and the FET, and replace it with phase >>>> comparator II of a 74HC4046, with the + input of the op amp biased at >>>> +2.5V, and a 100k resistor between the PCII output and the - input. >>> >>> Or, just use a 74HC4046 in F/V mode (you have to put a bias resistor >>> pulldown on the 'follower' to get the Vout). Linearity is 1% or >>> so, and for smaller parts of the full range, it would be better than that. >> >> The metal gate parts are nice and linear, but the HC ones really really >> aren't. We had a long thread on that back in 2011: >> >> <http://groups.google.com/group/sci.electronics.design/msg/528c22e578dc8c2a> >> >> Comparisons of datasheets for HC4046, HC7046, and HC9046 variants >> revealed nonlinearities of 3:1 to 5:1 in df/dV, iirc. >> >> What's more, their oscillators up and quit below about 1-1.3 V, whereas >> you can tune a CD4046 more than 100:1 (sometimes 1000:1). >> >>> >>> The biggest nonlinearity in variants of the '4046 is from the NMOS device >>> that takes VCOin on the gate and develops the program current on the program >>> (source to ground) resistor; the current that drives all the dependent >>> sources is then >>> Idrain = (VCOin -Vgs(Idrain) )/ R >>> >>> Of course, the VCO frequency is accurately proportional to Idrain. >>> >>> The 'follower' pin is your access to a matched FET follower which >>> gives an output voltage compensated for the Vgs 'error' term. It >>> basically mirrors the Idrain onto that follower pulldown. >> >> That's nice theoretically, but I sort of doubt that it will take a 5:1 >> worst case slope variation and turn it into 1% linearity. >> >> I use the HC4046 PFD, but _never_ the oscillator. Pity, because the >> metal gate part was quite pretty in a small way. >> >> Cheers >> >> Phil Hobbs > > If you take the output at the follower, the Vgs non-linearity goes > away, so it should make a fairly decent F-to-V. > > See HC4046_VCO.zip on the Device Models & Subcircuits Page of my > website, if you want to play. > > ...Jim Thompson >Have a gander at the datasheets I reference in the linked post, and say that again. ;) Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Reply by ●April 23, 20152015-04-23
On Thu, 23 Apr 2015 18:32:50 -0400, Phil Hobbs <hobbs@electrooptical.net> wrote:>On 4/23/2015 6:29 PM, Jim Thompson wrote: >> On Thu, 23 Apr 2015 17:48:03 -0400, Phil Hobbs >> <pcdhSpamMeSenseless@electrooptical.net> wrote: >> >>> On 4/23/2015 5:30 PM, whit3rd wrote: >>>> On Wednesday, April 22, 2015 at 9:06:59 AM UTC-7, Phil Hobbs wrote: >>>>> On 04/21/2015 07:32 AM, Jean-Pierre Coulon wrote: >>>>>> I tried to reproduce fig.22, p.17 of the datasheet but ... >>>> >>>>> That's a really crappy circuit. Besides using a boutique FET and >>>>> ancient bipolar logic... >>>>> I'd rip out the 74xx stuff and the FET, and replace it with phase >>>>> comparator II of a 74HC4046, with the + input of the op amp biased at >>>>> +2.5V, and a 100k resistor between the PCII output and the - input. >>>> >>>> Or, just use a 74HC4046 in F/V mode (you have to put a bias resistor >>>> pulldown on the 'follower' to get the Vout). Linearity is 1% or >>>> so, and for smaller parts of the full range, it would be better than that. >>> >>> The metal gate parts are nice and linear, but the HC ones really really >>> aren't. We had a long thread on that back in 2011: >>> >>> <http://groups.google.com/group/sci.electronics.design/msg/528c22e578dc8c2a> >>> >>> Comparisons of datasheets for HC4046, HC7046, and HC9046 variants >>> revealed nonlinearities of 3:1 to 5:1 in df/dV, iirc. >>> >>> What's more, their oscillators up and quit below about 1-1.3 V, whereas >>> you can tune a CD4046 more than 100:1 (sometimes 1000:1). >>> >>>> >>>> The biggest nonlinearity in variants of the '4046 is from the NMOS device >>>> that takes VCOin on the gate and develops the program current on the program >>>> (source to ground) resistor; the current that drives all the dependent >>>> sources is then >>>> Idrain = (VCOin -Vgs(Idrain) )/ R >>>> >>>> Of course, the VCO frequency is accurately proportional to Idrain. >>>> >>>> The 'follower' pin is your access to a matched FET follower which >>>> gives an output voltage compensated for the Vgs 'error' term. It >>>> basically mirrors the Idrain onto that follower pulldown. >>> >>> That's nice theoretically, but I sort of doubt that it will take a 5:1 >>> worst case slope variation and turn it into 1% linearity. >>> >>> I use the HC4046 PFD, but _never_ the oscillator. Pity, because the >>> metal gate part was quite pretty in a small way. >>> >>> Cheers >>> >>> Phil Hobbs >> >> If you take the output at the follower, the Vgs non-linearity goes >> away, so it should make a fairly decent F-to-V. >> >> See HC4046_VCO.zip on the Device Models & Subcircuits Page of my >> website, if you want to play. >> >> ...Jim Thompson >> > >Have a gander at the datasheets I reference in the linked post, and say >that again. ;) > >Cheers > >Phil Hobbs"that again" >:-} You're missing the point, the source of the input follower drives a resistor to ground, thus that voltage is an exact replica of the current flowing in the resistor, thus the remaining non-linearity would be due to current mirror matching and _delay_ thru the comparator doing the "turn-around"... delay with an easy cure for this kind of application... mentioned in my previous posts of years gone bye ;-) ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Reply by ●April 23, 20152015-04-23
Well, maybe in the circular-cow SPICE flatland. If you can make a _physical_ HC4046 F-V converter with 1% linearity over a range of at least four octaves, I'll donate $100 to the charity of your choice (as long as it isn't explicitly anti-Christian) and advertise the fact here. Cheers Phil Hobbs
Reply by ●April 23, 20152015-04-23
On Thursday, April 23, 2015 at 4:30:48 PM UTC-7, Phil Hobbs wrote: [about linear V-F conversion]> Well, maybe in the circular-cow SPICE flatland. > > If you can make a _physical_ HC4046 F-V converter with 1% linearity over a range of at least four octaves, I'll donate...Oh, you might lose that bet. To make a V-F converter, one would have to use an op amp to servo Vvco so that Vfollower = Vinput, but you said F-V. To make a linear F-V converter doesn't take a second chip. The point here, is that all '4046 devices use a very linear current-steering ICO, programmed by an input current source (and mirrors). By "ICO", I mean a current-controlled oscillator, it isn't internally a VCO at all. The input current source, though, is a not-very-linear voltage-to-current converter (with input voltage range and gain errors). You are concerned with a nonlinearity that is almost entirely in the voltage-current conversion stage, which is nulled by use of the follower transistor. If one were very concerned with linearity, one could fix the bias Vvco and instead of a resistor to program the current source, use a precise current sink at the resistor pin, so that matching with the follower transistor is left out of the error budget.
