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DDS wisdom

Started by Phil Hobbs December 4, 2014
Hi, all,

I have a gig coming in that will have me revisiting my thesis research 
from nearly 30 years ago, on interferometric laser microscopes.  (Fun.)

Back in the day, I made a nulling-type phase digitizer at 60 MHz by 
driving a phase shifter with a 12-bit DAC (AD-DAC80), and wrapping a 
13-bit successive approximation loop round it (AM2904 with an extra 
flipflop).  With quite a lot of calibration, that got me a 13-bit, 2-pi, 
50 ks/s phase measurement that I was pretty happy with.  (The extra bit 
came from deciding which null to head for, which is why I needed the 
extra FF.)  It was all interfaced to an HP 9816 computer via a GPIO 
card, and (eventually) worked great.  I published one of my only two 
instruments papers on it (this was before I realized the total futility 
of almost all instruments papers).

The advantage of nulling detection is that you only need 1-D calibration 
tables for phase shift and amplitude, whereas getting that sort of 
accuracy with I/Q techniques requires a 2-D calibration table, which is 
a gigantic pain.

I need to do this again, 2015 style.  The speed requirements are set by 
the acoustic delay in the AO scanner, so 50-100 ks/s is about all I can 
use.  Rather than all that squishy analogue stuff, I'm planning to do 
the SAR in software and use a pair of AD9951 DDS chips, one to generate 
the desired signal and one to be the phase shifted comparison signal.

So far so straightforward.

What I'm less sure about is being able to keep the two channels 
sufficiently isolated to be able to maintain 12 or ideally 14 bits of 
phase accuracy.  Even with a full-scale input, I'll need 85 dB of 
isolation to get 14 bits, and it gets harder with weaker signals. 
(There'll be a DLVA/limiter ahead of the phase detector, which will help.)

I've never used DDSes before, and I'd appreciate some wisdom from folks 
who have.  How hard is that likely to be, and what should I particularly 
watch out for?

Thanks

Phil Hobbs

-- 
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net
On Thu, 04 Dec 2014 15:04:01 -0500, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

>Hi, all, > >I have a gig coming in that will have me revisiting my thesis research >from nearly 30 years ago, on interferometric laser microscopes. (Fun.) > >Back in the day, I made a nulling-type phase digitizer at 60 MHz by >driving a phase shifter with a 12-bit DAC (AD-DAC80), and wrapping a >13-bit successive approximation loop round it (AM2904 with an extra >flipflop). With quite a lot of calibration, that got me a 13-bit, 2-pi, >50 ks/s phase measurement that I was pretty happy with. (The extra bit >came from deciding which null to head for, which is why I needed the >extra FF.) It was all interfaced to an HP 9816 computer via a GPIO >card, and (eventually) worked great. I published one of my only two >instruments papers on it (this was before I realized the total futility >of almost all instruments papers).
Ha!
> >The advantage of nulling detection is that you only need 1-D calibration >tables for phase shift and amplitude, whereas getting that sort of >accuracy with I/Q techniques requires a 2-D calibration table, which is >a gigantic pain. > >I need to do this again, 2015 style. The speed requirements are set by >the acoustic delay in the AO scanner, so 50-100 ks/s is about all I can >use. Rather than all that squishy analogue stuff, I'm planning to do >the SAR in software and use a pair of AD9951 DDS chips, one to generate >the desired signal and one to be the phase shifted comparison signal. > >So far so straightforward. > >What I'm less sure about is being able to keep the two channels >sufficiently isolated to be able to maintain 12 or ideally 14 bits of >phase accuracy. Even with a full-scale input, I'll need 85 dB of >isolation to get 14 bits, and it gets harder with weaker signals. >(There'll be a DLVA/limiter ahead of the phase detector, which will help.) > >I've never used DDSes before, and I'd appreciate some wisdom from folks >who have. How hard is that likely to be, and what should I particularly >watch out for? > >Thanks > >Phil Hobbs
Got a sketch? "One picture..." etc. Integrated DDSs work great, but generally need a good output lowpass filter. If you plan to do that twice, they'll have to track in phase pretty well over time and temperature. That shouldn't be difficult if you overkill on DDS clock rate, so the filter doesn't have to work hard. The DDS steps may average out in the final phase measurement, but would probably add squirmies-type noise, so some amount of filtering would be good. If you were using an FPGA, you could just use a couple of DACs, and build your own DDS and phase shifter. Talking to the ADI chips, especially the serial ones, can be annoying. -- John Larkin Highland Technology, Inc picosecond timing precision measurement jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
On Thu, 04 Dec 2014 15:04:01 -0500, Phil Hobbs wrote:

> Hi, all, > > I have a gig coming in that will have me revisiting my thesis research > from nearly 30 years ago, on interferometric laser microscopes. (Fun.) > > Back in the day, I made a nulling-type phase digitizer at 60 MHz by > driving a phase shifter with a 12-bit DAC (AD-DAC80), and wrapping a > 13-bit successive approximation loop round it (AM2904 with an extra > flipflop). With quite a lot of calibration, that got me a 13-bit, 2-pi, > 50 ks/s phase measurement that I was pretty happy with. (The extra bit > came from deciding which null to head for, which is why I needed the > extra FF.) It was all interfaced to an HP 9816 computer via a GPIO > card, and (eventually) worked great. I published one of my only two > instruments papers on it (this was before I realized the total futility > of almost all instruments papers). > > The advantage of nulling detection is that you only need 1-D calibration > tables for phase shift and amplitude, whereas getting that sort of > accuracy with I/Q techniques requires a 2-D calibration table, which is > a gigantic pain. > > I need to do this again, 2015 style. The speed requirements are set by > the acoustic delay in the AO scanner, so 50-100 ks/s is about all I can > use. Rather than all that squishy analogue stuff, I'm planning to do > the SAR in software and use a pair of AD9951 DDS chips, one to generate > the desired signal and one to be the phase shifted comparison signal. > > So far so straightforward. > > What I'm less sure about is being able to keep the two channels > sufficiently isolated to be able to maintain 12 or ideally 14 bits of > phase accuracy. Even with a full-scale input, I'll need 85 dB of > isolation to get 14 bits, and it gets harder with weaker signals. > (There'll be a DLVA/limiter ahead of the phase detector, which will > help.) > > I've never used DDSes before, and I'd appreciate some wisdom from folks > who have. How hard is that likely to be, and what should I particularly > watch out for? > > Thanks > > Phil Hobbs
So the short story is that you're going to generate a sine wave, send it through some system, and you want to accurately measure the phase shift of what comes out of the system? And you propose to do this using a pair of DDS chips for source and reference, with an analog phase detector? At 100ksps? Do you drive around in a car that has a brand new engine coupled to a 1939 Lincoln gearbox? Why not use one DDS to generate your sine wave, then capture the return with an ADC and do the phase detection digitally? 100ksps should be well within the capabilities of a Cortex M3 part, and if it isn't there are Cortex M4 parts and DSP chips to take up the slack. For that matter, it may be easier to maintain synchronization by generating the sine wave in the processor and stuffing it out a plain old DAC. Then your DAC and ADC can have a common convert command. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com
On 12/04/2014 04:01 PM, Tim Wescott wrote:
> On Thu, 04 Dec 2014 15:04:01 -0500, Phil Hobbs wrote: > >> Hi, all, >> >> I have a gig coming in that will have me revisiting my thesis research >> from nearly 30 years ago, on interferometric laser microscopes. (Fun.) >> >> Back in the day, I made a nulling-type phase digitizer at 60 MHz by >> driving a phase shifter with a 12-bit DAC (AD-DAC80), and wrapping a >> 13-bit successive approximation loop round it (AM2904 with an extra >> flipflop). With quite a lot of calibration, that got me a 13-bit, 2-pi, >> 50 ks/s phase measurement that I was pretty happy with. (The extra bit >> came from deciding which null to head for, which is why I needed the >> extra FF.) It was all interfaced to an HP 9816 computer via a GPIO >> card, and (eventually) worked great. I published one of my only two >> instruments papers on it (this was before I realized the total futility >> of almost all instruments papers). >> >> The advantage of nulling detection is that you only need 1-D calibration >> tables for phase shift and amplitude, whereas getting that sort of >> accuracy with I/Q techniques requires a 2-D calibration table, which is >> a gigantic pain. >> >> I need to do this again, 2015 style. The speed requirements are set by >> the acoustic delay in the AO scanner, so 50-100 ks/s is about all I can >> use. Rather than all that squishy analogue stuff, I'm planning to do >> the SAR in software and use a pair of AD9951 DDS chips, one to generate >> the desired signal and one to be the phase shifted comparison signal. >> >> So far so straightforward. >> >> What I'm less sure about is being able to keep the two channels >> sufficiently isolated to be able to maintain 12 or ideally 14 bits of >> phase accuracy. Even with a full-scale input, I'll need 85 dB of >> isolation to get 14 bits, and it gets harder with weaker signals. >> (There'll be a DLVA/limiter ahead of the phase detector, which will >> help.) >> >> I've never used DDSes before, and I'd appreciate some wisdom from folks >> who have. How hard is that likely to be, and what should I particularly >> watch out for? >> >> Thanks >> >> Phil Hobbs > > So the short story is that you're going to generate a sine wave, send it > through some system, and you want to accurately measure the phase shift of > what comes out of the system? > > And you propose to do this using a pair of DDS chips for source and > reference, with an analog phase detector? At 100ksps? > > Do you drive around in a car that has a brand new engine coupled to a 1939 > Lincoln gearbox? > > Why not use one DDS to generate your sine wave, then capture the return > with an ADC and do the phase detection digitally? 100ksps should be well > within the capabilities of a Cortex M3 part, and if it isn't there are > Cortex M4 parts and DSP chips to take up the slack.
As the wise man said, there's nothing more dangerous than an idea, when it's the only one you have. ;)
> > For that matter, it may be easier to maintain synchronization by > generating the sine wave in the processor and stuffing it out a plain old > DAC. Then your DAC and ADC can have a common convert command. >
Because the signal coming back is at VHF, and using nulling eliminates the need for 2D calibration, as I said. A DDS is less complicated to use than a 200 MHz ADC, for sure, and it saves me a boatload of Mini Circuits stuff getting the signal down to baseband, and several expensive and phase-distorting filters getting rid of all the attendant spurs. It's $20 vs at least $200 for poorer performance and a lot more agita. No contest. Nulling is Good Medicine for this sort of job. I'm mainly interested in advice about pitfalls using multiple DDSes for high spectral purity applications. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
On Thu, 04 Dec 2014 17:50:10 -0500, Phil Hobbs wrote:

> On 12/04/2014 04:01 PM, Tim Wescott wrote: >> On Thu, 04 Dec 2014 15:04:01 -0500, Phil Hobbs wrote: >> >>> Hi, all, >>> >>> I have a gig coming in that will have me revisiting my thesis research >>> from nearly 30 years ago, on interferometric laser microscopes. >>> (Fun.) >>> >>> Back in the day, I made a nulling-type phase digitizer at 60 MHz by >>> driving a phase shifter with a 12-bit DAC (AD-DAC80), and wrapping a >>> 13-bit successive approximation loop round it (AM2904 with an extra >>> flipflop). With quite a lot of calibration, that got me a 13-bit, >>> 2-pi, >>> 50 ks/s phase measurement that I was pretty happy with. (The extra >>> bit came from deciding which null to head for, which is why I needed >>> the extra FF.) It was all interfaced to an HP 9816 computer via a >>> GPIO card, and (eventually) worked great. I published one of my only >>> two instruments papers on it (this was before I realized the total >>> futility of almost all instruments papers). >>> >>> The advantage of nulling detection is that you only need 1-D >>> calibration tables for phase shift and amplitude, whereas getting that >>> sort of accuracy with I/Q techniques requires a 2-D calibration table, >>> which is a gigantic pain. >>> >>> I need to do this again, 2015 style. The speed requirements are set >>> by the acoustic delay in the AO scanner, so 50-100 ks/s is about all I >>> can use. Rather than all that squishy analogue stuff, I'm planning to >>> do the SAR in software and use a pair of AD9951 DDS chips, one to >>> generate the desired signal and one to be the phase shifted comparison >>> signal. >>> >>> So far so straightforward. >>> >>> What I'm less sure about is being able to keep the two channels >>> sufficiently isolated to be able to maintain 12 or ideally 14 bits of >>> phase accuracy. Even with a full-scale input, I'll need 85 dB of >>> isolation to get 14 bits, and it gets harder with weaker signals. >>> (There'll be a DLVA/limiter ahead of the phase detector, which will >>> help.) >>> >>> I've never used DDSes before, and I'd appreciate some wisdom from >>> folks who have. How hard is that likely to be, and what should I >>> particularly watch out for? >>> >>> Thanks >>> >>> Phil Hobbs >> >> So the short story is that you're going to generate a sine wave, send >> it through some system, and you want to accurately measure the phase >> shift of what comes out of the system? >> >> And you propose to do this using a pair of DDS chips for source and >> reference, with an analog phase detector? At 100ksps? >> >> Do you drive around in a car that has a brand new engine coupled to a >> 1939 Lincoln gearbox? >> >> Why not use one DDS to generate your sine wave, then capture the return >> with an ADC and do the phase detection digitally? 100ksps should be >> well within the capabilities of a Cortex M3 part, and if it isn't there >> are Cortex M4 parts and DSP chips to take up the slack. > > As the wise man said, there's nothing more dangerous than an idea, when > it's the only one you have. ;) > > >> For that matter, it may be easier to maintain synchronization by >> generating the sine wave in the processor and stuffing it out a plain >> old DAC. Then your DAC and ADC can have a common convert command. >> >> > Because the signal coming back is at VHF, and using nulling eliminates > the need for 2D calibration, as I said. A DDS is less complicated to > use than a 200 MHz ADC, for sure, and it saves me a boatload of Mini > Circuits stuff getting the signal down to baseband, and several > expensive and phase-distorting filters getting rid of all the attendant > spurs. > > It's $20 vs at least $200 for poorer performance and a lot more agita. > No contest. Nulling is Good Medicine for this sort of job. > > I'm mainly interested in advice about pitfalls using multiple DDSes for > high spectral purity applications.
Ah. Much be comes clear -- I read your samples per second requirement to be a bandwidth spec. Instead, it appears that you're working with a (relatively) small bandwidth around a carrier. To quote Rosanne Rosannadanna: never mind. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com
On 12/04/2014 03:39 PM, John Larkin wrote:
> On Thu, 04 Dec 2014 15:04:01 -0500, Phil Hobbs > <pcdhSpamMeSenseless@electrooptical.net> wrote: > >> Hi, all, >> >> I have a gig coming in that will have me revisiting my thesis >> research from nearly 30 years ago, on interferometric laser >> microscopes. (Fun.) >> >> Back in the day, I made a nulling-type phase digitizer at 60 MHz by >> driving a phase shifter with a 12-bit DAC (AD-DAC80), and wrapping >> a 13-bit successive approximation loop round it (AM2904 with an >> extra flipflop). With quite a lot of calibration, that got me a >> 13-bit, 2-pi, 50 ks/s phase measurement that I was pretty happy >> with. (The extra bit came from deciding which null to head for, >> which is why I needed the extra FF.) It was all interfaced to an >> HP 9816 computer via a GPIO card, and (eventually) worked great. I >> published one of my only two instruments papers on it (this was >> before I realized the total futility of almost all instruments >> papers). > > Ha! > >> >> The advantage of nulling detection is that you only need 1-D >> calibration tables for phase shift and amplitude, whereas getting >> that sort of accuracy with I/Q techniques requires a 2-D >> calibration table, which is a gigantic pain. >> >> I need to do this again, 2015 style. The speed requirements are >> set by the acoustic delay in the AO scanner, so 50-100 ks/s is >> about all I can use. Rather than all that squishy analogue stuff, >> I'm planning to do the SAR in software and use a pair of AD9951 >> DDS chips, one to generate the desired signal and one to be the >> phase shifted comparison signal. >> >> So far so straightforward. >> >> What I'm less sure about is being able to keep the two channels >> sufficiently isolated to be able to maintain 12 or ideally 14 bits >> of phase accuracy. Even with a full-scale input, I'll need 85 dB >> of isolation to get 14 bits, and it gets harder with weaker >> signals. (There'll be a DLVA/limiter ahead of the phase detector, >> which will help.) >> >> I've never used DDSes before, and I'd appreciate some wisdom from >> folks who have. How hard is that likely to be, and what should I >> particularly watch out for? >> >> Thanks >> >> Phil Hobbs > > Got a sketch? "One picture..." etc.
http://electrooptical.net/www/sed/HeterodyneMicroscopeBackEnd.pdf The frequency shifting stuff is just sketched, but this is the gist.
> > Integrated DDSs work great, but generally need a good output lowpass > filter. If you plan to do that twice, they'll have to track in phase > pretty well over time and temperature.
I'm planning to do a quick calibration run at power-up, using DDS1. There's a huge phase slope due to the AO modulator--there's about 10 microseconds of acoustic delay.
> That shouldn't be difficult if you overkill on DDS clock rate, so the > filter doesn't have to work hard. The DDS steps may average out in > the final phase measurement, but would probably add squirmies-type > noise, so some amount of filtering would be good. > > If you were using an FPGA, you could just use a couple of DACs, and > build your own DDS and phase shifter. Talking to the ADI chips, > especially the serial ones, can be annoying.
What's annoying about the serial ones? Just general clunkiness, or actual bugs? Even if I were an FPGA guy, the project wouldn't support that much engineering, especially when there's this $20 alternative. If they sell 200 of these things over the life of the product, we'll all be very happy--they go for a million bucks apiece. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Den torsdag den 4. december 2014 21.04.06 UTC+1 skrev Phil Hobbs:
> Hi, all, > > I have a gig coming in that will have me revisiting my thesis research > from nearly 30 years ago, on interferometric laser microscopes. (Fun.) > > Back in the day, I made a nulling-type phase digitizer at 60 MHz by > driving a phase shifter with a 12-bit DAC (AD-DAC80), and wrapping a > 13-bit successive approximation loop round it (AM2904 with an extra > flipflop). With quite a lot of calibration, that got me a 13-bit, 2-pi, > 50 ks/s phase measurement that I was pretty happy with. (The extra bit > came from deciding which null to head for, which is why I needed the > extra FF.) It was all interfaced to an HP 9816 computer via a GPIO > card, and (eventually) worked great. I published one of my only two > instruments papers on it (this was before I realized the total futility > of almost all instruments papers). > > The advantage of nulling detection is that you only need 1-D calibration > tables for phase shift and amplitude, whereas getting that sort of > accuracy with I/Q techniques requires a 2-D calibration table, which is > a gigantic pain. > > I need to do this again, 2015 style. The speed requirements are set by > the acoustic delay in the AO scanner, so 50-100 ks/s is about all I can > use. Rather than all that squishy analogue stuff, I'm planning to do > the SAR in software and use a pair of AD9951 DDS chips, one to generate > the desired signal and one to be the phase shifted comparison signal. > > So far so straightforward. > > What I'm less sure about is being able to keep the two channels > sufficiently isolated to be able to maintain 12 or ideally 14 bits of > phase accuracy. Even with a full-scale input, I'll need 85 dB of > isolation to get 14 bits, and it gets harder with weaker signals. > (There'll be a DLVA/limiter ahead of the phase detector, which will help.) >
the AD9858 specs >72dB channel to channel isolation and they are on the same chip -Lasse
On 12/4/2014 3:04 PM, Phil Hobbs wrote:
> Hi, all, > > I have a gig coming in that will have me revisiting my thesis research > from nearly 30 years ago, on interferometric laser microscopes. (Fun.) > > Back in the day, I made a nulling-type phase digitizer at 60 MHz by > driving a phase shifter with a 12-bit DAC (AD-DAC80), and wrapping a > 13-bit successive approximation loop round it (AM2904 with an extra > flipflop). With quite a lot of calibration, that got me a 13-bit, 2-pi, > 50 ks/s phase measurement that I was pretty happy with. (The extra bit > came from deciding which null to head for, which is why I needed the > extra FF.) It was all interfaced to an HP 9816 computer via a GPIO > card, and (eventually) worked great. I published one of my only two > instruments papers on it (this was before I realized the total futility > of almost all instruments papers). > > The advantage of nulling detection is that you only need 1-D calibration > tables for phase shift and amplitude, whereas getting that sort of > accuracy with I/Q techniques requires a 2-D calibration table, which is > a gigantic pain. > > I need to do this again, 2015 style. The speed requirements are set by > the acoustic delay in the AO scanner, so 50-100 ks/s is about all I can > use. Rather than all that squishy analogue stuff, I'm planning to do > the SAR in software and use a pair of AD9951 DDS chips, one to generate > the desired signal and one to be the phase shifted comparison signal. > > So far so straightforward. > > What I'm less sure about is being able to keep the two channels > sufficiently isolated to be able to maintain 12 or ideally 14 bits of > phase accuracy. Even with a full-scale input, I'll need 85 dB of > isolation to get 14 bits, and it gets harder with weaker signals. > (There'll be a DLVA/limiter ahead of the phase detector, which will help.) > > I've never used DDSes before, and I'd appreciate some wisdom from folks > who have. How hard is that likely to be, and what should I particularly > watch out for?
I've read all the posts so far and it seems you are generating a VHF sine wave to compare to a VHF signal you wish to measure the phase and amplitude of. I think I get that. But it seems the modulation of the VHF signal is pretty low rate so that 50 kSPS is good enough. Then you ask about how to maintain enough isolation to preserve 14 bits of phase measurement. I think the isolation you are worried about it in the VHF range, no? That is the domain of RF design and not at all trivial. I think you will need to provide more info on design specifics. I'm not clear on how you plan to do the phase detector. Is this just subtracting the reference signal from the signal being measured? You then scan the phase of the reference to find the null, scan the amplitude of the reference to optimize the null and then possibly repeat? Otherwise I'm not sure how you get both phase and amplitude out of this. -- Rick
On Thu, 04 Dec 2014 15:04:01 -0500, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:


>I've never used DDSes before, and I'd appreciate some wisdom from folks >who have. How hard is that likely to be, and what should I particularly >watch out for?
Hi Phil, I'm using an AD9835 DDS chip in one of our upcoming induction heaters. That one does from millihertz to 25Mhz. Anything past about 5 Mhz needs some pretty good low pass filtering, as the output only approximates a sine wave. I'm using it in the 75 to 500kHz range and there it is beautiful. Programming it is a snap. It talks via SPI. The Atmel processor I use has hardware SPI support so it's just a matter of setting a few registers and passing the desired frequency to the SPI transmitter. This chip can store two frequencies and has a line to toggle between them for modulation purposes. I don't recall what the chip initialization requires but it's just a few lines of code. I can dig it up for you if it would be helpful. John John DeArmond http://www.neon-john.com http://www.fluxeon.com Tellico Plains, Occupied TN See website for email address
In article <cYydnTNwFPGvIx3JnZ2dnUU7-W-dnZ2d@supernews.com>, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

> Hi, all, > > I have a gig coming in that will have me revisiting my thesis research > from nearly 30 years ago, on interferometric laser microscopes. (Fun.) > > Back in the day, I made a nulling-type phase digitizer at 60 MHz by > driving a phase shifter with a 12-bit DAC (AD-DAC80), and wrapping a > 13-bit successive approximation loop round it (AM2904 with an extra > flipflop). With quite a lot of calibration, that got me a 13-bit, 2-pi, > 50 ks/s phase measurement that I was pretty happy with. (The extra bit > came from deciding which null to head for, which is why I needed the > extra FF.) It was all interfaced to an HP 9816 computer via a GPIO > card, and (eventually) worked great. I published one of my only two > instruments papers on it (this was before I realized the total futility > of almost all instruments papers). > > The advantage of nulling detection is that you only need 1-D calibration > tables for phase shift and amplitude, whereas getting that sort of > accuracy with I/Q techniques requires a 2-D calibration table, which is > a gigantic pain. > > I need to do this again, 2015 style. The speed requirements are set by > the acoustic delay in the AO scanner, so 50-100 ks/s is about all I can > use. Rather than all that squishy analogue stuff, I'm planning to do > the SAR in software and use a pair of AD9951 DDS chips, one to generate > the desired signal and one to be the phase shifted comparison signal. > > So far so straightforward. > > What I'm less sure about is being able to keep the two channels > sufficiently isolated to be able to maintain 12 or ideally 14 bits of > phase accuracy. Even with a full-scale input, I'll need 85 dB of > isolation to get 14 bits, and it gets harder with weaker signals. > (There'll be a DLVA/limiter ahead of the phase detector, which will help.) > > I've never used DDSes before, and I'd appreciate some wisdom from folks > who have. How hard is that likely to be, and what should I particularly > watch out for?
DDSs have a forest of rational-multiple (but not necessarily harmonic) spurs, and it can be difficult to get them below -60 dBc unless you can place some restrictions on the frequency resolution. Also beware phase jumps when the DDS phase wheel rolls over. It's a long story. ADI has a very good tutorial. Joe Gwinn.