On 9/19/2014 2:01 PM, edward.ming.lee@gmail.com wrote:> On Friday, September 19, 2014 1:41:49 PM UTC-7, Don Y wrote: >> On 9/18/2014 2:19 PM, edward.ming.lee@gmail.com wrote: >> >>>>>> BLDC controller: >> >>> We want to program the chip as such: > >>> ; +-----------------------------------------------------------+ >>> ; | VCC | VCC | AHI | ALO | BHI | BLO | CHI | CLO | GND | GND | >>> ; |-----------------------------------------------------------| >>> ; | CLK | VCC | VCC | VCC | CLK | REV | GND | GND | GND | GND | >>> ; +-----------------------------------------------------------+ >> >>> ; A,B,C HI,LO = Phase A,B,C high and low driver >>> ; CLK = Clock >>> ; REV = Reverse (Reserve for future use) >> >>> Output sequence: >> >>> ; AHI ALO BHI BLO CHI CLO >>> ; 0 0 1 0 0 1 >>> ; 1 0 0 0 0 1 >>> ; 1 0 0 1 0 0 >>> ; 0 0 0 1 1 0 >>> ; 0 1 0 0 1 0 >>> ; 0 1 1 0 0 0 >> >> Suggest you rewrite this as: >> >> ; CLO AHI BLO CHI ALO BHI >> ; 1 0 0 0 0 1 >> ; 1 1 0 0 0 0 >> ; 0 1 1 0 0 0 >> ; 0 0 1 1 0 0 >> ; 0 0 0 1 1 0 >> ; 0 0 0 0 1 1 > > But the PCB wiring corresponds to "AHI ALO BHI BLO CHI CLO". > "CLO AHI BLO CHI ALO BHI" could be an intermediate state table.It's purely commentary. You can arrange the columns in any order that you like. My suggestion is to pick an order that makes it very obvious the intended pattern in the FSM. For example, given my arrangement, if, instead, it had been: ; CLO AHI BLO CHI ALO BHI ; 1 0 0 0 0 1 ; 1 1 0 0 0 0 ; 0 1 1 0 0 0 ; 0 0 1 1 0 0 ; 1 0 0 1 1 0 ; 0 0 0 0 1 1 The error in CL0 would be pretty obvious!>> to make the desired behavior more obvious (makes it easier to spot mistakes in the "pattern") >> >>> Writing output as function of previous state: > >>> AHI := /AHI * /ALO * BHI * /BLO * /CHI * CLO + AHI * /ALO * /BHI * /BLO * /CHI * CLO >>> ALO := /AHI * /ALO * /BHI * BLO * CHI * /CLO + /AHI * ALO * /BHI * /BLO * CHI * /CLO >>> BHI := /AHI * ALO * BHI * /BLO * /CHI * /CLO + /AHI * ALO * /BHI * BLO * CHI * /CLO >>> BLO := AHI * /ALO * /BHI * /BLO * /CHI * CLO + AHI * /ALO * /BHI * BLO * /CHI * /CLO >>> CHI := AHI * /ALO * /BHI * BLO * /CHI * CLO + /AHI * /ALO * /BHI * BLO * CHI * /CLO >>> CLO := /AHI * ALO * BHI * /BLO * /CHI * /CLO + /AHI * /ALO * BHI * /BLO * /CHI * CLO >> >> Again, a rewrite (substitutions to trim line length) as: >> >> CL := /CL*/AH*/BL*/CH* AL* BH + CL*/AH*/BL*/CH*/AL* BH >> AH := CL*/AH*/BL*/CH*/AL* BH + CL* AH*/BL*/CH*/AL*/BH >> BL := CL* AH*/BL*/CH*/AL*/BH + /CL* AH* BL*/CH*/AL*/BH >> CH := /CL* AH* BL*/CH*/AL*/BH + /CL*/AH* BL* CH*/AL*/BH >> AL := /CL*/AH* BL* CH*/AL*/BH + /CL*/AH*/BL* CH* AL*/BH >> BH := /CL*/AH*/BL* CH* AL*/BH + /CL*/AH*/BL*/CH* AL* BH >> >> makes the pattern visible in the minterms.[I give up trying to reformat your post. Your news reader has mangled it and the *easy* fixes (for me) would just mangle it more!]> Actually, this is too unstable. The FSM would work if it's already > in one of the 6 states, out of 64. But if it's not, it won't drop > in.Add minterms to ensure the sequence converges more quickly. Or, add a RESET input (or an "InHIBIT" if that is more useful)> I am switching to decoding a 3 bits Johnson counter:Same problem persists. You can power up in one of the 2 (of 8) illegal states that the counter supports.> Q0 := Q1 > Q1 := Q2 > Q2 := /Q0 > AHI = Q2 * /Q1 * /Q0 + Q2 * Q1 * /Q0 > ALO = /Q2 * Q1 * Q0 + /Q2 * /Q1 * Q0 > BHI = /Q2 * /Q1 * /Q0 + /Q2 * /Q1 * Q0 > BLO = Q2 * Q1 * /Q0 + Q2 * Q1 * Q0 > CHI = Q2 * Q1 * Q0 + /Q2 * Q1 * Q0 > CLO = /Q2 * /Q1 * /Q0 + Q2 * /Q1 * /Q0 > >> You might also think about whether you need any "dead time" at the clock t> In that case, it would be 6 bits 12 states Johnson, with alternating re
BLDC controller and ATF16V8B/GAL16V8B/PAL16V8B
Started by ●September 17, 2014
Reply by ●September 19, 20142014-09-19
Reply by ●September 19, 20142014-09-19
On 2014-09-18, edward.ming.lee@gmail.com <edward.ming.lee@gmail.com> wrote:> >> > > BLDC controller: >> > > http://173.224.223.62/motor > >> > > I am thinking about moving the PIC 3 feet away (closer to the control panel) from this board. There are 6 outputs in 6 possible states. Each pair of MOSFET can be in HI, LO or KILL (both HI and LO) states. I can add an I/O expander or shift register to minimize the connections, but that increase the chance of KILL states due to communication error. So, i am thinking about a 3 to 6 decoder like ATF16V8B (EE) or even GAL16V8B/PAL16V8B. I need the EE version just to develop the logic, but don't really want it changeable or erasable anyway. Or just buy enough GAL16V8B/PAL16V8B to burn and dump them. >> >> > > I read that these are old chips and moderm USB programmer might not handle them well. Can someone recommend a cheap programmer for them? >> >> > I can't read what those drivers are, but most of them will not let you turn on both the top an bottom fet at the same time. >> >> Most have independent HI and LO inputs and outputs. Even if the gate driver can prevent it, the controller should not try to test it. >> >> > you'll need inputs for either either phase voltages or hall sensors to run a BLDC motor >> >> Signal and sensors can run on thinner wires or even opto-isolated. Phased power lines cannot be opto-isolated. > > There will be only one signal input, with frequency controlled by micro or 555. > > It seems that there are bits and pieces of information on the Internet to program the Gal16V8. First thing is to write the logic equations. Haven't done this for a long time. Am i doing it right? > > We want to program the chip as such: > > ; +-----------------------------------------------------------+ > ; | VCC | VCC | AHI | ALO | BHI | BLO | CHI | CLO | GND | GND | > ; |-----------------------------------------------------------| > ; | CLK | VCC | VCC | VCC | CLK | REV | GND | GND | GND | GND | > ; +-----------------------------------------------------------+ > > ; A,B,C HI,LO = Phase A,B,C high and low driver > ; CLK = Clock > ; REV = Reverse (Reserve for future use)why two CLK pins? typo?> Output sequence: > > ; AHI ALO BHI BLO CHI CLO > ; 0 0 1 0 0 1 > ; 1 0 0 0 0 1 > ; 1 0 0 1 0 0 > ; 0 0 0 1 1 0 > ; 0 1 0 0 1 0 > ; 0 1 1 0 0 0> Writing output as function of previous state: > > AHI := /AHI * /ALO * BHI * /BLO * /CHI * CLO + AHI * /ALO * /BHI * /BLO * /CHI * CLO > ALO := /AHI * /ALO * /BHI * BLO * CHI * /CLO + /AHI * ALO * /BHI * /BLO * CHI * /CLO > BHI := /AHI * ALO * BHI * /BLO * /CHI * /CLO + /AHI * ALO * /BHI * BLO * CHI * /CLO > BLO := AHI * /ALO * /BHI * /BLO * /CHI * CLO + AHI * /ALO * /BHI * BLO * /CHI * /CLO > CHI := AHI * /ALO * /BHI * BLO * /CHI * CLO + /AHI * /ALO * /BHI * BLO * CHI * /CLO > CLO := /AHI * ALO * BHI * /BLO * /CHI * /CLO + /AHI * /ALO * BHI * /BLO * /CHI * CLOthat's over-determined. eg: if it boots up with all low it'll stay there. as others have shuffle the columns to make the table more readable. ;CLO AHI BLO CHI ALO BHI ; 1 0 0 0 0 1 ; 1 1 0 0 0 0 ; 0 1 1 0 0 0 ; 0 0 1 1 0 0 ; 0 0 0 1 1 0 ; 0 0 0 0 1 1 at it's simplest the formula could be CLO := BHI BHI := ALO ALO := CHI CHI := BLO BLO := AHI AHI := CLO but that doesn't start-up or escape the all-on case CLO := BHI & ~BLO BHI := ALO & ~AHI ALO := CHI & ~CLO CHI := BLO & ~BHI BLO := AHI AHI := CLO this gets you an escape from the all-on case after one clock on by defeating CLO when CHI is due to activate etc for startup. CLO := ~BLO & ~ALO & ~CHI BHI := ~AHI & ~BLO & ~CHI ALO := CHI & ~CLO CHI := BLO & ~BHI BLO := AHI AHI := CLO that will get you into state 1 from full reset. -- umop apisdn --- news://freenews.netfront.net/ - complaints: news@netfront.net ---
Reply by ●September 19, 20142014-09-19
On Friday, September 19, 2014 3:21:31 PM UTC-7, Jasen Betts wrote:> On 2014-09-18, edward.ming.lee@gmail.com <edward.ming.lee@gmail.com> wrot=e:>=20 > >> > > BLDC controller: > >> > > http://173.224.223.62/motor >=20 > >> > > I am thinking about moving the PIC 3 feet away (closer to the cont=rol panel) from this board. There are 6 outputs in 6 possible states. Eac= h pair of MOSFET can be in HI, LO or KILL (both HI and LO) states. I can a= dd an I/O expander or shift register to minimize the connections, but that = increase the chance of KILL states due to communication error. So, i am th= inking about a 3 to 6 decoder like ATF16V8B (EE) or even GAL16V8B/PAL16V8B.= I need the EE version just to develop the logic, but don't really want it= changeable or erasable anyway. Or just buy enough GAL16V8B/PAL16V8B to bu= rn and dump them.>=20 > >> > > I read that these are old chips and moderm USB programmer might no=t handle them well. Can someone recommend a cheap programmer for them?>=20 > >> > I can't read what those drivers are, but most of them will not let =you turn on both the top an bottom fet at the same time.=20>=20 > >> Most have independent HI and LO inputs and outputs. Even if the gate =driver can prevent it, the controller should not try to test it.>=20 > >> > you'll need inputs for either either phase voltages or hall sensors =to run a BLDC motor=20>=20 > >> Signal and sensors can run on thinner wires or even opto-isolated. Ph=ased power lines cannot be opto-isolated.>=20 > > There will be only one signal input, with frequency controlled by micro=or 555.>=20 > > It seems that there are bits and pieces of information on the Internet =to program the Gal16V8. First thing is to write the logic equations. Haven= 't done this for a long time. Am i doing it right?>=20 > > We want to program the chip as such: >=20 > > ; +-----------------------------------------------------------+ > > ; | VCC | VCC | AHI | ALO | BHI | BLO | CHI | CLO | GND | GND | > > ; |-----------------------------------------------------------| > > ; | CLK | VCC | VCC | VCC | CLK | REV | GND | GND | GND | GND | > > ; +-----------------------------------------------------------+ >=20 > > ; A,B,C HI,LO =3D Phase A,B,C high and low driver > > ; CLK =3D Clock > > ; REV =3D Reverse (Reserve for future use) >=20 > why two CLK pins? typo?Once programmed, only the middle 12 pins need to go to the PCB. The common= VCC, GND and CLK are externally connected and cut if we don't need to repr= ogram it. So, it would be like a 12 pins DIP with wings.>=20 > > Output sequence: >=20 > > ; AHI ALO BHI BLO CHI CLO > > ; 0 0 1 0 0 1=20 > > ; 1 0 0 0 0 1 > > ; 1 0 0 1 0 0 > > ; 0 0 0 1 1 0 > > ; 0 1 0 0 1 0 > > ; 0 1 1 0 0 0 >=20 > > Writing output as function of previous state: >=20 > > AHI :=3D /AHI * /ALO * BHI * /BLO * /CHI * CLO + AHI * /ALO * /BHI=* /BLO * /CHI * CLO> > ALO :=3D /AHI * /ALO * /BHI * BLO * CHI * /CLO + /AHI * ALO * /BHI=* /BLO * CHI * /CLO> > BHI :=3D /AHI * ALO * BHI * /BLO * /CHI * /CLO + /AHI * ALO * /BHI=* BLO * CHI * /CLO> > BLO :=3D AHI * /ALO * /BHI * /BLO * /CHI * CLO + AHI * /ALO * /BHI=* BLO * /CHI * /CLO> > CHI :=3D AHI * /ALO * /BHI * BLO * /CHI * CLO + /AHI * /ALO * /BHI=* BLO * CHI * /CLO> > CLO :=3D /AHI * ALO * BHI * /BLO * /CHI * /CLO + /AHI * /ALO * BHI=* /BLO * /CHI * CLO>=20 > that's over-determined. eg: if it boots up with all low it'll stay there.=as others have shuffle the columns to make the table more readable.>=20 > ;CLO AHI BLO CHI ALO BHI=20 > ; 1 0 0 0 0 1 =20 > ; 1 1 0 0 0 0 =20 > ; 0 1 1 0 0 0 =20 > ; 0 0 1 1 0 0 =20 > ; 0 0 0 1 1 0 =20 > ; 0 0 0 0 1 1 =20 >=20 > at it's simplest the formula could be=20 >=20 > CLO :=3D BHI=20 > BHI :=3D ALO=20 > ALO :=3D CHI > CHI :=3D BLO=20 > BLO :=3D AHI=20 > AHI :=3D CLO >=20 > but that doesn't start-up or escape the all-on caseor many other invalid states.>=20 > CLO :=3D BHI & ~BLO =20 > BHI :=3D ALO & ~AHI > ALO :=3D CHI & ~CLO > CHI :=3D BLO & ~BHI=20 > BLO :=3D AHI=20 > AHI :=3D CLO =20 >=20 > this gets you an escape from the all-on case after one clock on by defeat=ing CLO when CHI is due to activate etc for startup.>=20 > CLO :=3D ~BLO & ~ALO & ~CHI =20 > BHI :=3D ~AHI & ~BLO & ~CHI > ALO :=3D CHI & ~CLO > CHI :=3D BLO & ~BHI=20 > BLO :=3D AHI=20 > AHI :=3D CLO =20 >=20 > that will get you into state 1 from full reset.Mr. Johnson might be better. No chance of KILL (HI and LO on) output state= s. Q0 :=3D Q1 Q1 :=3D Q2 Q2 :=3D /Q0 =20 =20 AHI =3D Q2 * /Q1 * /Q0 + Q2 * Q1 * /Q0 ALO =3D /Q2 * Q1 * Q0 + /Q2 * /Q1 * Q0 BHI =3D /Q2 * /Q1 * /Q0 + /Q2 * /Q1 * Q0 BLO =3D Q2 * Q1 * /Q0 + Q2 * Q1 * Q0 CHI =3D Q2 * Q1 * Q0 + /Q2 * Q1 * Q0 CLO =3D /Q2 * /Q1 * /Q0 + Q2 * /Q1 * /Q0
Reply by ●September 19, 20142014-09-19
Den torsdag den 18. september 2014 23.19.13 UTC+2 skrev edward....@gmail.co= m:> > > > BLDC controller: >=20 > > > > http://173.224.223.62/motor >=20 > =20 >=20 > > > > I am thinking about moving the PIC 3 feet away (closer to the contr=ol panel) from this board. There are 6 outputs in 6 possible states. Each= pair of MOSFET can be in HI, LO or KILL (both HI and LO) states. I can ad= d an I/O expander or shift register to minimize the connections, but that i= ncrease the chance of KILL states due to communication error. So, i am thi= nking about a 3 to 6 decoder like ATF16V8B (EE) or even GAL16V8B/PAL16V8B. = I need the EE version just to develop the logic, but don't really want it = changeable or erasable anyway. Or just buy enough GAL16V8B/PAL16V8B to bur= n and dump them.>=20 > >=20 >=20 > > > > I read that these are old chips and moderm USB programmer might not=handle them well. Can someone recommend a cheap programmer for them?>=20 > >=20 >=20 > > > I can't read what those drivers are, but most of them will not let y=ou turn on both the top an bottom fet at the same time.=20>=20 > >=20 >=20 > > Most have independent HI and LO inputs and outputs. Even if the gate d=river can prevent it, the controller should not try to test it.>=20 > >=20 >=20 > > > you'll need inputs for either either phase voltages or hall sensors t=o run a BLDC motor=20>=20 > >=20 >=20 > > Signal and sensors can run on thinner wires or even opto-isolated. Pha=sed power lines cannot be opto-isolated.>=20 >=20 >=20 > There will be only one signal input, with frequency controlled by micro o=r 555.>=20 >=20are you going to have another switching converter to set the voltage?=20 a bldc motor is not a stepper=20 -Lasse
Reply by ●September 19, 20142014-09-19
On 2014-09-19, edward.ming.lee@gmail.com <edward.ming.lee@gmail.com> wrote:> On Friday, September 19, 2014 3:21:31 PM UTC-7, Jasen Betts wrote: >> On 2014-09-18, edward.ming.lee@gmail.com <edward.ming.lee@gmail.com> wrote:>> >> ;CLO AHI BLO CHI ALO BHI >> ; 1 0 0 0 0 1 >> ; 1 1 0 0 0 0 >> ; 0 1 1 0 0 0 >> ; 0 0 1 1 0 0 >> ; 0 0 0 1 1 0 >> ; 0 0 0 0 1 1>> CLO := ~BLO & ~ALO & ~CHI >> BHI := ~AHI & ~BLO & ~CHI >> ALO := CHI & ~CLO >> CHI := BLO & ~BHI >> BLO := AHI >> AHI := CLO >> >> that will get you into state 1 from full reset. > > Mr. Johnson might be better. No chance of KILL (HI and LO on) output states.> Q0 := Q1 > Q1 := Q2 > Q2 := /Q0Is there room for 3 d-flops in the chip? the only state is in the output metacells and there are only 2 spares, also if you start that with 0,1,0 it alternates with 1,0,1 So instead of Johnson using a binary counter with bit 2 (value 4) connected to the ALO output might work better, except for the glitches :( -- umop apisdn --- news://freenews.netfront.net/ - complaints: news@netfront.net ---
Reply by ●September 19, 20142014-09-19
On Friday, September 19, 2014 4:47:12 PM UTC-7, Lasse Langwadt Christensen = wrote:> Den torsdag den 18. september 2014 23.19.13 UTC+2 skrev edward....@gmail.=com:>=20 > > > > > BLDC controller: >=20 > > > > > http://173.224.223.62/motor >=20 > > > > > I am thinking about moving the PIC 3 feet away (closer to the con=trol panel) from this board. There are 6 outputs in 6 possible states. Ea= ch pair of MOSFET can be in HI, LO or KILL (both HI and LO) states. I can = add an I/O expander or shift register to minimize the connections, but that= increase the chance of KILL states due to communication error. So, i am t= hinking about a 3 to 6 decoder like ATF16V8B (EE) or even GAL16V8B/PAL16V8B= . I need the EE version just to develop the logic, but don't really want i= t changeable or erasable anyway. Or just buy enough GAL16V8B/PAL16V8B to b= urn and dump them.>=20 > > > > > I read that these are old chips and moderm USB programmer might n=ot handle them well. Can someone recommend a cheap programmer for them?>=20 > > > > I can't read what those drivers are, but most of them will not let=you turn on both the top an bottom fet at the same time.=20>=20 > > > Most have independent HI and LO inputs and outputs. Even if the gate=driver can prevent it, the controller should not try to test it.>=20 > > > > you'll need inputs for either either phase voltages or hall sensors=to run a BLDC motor=20>=20 > > > Signal and sensors can run on thinner wires or even opto-isolated. P=hased power lines cannot be opto-isolated.>=20 > > There will be only one signal input, with frequency controlled by micro=or 555.>=20 > are you going to have another switching converter to set the voltage? a b=ldc motor is not a stepper=20 Yes, or it could just be an array of batteries.
Reply by ●September 20, 20142014-09-20
On Fri, 19 Sep 2014 14:01:54 -0700 (PDT), edward.ming.lee@gmail.com = wrote:>On Friday, September 19, 2014 1:41:49 PM UTC-7, Don Y wrote: >> On 9/18/2014 2:19 PM, edward.ming.lee@gmail.com wrote: >>=20 >> >>>> BLDC controller: >>=20 >> > We want to program the chip as such: >=20 >> > ; +-----------------------------------------------------------+ >> > ; | VCC | VCC | AHI | ALO | BHI | BLO | CHI | CLO | GND | GND | >> > ; |-----------------------------------------------------------| >> > ; | CLK | VCC | VCC | VCC | CLK | REV | GND | GND | GND | GND | >> > ; +-----------------------------------------------------------+ >>=20 >> > ; A,B,C HI,LO =3D Phase A,B,C high and low driver >> > ; CLK =3D Clock >> > ; REV =3D Reverse (Reserve for future use) >>=20 >> > Output sequence: >>=20 >> > ; AHI ALO BHI BLO CHI CLO >> > ; 0 0 1 0 0 1 >> > ; 1 0 0 0 0 1 >> > ; 1 0 0 1 0 0 >> > ; 0 0 0 1 1 0 >> > ; 0 1 0 0 1 0 >> > ; 0 1 1 0 0 0 >>=20 >> Suggest you rewrite this as: >>=20 >> ; CLO AHI BLO CHI ALO BHI >> ; 1 0 0 0 0 1 >> ; 1 1 0 0 0 0 >> ; 0 1 1 0 0 0 >> ; 0 0 1 1 0 0 >> ; 0 0 0 1 1 0 >> ; 0 0 0 0 1 1 > >But the PCB wiring corresponds to "AHI ALO BHI BLO CHI CLO". "CLO AHI =BLO CHI ALO BHI" could be an intermediate state table.> >> to make the desired behavior more obvious (makes it easier to spot =mistakes in the "pattern")>>=20 >> > Writing output as function of previous state: >=20 >> > AHI :=3D /AHI * /ALO * BHI * /BLO * /CHI * CLO + AHI * /ALO * =/BHI * /BLO * /CHI * CLO>> > ALO :=3D /AHI * /ALO * /BHI * BLO * CHI * /CLO + /AHI * ALO * =/BHI * /BLO * CHI * /CLO>> > BHI :=3D /AHI * ALO * BHI * /BLO * /CHI * /CLO + /AHI * ALO * =/BHI * BLO * CHI * /CLO>> > BLO :=3D AHI * /ALO * /BHI * /BLO * /CHI * CLO + AHI * /ALO * =/BHI * BLO * /CHI * /CLO>> > CHI :=3D AHI * /ALO * /BHI * BLO * /CHI * CLO + /AHI * /ALO * =/BHI * BLO * CHI * /CLO>> > CLO :=3D /AHI * ALO * BHI * /BLO * /CHI * /CLO + /AHI * /ALO * =BHI * /BLO * /CHI * CLO>>=20 >> Again, a rewrite (substitutions to trim line length) as: >>=20 >> CL :=3D /CL*/AH*/BL*/CH* AL* BH + CL*/AH*/BL*/CH*/AL* BH >> AH :=3D CL*/AH*/BL*/CH*/AL* BH + CL* AH*/BL*/CH*/AL*/BH >> BL :=3D CL* AH*/BL*/CH*/AL*/BH + /CL* AH* BL*/CH*/AL*/BH >> CH :=3D /CL* AH* BL*/CH*/AL*/BH + /CL*/AH* BL* CH*/AL*/BH >> AL :=3D /CL*/AH* BL* CH*/AL*/BH + /CL*/AH*/BL* CH* AL*/BH >> BH :=3D /CL*/AH*/BL* CH* AL*/BH + /CL*/AH*/BL*/CH* AL* BH >>=20 >> makes the pattern visible in the minterms. [For example, it makes =obvious the errors in your BHI and CHI sums.] [Of course, it's still = early in the day so it is possible *I've* screwed up as well! :> ]> >Actually, this is too unstable. The FSM would work if it's already in =one of the 6 states, out of 64. But if it's not, it won't drop in. I am= switching to decoding a 3 bits Johnson counter:> > Q0 :=3D Q1 > Q1 :=3D Q2 > Q2 :=3D /Q0 =20 > AHI =3D Q2 * /Q1 * /Q0 + Q2 * Q1 * /Q0 > ALO =3D /Q2 * Q1 * Q0 + /Q2 * /Q1 * Q0 > BHI =3D /Q2 * /Q1 * /Q0 + /Q2 * /Q1 * Q0 > BLO =3D Q2 * Q1 * /Q0 + Q2 * Q1 * Q0 > CHI =3D Q2 * Q1 * Q0 + /Q2 * Q1 * Q0 > CLO =3D /Q2 * /Q1 * /Q0 + Q2 * /Q1 * /Q0 > >> You might also think about whether you need any "dead time" at the =clock transition to prevent currents flowing in unexpected ways...> >In that case, it would be 6 bits 12 states Johnson, with alternating =rest state. The Johnson counter should work in theory, but the open = source galemu is not showing the right output. The emulator could be = wrong. I am still digging up old books and web pages to verify the = design by hand.>I know it is a test book nit, but guard against 010/101 states. ?-) =20
Reply by ●September 20, 20142014-09-20
Den l=F8rdag den 20. september 2014 04.25.22 UTC+2 skrev edward....@gmail.c= om:> On Friday, September 19, 2014 4:47:12 PM UTC-7, Lasse Langwadt Christense=n wrote:>=20 > > Den torsdag den 18. september 2014 23.19.13 UTC+2 skrev edward....@gmai=l.com:>=20 > >=20 >=20 > > > > > > BLDC controller: >=20 > >=20 >=20 > > > > > > http://173.224.223.62/motor >=20 > >=20 >=20 > > > > > > I am thinking about moving the PIC 3 feet away (closer to the c=ontrol panel) from this board. There are 6 outputs in 6 possible states. = Each pair of MOSFET can be in HI, LO or KILL (both HI and LO) states. I ca= n add an I/O expander or shift register to minimize the connections, but th= at increase the chance of KILL states due to communication error. So, i am= thinking about a 3 to 6 decoder like ATF16V8B (EE) or even GAL16V8B/PAL16V= 8B. I need the EE version just to develop the logic, but don't really want= it changeable or erasable anyway. Or just buy enough GAL16V8B/PAL16V8B to= burn and dump them.>=20 > >=20 >=20 > > > > > > I read that these are old chips and moderm USB programmer might=not handle them well. Can someone recommend a cheap programmer for them?>=20 > >=20 >=20 > > > > > I can't read what those drivers are, but most of them will not l=et you turn on both the top an bottom fet at the same time.=20>=20 > >=20 >=20 > > > > Most have independent HI and LO inputs and outputs. Even if the ga=te driver can prevent it, the controller should not try to test it.>=20 > >=20 >=20 > > > > > you'll need inputs for either either phase voltages or hall senso=rs to run a BLDC motor=20>=20 > >=20 >=20 > > > > Signal and sensors can run on thinner wires or even opto-isolated. =Phased power lines cannot be opto-isolated.>=20 > >=20 >=20 > > > There will be only one signal input, with frequency controlled by mic=ro or 555.>=20 > >=20 >=20 > > are you going to have another switching converter to set the voltage? a=bldc motor is not a stepper=20>=20 >=20 >=20 > Yes, or it could just be an array of batteries.you don't want any speed control or current limiting? -Lasse
Reply by ●September 20, 20142014-09-20
>Actually, this is too unstable. The FSM would work if it's already in one=of the 6 states, out of 64. But if it's not, it won't drop in. I am swit= ching to decoding a 3 bits Johnson counter:>=20 > > Q0 :=3D Q1 > > Q1 :=3D Q2 > > Q2 :=3D /Q0 =20 > > AHI =3D Q2 * /Q1 * /Q0 + Q2 * Q1 * /Q0 > > ALO =3D /Q2 * Q1 * Q0 + /Q2 * /Q1 * Q0 > > BHI =3D /Q2 * /Q1 * /Q0 + /Q2 * /Q1 * Q0 > > BLO =3D Q2 * Q1 * /Q0 + Q2 * Q1 * Q0 > > CHI =3D Q2 * Q1 * Q0 + /Q2 * Q1 * Q0 > > CLO =3D /Q2 * /Q1 * /Q0 + Q2 * /Q1 * /Q0 >=20 > >> You might also think about whether you need any "dead time" at the clo=ck transition to prevent currents flowing in unexpected ways...>=20 > >In that case, it would be 6 bits 12 states Johnson, with alternating res=t state. The Johnson counter should work in theory, but the open source ga= lemu is not showing the right output. The emulator could be wrong. I am s= till digging up old books and web pages to verify the design by hand.>=20 > I know it is a test book nit, but guard against 010/101 states.It should transition to a valid state within one or two clock pulses. As l= ong as the outputs are zero during the invalid states, we are OK.
Reply by ●September 20, 20142014-09-20
>=20 > > > > > > > BLDC controller: >=20 > > > > > > > http://173.224.223.62/motor >=20 > > > > > > > I am thinking about moving the PIC 3 feet away (closer to the=control panel) from this board. There are 6 outputs in 6 possible states.= Each pair of MOSFET can be in HI, LO or KILL (both HI and LO) states. I = can add an I/O expander or shift register to minimize the connections, but = that increase the chance of KILL states due to communication error. So, i = am thinking about a 3 to 6 decoder like ATF16V8B (EE) or even GAL16V8B/PAL1= 6V8B. I need the EE version just to develop the logic, but don't really wa= nt it changeable or erasable anyway. Or just buy enough GAL16V8B/PAL16V8B = to burn and dump them.>=20 > > > > > > > I read that these are old chips and moderm USB programmer mig=ht not handle them well. Can someone recommend a cheap programmer for them= ?>=20 > > > > > > I can't read what those drivers are, but most of them will not=let you turn on both the top an bottom fet at the same time.=20>=20 > > > > > Most have independent HI and LO inputs and outputs. Even if the =gate driver can prevent it, the controller should not try to test it.>=20 > > > > > > you'll need inputs for either either phase voltages or hall sen=sors to run a BLDC motor=20>=20 > > > > > Signal and sensors can run on thinner wires or even opto-isolated=. Phased power lines cannot be opto-isolated.>=20 > > > > There will be only one signal input, with frequency controlled by m=icro or 555.>=20 > > > are you going to have another switching converter to set the voltage?=a bldc motor is not a stepper=20>=20 > > Yes, or it could just be an array of batteries. >=20 > you don't want any speed control or current limiting?We could still control the speed with frequency of the clock pulses. Curre= nt limiting would need another input pin. Or we could use multi-level inpu= t with additional hardware (voltage comparators) to decode it. For example= , drive enable if 4V < Vin < 8V and count if Vin > 8V. Want to limit input= control to single pair (CTL and GND) of 3 feet wire,
