Electronics-Related.com
Forums

Precision synchronous demodulator

Started by Spehro Pefhany September 23, 2013
Den mandag den 23. september 2013 23.31.17 UTC+2 skrev Spehro Pefhany:
> On Mon, 23 Sep 2013 14:07:29 -0700 (PDT), Lasse Langwadt Christensen > > <langwadt@fonz.dk> wrote: > > > > >Den mandag den 23. september 2013 22.23.49 UTC+2 skrev Spehro Pefhany: > > >> On Mon, 23 Sep 2013 12:05:25 -0700 (PDT), Lasse Langwadt Christensen > > >> > > >> <langwadt@fonz.dk> wrote: > > >> > > >> > > >> > > >> >Den mandag den 23. september 2013 12.05.47 UTC+2 skrev Spehro Pefhany: > > >> > > >> >> What's a good approach for use at 1MHz, give or take 2:1? > > >> > > >> >> > > >> > > >> >> > > >> > > >> >> > > >> > > >> >> Things like the AD630 are slow, and my usualy go-to approach (Gilbert > > >> > > >> >> > > >> > > >> >> Cell balanced demodulator with LO >> Vt) has input referred drift and > > >> > > >> >> > > >> > > >> >> offset typically in the ~1uV/K and a couple mV. I'd like both to be > > >> > > >> >> > > >> > > >> >> better by at least an order of magnitude, and preferably with some > > >> > > >> >> > > >> > > >> >> gain like the Gilbert cell things, which have 15-20dB of gain. > > >> > > >> >> > > >> > > >> >> > > >> > > >> >> > > >> > > >> >> Analog switches have negligible offset- how much trouble will all that > > >> > > >> >> > > >> > > >> >> charge injection (~4pC for a good one) cause at 1-2MHz? > > >> > > >> >> > > >> > > >> > > > >> > > >> >I wonder how well a multiplying dac would work? > > >> > > >> > > > >> > > >> >-Lasse > > >> > > >> > > >> > > >> I doubt it would take kindly to swapping the reference polarity at > > >> > > >> 1MHz-- if it's in digital form anyway, might as well do it digitally. > > > > > >afaikt something like this can do it: > > > > > >http://www.analog.com/static/imported-files/data_sheets/AD5424_5433_5445.pdf > > > > > > > > >-Lasse > > > > Would it be completely silly to apply the input signal to the > reference and drive the DAC inputs to +/- Vref?
That was my thought
> Unfortunately, the > gain is only flat to about 100kHz for the -Vref code.
where do you see that? -Lasse
On Mon, 23 Sep 2013 14:46:49 -0700 (PDT), the renowned Lasse Langwadt
Christensen <langwadt@fonz.dk> wrote:

> >> Unfortunately, the >> gain is only flat to about 100kHz for the -Vref code. > >where do you see that? > >-Lasse
Figure 28 on page 13: http://www.analog.com/static/imported-files/data_sheets/AD5424_5433_5445.pdf I sure would not have expected the bandwidth to be code-dependent. Best regards, Spehro Pefhany -- "it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com
Den tirsdag den 24. september 2013 00.51.35 UTC+2 skrev Spehro Pefhany:
> On Mon, 23 Sep 2013 14:46:49 -0700 (PDT), the renowned Lasse Langwadt > > Christensen <langwadt@fonz.dk> wrote: > > > > > > > >> Unfortunately, the > > >> gain is only flat to about 100kHz for the -Vref code. > > > > > >where do you see that? > > > > > >-Lasse > > > > Figure 28 on page 13: > > http://www.analog.com/static/imported-files/data_sheets/AD5424_5433_5445.pdf > > > > I sure would not have expected the bandwidth to be code-dependent. >
to me that look more like an unipolar case illustrating of the limited "isolation" at higher frequencies -Lasse
On 09/23/2013 06:51 PM, Spehro Pefhany wrote:
> On Mon, 23 Sep 2013 14:46:49 -0700 (PDT), the renowned Lasse Langwadt > Christensen <langwadt@fonz.dk> wrote: > >> >>> Unfortunately, the >>> gain is only flat to about 100kHz for the -Vref code. >> >> where do you see that? >> >> -Lasse > > Figure 28 on page 13: > http://www.analog.com/static/imported-files/data_sheets/AD5424_5433_5445.pdf > > I sure would not have expected the bandwidth to be code-dependent. > > > > Best regards, > Spehro Pefhany >
They always are--that's why MDACs are so disappointing for signal processing. Too many copies of the switch capacitance, and too small a voltage divider ratio for the intended path to swamp it out at codes near 0. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
On Mon, 23 Sep 2013 15:37:10 -0400, Spehro Pefhany
<speffSNIP@interlogDOTyou.knowwhat> wrote:

>On Mon, 23 Sep 2013 09:01:19 -0700, John Larkin ><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: > >>On Mon, 23 Sep 2013 11:31:12 -0400, Spehro Pefhany >><speffSNIP@interlogDOTyou.knowwhat> wrote: >> >>>On Mon, 23 Sep 2013 07:49:02 -0700, John Larkin >>><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>> >>>>On Mon, 23 Sep 2013 06:05:47 -0400, Spehro Pefhany >>>><speffSNIP@interlogDOTyou.knowwhat> wrote: >>>> >>>>>What's a good approach for use at 1MHz, give or take 2:1? >>>>> >>>>>Things like the AD630 are slow, and my usualy go-to approach (Gilbert >>>>>Cell balanced demodulator with LO >> Vt) has input referred drift and >>>>>offset typically in the ~1uV/K and a couple mV. I'd like both to be >>>>>better by at least an order of magnitude, and preferably with some >>>>>gain like the Gilbert cell things, which have 15-20dB of gain. >>>>> >>>>>Analog switches have negligible offset- how much trouble will all that >>>>>charge injection (~4pC for a good one) cause at 1-2MHz? >>>>> >>>>> >>>>>Best regards, >>>>>Spehro Pefhany >>>> >>>>Can you bandpass filter some first? That would directly take burden off the >>>>synchronous detector. >>> >>>Yes, I have a 2nd order BPF. Q is not very high. An all-pass such as >>>Bill suggested might make sense in this case. >> >>The effective bandpass of your system will be tiny. You need the get the phase >>close at the demod frequency, but that doesn't need an all-pass. It's customary >>to trim the digital clock phase to match the analog paths. Cos is flat on top, >>so small phase errors have a tiny effect on gain. > >Of course you have to let the sidebands through the BPF. > >>>>There are cmos switches rated for below 1 pC injection. And they have a >>>>common-mode voltage sweet spot, where injection crosses through zero. You can >>>>tweak the power supplies so's to operate there. >>> >>>That's an interesting technique. >>> >>>>There should be some clever dual-path sync demod architecture that cancels most >>>>charge injection offset errors. Build two identical detectors and feed them >>>>antiphase signals and take the difference, something like that. >>> >>>I'm thinking the glitches will only cause major troubles if there is >>>nonlinearity. >> >>The usual hazard is DC offset, and offset vs temperature. >>Oh, beware of charge-injection spikes getting into opamps, into their inputs or >>their outputs. That can cause bizarre problems. > >That's the kind of thing I'm worried about. Op-amps like to act as >detectors all on their own sometimes. > >>>I guess I could make a fully-differential output amplifier (or use an >>>ADC driver chip) to keep the signals closely antiphase. Or (horrors) >>>use a little RF tranformer with a grounded centertap. >> >>They don't have to be very closely antiphase. A modest amplitude or phase error >>will just make a small gain change. > >I don't think so.. but please tell me if I missed something. If I have >a 1mV signal and 1V of offset (LF noise), the average will be: > >1mV + 1V - (-1mV + 1V) = 2mV signal > >If the 2nd one is * 0.99, then I'll have > >1mV + 1V - (-0.99mV + 0.99V) = 1.99mV signal + 10mV error
Well, I don't understand that. I was figuring that each detector might have about the same charge-injection inspired zero-signal offset vs temperature, which we'd subtract. And they would produce opposite-polarity signals, which we'd also subtract. Their detected noise signals are opposite polarity, so, like the signal, "add" when subtracted. So the result is twice the gain of a single detector for both signal and noise, but we get to cancel any offset. Something like that. -- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators
On Tue, 24 Sep 2013 06:38:27 -0700, John Larkin
<jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:

>> >>1mV + 1V - (-1mV + 1V) = 2mV signal >> >>If the 2nd one is * 0.99, then I'll have >> >>1mV + 1V - (-0.99mV + 0.99V) = 1.99mV signal + 10mV error > >Well, I don't understand that. I was figuring that each detector might have >about the same charge-injection inspired zero-signal offset vs temperature, >which we'd subtract. And they would produce opposite-polarity signals, which >we'd also subtract. Their detected noise signals are opposite polarity, so, like >the signal, "add" when subtracted. So the result is twice the gain of a single >detector for both signal and noise, but we get to cancel any offset. Something >like that.
Okay, I think I know what you're talking about. Two detectors operating on antiphase input (and the same LO) allows you to subtract out artifacts due to the detectors, to the extent that they are well matched. Subtraction done after demodulation, of course. Presumably with Gilbert cell demods we'd get ~sqrt(2) worse since they're already as well matched as possible.
Den tirsdag den 24. september 2013 01.03.18 UTC+2 skrev Lasse Langwadt Christensen:
> Den tirsdag den 24. september 2013 00.51.35 UTC+2 skrev Spehro Pefhany: > > > On Mon, 23 Sep 2013 14:46:49 -0700 (PDT), the renowned Lasse Langwadt > > > > > > Christensen <langwadt@fonz.dk> wrote: > > > > > > > > > > > > > > > > > > > >> Unfortunately, the > > > > > > >> gain is only flat to about 100kHz for the -Vref code. > > > > > > > > > > > > > >where do you see that? > > > > > > > > > > > > > >-Lasse > > > > > > > > > > > > Figure 28 on page 13: > > > > > > http://www.analog.com/static/imported-files/data_sheets/AD5424_5433_5445.pdf > > > > > > > > I sure would not have expected the bandwidth to be code-dependent. > > > > to me that look more like an unipolar case illustrating of the limited >"isolation" at higher frequencies >
I see it now, I should have read the datasheet ;) I somehow thought it could actually do bipolar, but they use an opamp to do it in a "switch hitter" -Lasse
On Tue, 24 Sep 2013 14:06:39 -0400, Spehro Pefhany wrote:

> On Tue, 24 Sep 2013 06:38:27 -0700, John Larkin > <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: > > >>>1mV + 1V - (-1mV + 1V) = 2mV signal >>> >>>If the 2nd one is * 0.99, then I'll have >>> >>>1mV + 1V - (-0.99mV + 0.99V) = 1.99mV signal + 10mV error >> >>Well, I don't understand that. I was figuring that each detector might >>have about the same charge-injection inspired zero-signal offset vs >>temperature, which we'd subtract. And they would produce >>opposite-polarity signals, which we'd also subtract. Their detected >>noise signals are opposite polarity, so, like the signal, "add" when >>subtracted. So the result is twice the gain of a single detector for >>both signal and noise, but we get to cancel any offset. Something like >>that. > > Okay, I think I know what you're talking about. Two detectors operating > on antiphase input (and the same LO) allows you to subtract out > artifacts due to the detectors, to the extent that they are well > matched. Subtraction done after demodulation, of course. > > Presumably with Gilbert cell demods we'd get ~sqrt(2) worse since > they're already as well matched as possible.
The devil sez: You know that by the time you get all these analog gew-gaws on there, you could've just ADC'd it and FPGA'd it and it'd work... -- Tim Wescott Wescott Design Services http://www.wescottdesign.com
On Mon, 23 Sep 2013 06:05:47 -0400, Spehro Pefhany wrote:

> What's a good approach for use at 1MHz, give or take 2:1? > > Things like the AD630 are slow, and my usualy go-to approach (Gilbert > Cell balanced demodulator with LO >> Vt) has input referred drift and > offset typically in the ~1uV/K and a couple mV. I'd like both to be > better by at least an order of magnitude, and preferably with some gain > like the Gilbert cell things, which have 15-20dB of gain. > > Analog switches have negligible offset- how much trouble will all that > charge injection (~4pC for a good one) cause at 1-2MHz?
I know it doesn't have the gain you want, but have you considered a diode- ring mixer? With care taken to keep the LO where the LO belongs, and maybe a preamp to get the overall gain you want, you may be able to do as well or better than a Gilbert Cell mixer. Mini-Circuits may even have something you can just slap in... -- Tim Wescott Wescott Design Services http://www.wescottdesign.com
On Tue, 24 Sep 2013 14:06:39 -0400, Spehro Pefhany
<speffSNIP@interlogDOTyou.knowwhat> wrote:

>On Tue, 24 Sep 2013 06:38:27 -0700, John Larkin ><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: > >>> >>>1mV + 1V - (-1mV + 1V) = 2mV signal >>> >>>If the 2nd one is * 0.99, then I'll have >>> >>>1mV + 1V - (-0.99mV + 0.99V) = 1.99mV signal + 10mV error >> >>Well, I don't understand that. I was figuring that each detector might have >>about the same charge-injection inspired zero-signal offset vs temperature, >>which we'd subtract. And they would produce opposite-polarity signals, which >>we'd also subtract. Their detected noise signals are opposite polarity, so, like >>the signal, "add" when subtracted. So the result is twice the gain of a single >>detector for both signal and noise, but we get to cancel any offset. Something >>like that. > >Okay, I think I know what you're talking about. Two detectors >operating on antiphase input (and the same LO) allows you to subtract >out artifacts due to the detectors, to the extent that they are well >matched. Subtraction done after demodulation, of course. > >Presumably with Gilbert cell demods we'd get ~sqrt(2) worse since >they're already as well matched as possible. >
Or the same signal, but flip the LO phase. I'm assuming that you're groveling for nanovolts and this sort of effort is worth it. Hmmm, you could also flip the LO phase, say, once a second, digitize the PSD output, and subtract the samples taken during opposite clock phases. That's sort of one lock-in inside another lock-in. Any DC offset or other constant error, in the PSD or ADC, gets removed. -- John Larkin Highland Technology, Inc jlarkin at highlandtechnology dot com http://www.highlandtechnology.com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom laser drivers and controllers Photonics and fiberoptic TTL data links VME thermocouple, LVDT, synchro acquisition and simulation