https://www.google.com/patents/WO1998016040A1?cl=en&dq=robert+adams+analog+devices+spdif&hl=en&sa=X&ei=edlAUp_aB4-64AOlhoCgDA&ved=0CDYQ6AEwAA
differential Manchester decoder and FIFO
Started by ●September 22, 2013
Reply by ●September 23, 20132013-09-23
Reply by ●September 23, 20132013-09-23
On Mon, 23 Sep 2013 16:50:55 -0700, Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:>On Sun, 22 Sep 2013 22:53:43 +0200, p <1@2.3> wrote: > >>I need to make a bi-phase / differential Manchester decoder (max. >>frequency of recovered clock about 10MHz) and asynchronous FIFO 1 bit * >>~100...~1000. >>How can I do this and what is best suitable to do it ? >> >>Thanks in advance. > >I puzzled over you might automate determining the data rate. Turns >out if you do an integrate and dump on the Manchester signal... > >http://www.analog-innovations.com/SED/DifferentialManchesterEncoder.pdf > >you get an average value proportional to data rate. > >Since you have a very wide frequency range I'd suggest AGC'ing the >integrate current to keep the integration from clipping, then use a >replica of that same current to time the 0.75*TB one-shots to restore >the clocks. > >All Analog ;-) No FPGA's. > > ...Jim ThompsonI'm not so sure now. I think it needs some further math :-( ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Reply by ●September 23, 20132013-09-23
On Mon, 23 Sep 2013 17:20:58 -0700, Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:>On Mon, 23 Sep 2013 16:50:55 -0700, Jim Thompson ><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: > >>On Sun, 22 Sep 2013 22:53:43 +0200, p <1@2.3> wrote: >> >>>I need to make a bi-phase / differential Manchester decoder (max. >>>frequency of recovered clock about 10MHz) and asynchronous FIFO 1 bit * >>>~100...~1000. >>>How can I do this and what is best suitable to do it ? >>> >>>Thanks in advance. >> >>I puzzled over you might automate determining the data rate. Turns >>out if you do an integrate and dump on the Manchester signal... >> >>http://www.analog-innovations.com/SED/DifferentialManchesterEncoder.pdf >> >>you get an average value proportional to data rate. >> >>Since you have a very wide frequency range I'd suggest AGC'ing the >>integrate current to keep the integration from clipping, then use a >>replica of that same current to time the 0.75*TB one-shots to restore >>the clocks. >> >>All Analog ;-) No FPGA's. >> >> ...Jim Thompson > >I'm not so sure now. I think it needs some further math :-( > > ...Jim ThompsonYep, It's good. Got myself confused there momentarily. It works. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Reply by ●September 24, 20132013-09-24
On 9/23/2013 8:29 PM, Jim Thompson wrote:> On Mon, 23 Sep 2013 17:20:58 -0700, Jim Thompson > <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: > >> On Mon, 23 Sep 2013 16:50:55 -0700, Jim Thompson >> <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >> >>> On Sun, 22 Sep 2013 22:53:43 +0200, p<1@2.3> wrote: >>> >>>> I need to make a bi-phase / differential Manchester decoder (max. >>>> frequency of recovered clock about 10MHz) and asynchronous FIFO 1 bit * >>>> ~100...~1000. >>>> How can I do this and what is best suitable to do it ? >>>> >>>> Thanks in advance. >>> >>> I puzzled over you might automate determining the data rate. Turns >>> out if you do an integrate and dump on the Manchester signal... >>> >>> http://www.analog-innovations.com/SED/DifferentialManchesterEncoder.pdf >>> >>> you get an average value proportional to data rate. >>> >>> Since you have a very wide frequency range I'd suggest AGC'ing the >>> integrate current to keep the integration from clipping, then use a >>> replica of that same current to time the 0.75*TB one-shots to restore >>> the clocks. >>> >>> All Analog ;-) No FPGA's. >>> >>> ...Jim Thompson >> >> I'm not so sure now. I think it needs some further math :-( >> >> ...Jim Thompson > > Yep, It's good. Got myself confused there momentarily. It works. > > ...Jim ThompsonI didn't analyze your circuit entirely, but the XOR gates with the shift register seem to be a LFSR or something similar used to produce a pseudo random sequence. No? So how does your circuit work if the data stream is *not* pseudo random? That is, how does the data pattern affect the voltage? Looks to me like this circuit detects the rate of transitions rather than the rate of the clock which is what is needed. I think it is very sensitive to the data pattern and will not produce a constant voltage if the data pattern is varied while the clock rate remains constant. Try your simulation with an all 1's data pattern and an all 0's data pattern and see if the average voltage is the same. I think it will be 2:1. On the other hand an all digital approach can be made to work. If the OP needs some help with the problem I am available. -- Rick
Reply by ●September 24, 20132013-09-24
> There is another M en/decoder that runs at 10mhz. HD-15????I found HD-15530 and HD-15531, both under 10Mbit.
Reply by ●September 24, 20132013-09-24
> That could be tough. I did a design similar to this in an FPGA. It > received a simple bit stream and had to sync to the transitions. But it > had a timing setting to establish the base frequency approximately. > > This design used a locked loop to adjust the NCO to the bit rate. Since > the base frequency was set by the user the search mode is not overly > aggressive. In your case you might need to use a rather aggressive > search mode to set the base frequency very quickly, or even do a > frequency measurement for a direct setting. > > Do you have a spec on the data stream format you will need to sync to?S/PDIF.> As others have indicated, there should be a preamble which would be a > stream of bits which produce a single transition in the Manchester > encoded stream. Knowing the length of this preamble will give you an > idea of how quickly your circuit will need to adapt to the data > frequency and lock up to the data stream.Lost of first bits is no problem.
Reply by ●September 24, 20132013-09-24
> https://www.google.com/patents/WO1998016040A1?cl=en&dq=robert+adams+analog+devices+spdif&hl=en&sa=X&ei=edlAUp_aB4-64AOlhoCgDA&ved=0CDYQ6AEwAAThanks, but I don't know why there is a lack of images.
Reply by ●September 24, 20132013-09-24
On Tue, 24 Sep 2013 21:46:36 +0200, p <1@2.3> wrote:>> https://www.google.com/patents/WO1998016040A1?cl=en&dq=robert+adams+analog+devices+spdif&hl=en&sa=X&ei=edlAUp_aB4-64AOlhoCgDA&ved=0CDYQ6AEwAA > >Thanks, but I don't know why there is a lack of images.Try this link to the issued patent... <http://free.patentfetcher.com/Patent-Fetcher.php?submit=Fetch&PN=5889820> A digital implementation similar in concept to my analog posting. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Reply by ●September 24, 20132013-09-24
Yes , I am the author of that patent , and the concept came from an analog implementation that is similar to your description. Bob
Reply by ●September 25, 20132013-09-25
On 9/24/2013 3:18 PM, p wrote:>> That could be tough. I did a design similar to this in an FPGA. It >> received a simple bit stream and had to sync to the transitions. But >> it had a timing setting to establish the base frequency approximately. >> >> This design used a locked loop to adjust the NCO to the bit rate. >> Since the base frequency was set by the user the search mode is not >> overly aggressive. In your case you might need to use a rather >> aggressive search mode to set the base frequency very quickly, or even >> do a frequency measurement for a direct setting. >> >> Do you have a spec on the data stream format you will need to sync to? > > S/PDIF. > >> As others have indicated, there should be a preamble which would be a >> stream of bits which produce a single transition in the Manchester >> encoded stream. Knowing the length of this preamble will give you an >> idea of how quickly your circuit will need to adapt to the data >> frequency and lock up to the data stream. > > Lost of first bits is no problem.So what is the problem exactly? Do you not know where to begin? The patent shows one way of doing it. There are other ways of cooking the goose. Do you understand the separate functions that are needed? Clock rate detection, bit synchronization, data extraction? -- Rick
