Forums

High resolution PWM for fake DACs

Started by Phil Hobbs August 29, 2013
Hi, all,

I've been working on an automatically-tweaked noise canceller design 
with my trusty code and layout Sherpas-in-training (my son and my 
younger daughter).

I need about 10 slow but high resolution DAC outputs for the tweaks, and 
I was thinking about using PWMs run from the LPC1769 processor for at 
least some of them.

I can close the loop on them with an on-board delta-sigma ADC (AD7708 or 
maybe AD7718) for an occasional sanity check.

I'd need some level shifting and stuff to make the required voltage 
ranges in any case, so the complexity isn't that different from using an 
actual DAC, and it would be a lot cheaper.

They're going into low level signal circuitry, is the only real issue, 
so things like the noise on the logic supply will need dealing with, 
e.g. by running it through a 74HCT04 powered from a clean 5V rail.

Suggestions?  Pitfalls to beware of?

Cheers

Phil Hobbs


-- 
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510 USA
+1 845 480 2058

hobbs at electrooptical dot net
http://electrooptical.net

Phil Hobbs schrieb:

> I need about 10 slow but high resolution DAC outputs for the tweaks, and > I was thinking about using PWMs run from the LPC1769 processor for at > least some of them.
Hello, the problem of high resolution PWM is the necessary long period time and the low pass filter for very low frequency. I saw a different aproach in a Fluke calibrator, they used two PWMs together, one for the first 4 decades and one for the last decade. But this requires two resistors with very precise values. Bye
On Fri, 30 Aug 2013 12:37:15 +0200, the renowned Uwe Hercksen
<hercksen@mew.uni-erlangen.de> wrote:

> > >Phil Hobbs schrieb: > >> I need about 10 slow but high resolution DAC outputs for the tweaks, and >> I was thinking about using PWMs run from the LPC1769 processor for at >> least some of them. > >Hello, > >the problem of high resolution PWM is the necessary long period time and >the low pass filter for very low frequency. > >I saw a different aproach in a Fluke calibrator, they used two PWMs >together, one for the first 4 decades and one for the last decade. But >this requires two resistors with very precise values. > >Bye
Why very precise? If you're only looking for 3.3 bits more, the ratio match can be pretty sloppy. Best regards, Spehro Pefhany -- "it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com

Spehro Pefhany schrieb:

> Why very precise? If you're only looking for 3.3 bits more, the ratio > match can be pretty sloppy.
Hello, you should not compare to the least significant digit of the 4 decades, you should compare to the most significant digit. The ratio is 9999/1 not 10/1. Bye
On Fri, 30 Aug 2013 13:55:18 +0200, the renowned Uwe Hercksen
<hercksen@mew.uni-erlangen.de> wrote:

> > >Spehro Pefhany schrieb: > >> Why very precise? If you're only looking for 3.3 bits more, the ratio >> match can be pretty sloppy. > >Hello, > >you should not compare to the least significant digit of the 4 decades, >you should compare to the most significant digit. The ratio is 9999/1 >not 10/1. > >Bye
You're talking about a voltage divider with a ratio of, say 1000:1 Say 1M and 1K, with each end effectively connected to a voltage between 0V and Vref (depending on the duty cycle of each). (ignoring the switch resistances!) So if the 1M is actually 1.05M or 0.95M, what will the effect on the ouput voltage be? Best case is when both PWMs switch at the same time- the values of the resistors don't matter at all. Worst case is when the two voltage are opposing each other, say 0V on the 1K and +Vref on the 1M. The voltage on the output node will be Vref * 1K/(1M + 1K) = 0.000999 * Vref (just under 1 LSB in the other PWM). If the 1M is actually 1.05M, the voltage will be 1K/(1.05M + 1K)* Vref = 0.0009515 * Vref The error is ~-0.005%, or less than 0.5 LSB of the composite converter (one LSB is 1 part in 10,000 of the full scale voltage). Assuming one uses good resistors, the bigger error will probably come from the switch resistance associated with the lower value resistor. Best regards, Spehro Pefhany -- "it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com