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Low cost and/or small size CPU in an FPGA

Started by hamilton April 24, 2013
The discussion has got me to wonder, what is the lowest cost and/or the 
smallest CPU in an FPGA.

Can a CPU with reasonable code space fit into a 44 pin FPGA ?

Are there any 44 pin FPGAs ?

hamilton
On a sunny day (Wed, 24 Apr 2013 07:36:29 -0600) it happened hamilton
<hamilton@nothere.com> wrote in <kl8mv3$c0b$1@dont-email.me>:

>The discussion has got me to wonder, what is the lowest cost and/or the >smallest CPU in an FPGA. > >Can a CPU with reasonable code space fit into a 44 pin FPGA ?
Depends on the number of gates, logical units, not on the number of pins. It is relatively easy to write your own processor (clone), look here: http://opencores.org/projects under processors for what people have done and made available.
>Are there any 44 pin FPGAs ?
Anywhere near that number of pins yes.
>hamilton
There are very cheap simple Altera FPGA boards on ebay too I have seen (have not tried those). 'Processor' is not always needed in FPGA, the idea is just to do things with logic that can run concurrently (sat at the same time) that otherwise have to be done sequentially. No latency, CPUs always have (instruction) latency.

hamilton schrieb:

> Can a CPU with reasonable code space fit into a 44 pin FPGA ?
Hello, if we only look for the needed pins, these CPUs would fit: separate 8 bit data and 16 bit address bus separate 16 bit data and 16 bit address bus separate 16 bit data and 20 bit address bus multiplexed 16 bit data and address bus multiplexed 16 bit data and 32 bit address bus multiplexed 32 bit data and address bus The number of gates necessary depends on the size of the instruction set. A RISC CPU with serial processing in the ALU would be slow but small. Bye
On 4/24/2013 8:36 AM, hamilton wrote:

> The discussion has got me to wonder, what is the lowest cost and/or the > smallest CPU in an FPGA.
AFAIR the i8080A was ~6000 transistors. Modern 8bit core like PIC18 or AVR is ~200000 transistors. This gives the ballpark of gate number.
> Can a CPU with reasonable code space fit into a 44 pin FPGA ?
Unlikely. Vladimir Vassilevsky DSP and Mixed Signal Designs www.abvolt.com
On Apr 24, 3:36=A0pm, hamilton <hamil...@nothere.com> wrote:
> The discussion has got me to wonder, what is the lowest cost and/or the > smallest CPU in an FPGA. > > Can a CPU with reasonable code space fit into a 44 pin FPGA ? > > Are there any 44 pin FPGAs ? > > hamilton
I think limiting factor is usually memory, not the cpu guess you could do something with an external serial flash some of them a quite fast, and it wouldn't take much logic to take advantage of the read address auto increment -Lasse
On 4/24/2013 9:43 AM, langwadt@fonz.dk wrote:
> On Apr 24, 3:36 pm, hamilton <hamil...@nothere.com> wrote: >> The discussion has got me to wonder, what is the lowest cost and/or the >> smallest CPU in an FPGA. >> >> Can a CPU with reasonable code space fit into a 44 pin FPGA ? >> >> Are there any 44 pin FPGAs ? >> >> hamilton > > I think limiting factor is usually memory, not the cpu > > guess you could do something with an external serial flash > some of them a quite fast, and it wouldn't take much logic > to take advantage of the read address auto increment > > > -Lasse >
Ok, my goal. I need a uP and some logic, but I would like to do it with one part. 208 pins just won't fit into my package. Thanks hamilton
hamilton <hamilton@nothere.com> wrote:

>The discussion has got me to wonder, what is the lowest cost and/or the >smallest CPU in an FPGA.
I've used the Picoblaze CPU from Xilinx in several projects. AFAIK that is the smallest useful FPGA cpu. -- Failure does not prove something is impossible, failure simply indicates you are not using the right tools... nico@nctdevpuntnl (punt=.) --------------------------------------------------------------
On 4/25/2013 12:21 AM, hamilton wrote:
> On 4/24/2013 9:43 AM, langwadt@fonz.dk wrote: >> On Apr 24, 3:36 pm, hamilton <hamil...@nothere.com> wrote: >>> The discussion has got me to wonder, what is the lowest cost and/or the >>> smallest CPU in an FPGA. >>> >>> Can a CPU with reasonable code space fit into a 44 pin FPGA ? >>> >>> Are there any 44 pin FPGAs ? >>> >>> hamilton >> >> I think limiting factor is usually memory, not the cpu >> >> guess you could do something with an external serial flash >> some of them a quite fast, and it wouldn't take much logic >> to take advantage of the read address auto increment >> >> >> -Lasse >> > Ok, my goal. > > I need a uP and some logic, but I would like to do it with one part. > > 208 pins just won't fit into my package.
Have you looked at any of the FPGA lines yet? If package is a big deal, you need to pull up some data sheets and check out the packages. The parts I have used or will be using are the XP from Lattice in the 100 pin QFP and the iCE40 also from Lattice in several useful packages. The iCE40 data sheet shows a 32 pin QFN, an 84 pin QFN and 100 and 144 pin QFP. Everything else is some fine pitch BGA which I prefer not to use because of the small drills and fine pitch required of the PCBs. Xilinx and Altera may have some parts in non-BGA packages too, I'm not so familiar with those lines. Both of the Lattice families I mention have on chip Flash or one time programmable memory. That saves a chip or two for programming. -- Rick
On 4/24/2013 9:36 AM, hamilton wrote:
> The discussion has got me to wonder, what is the lowest cost and/or the > smallest CPU in an FPGA. > > Can a CPU with reasonable code space fit into a 44 pin FPGA ? > > Are there any 44 pin FPGAs ?
BTW, you might want to post this to comp.lang.forth They discuss MISC often there. -- Rick
hamilton <hamilton@nothere.com> writes:

> On 4/24/2013 9:43 AM, langwadt@fonz.dk wrote: >> On Apr 24, 3:36 pm, hamilton <hamil...@nothere.com> wrote: >>> The discussion has got me to wonder, what is the lowest cost and/or the >>> smallest CPU in an FPGA. >>> >>> Can a CPU with reasonable code space fit into a 44 pin FPGA ? >>> >>> Are there any 44 pin FPGAs ? >>> >>> hamilton >> >> I think limiting factor is usually memory, not the cpu >> >> guess you could do something with an external serial flash >> some of them a quite fast, and it wouldn't take much logic >> to take advantage of the read address auto increment >> >> >> -Lasse >> > Ok, my goal. > > I need a uP and some logic, but I would like to do it with one part. > > 208 pins just won't fit into my package.
ADUC702x has a quite simple programmable array (just combinatorial IIRC). -- John Devereux