Forums

Design your own NAND FLASH Die

Started by mook johnson April 23, 2013
Gents,

I wondering if any of you have information on companies that can perform 
this service.

We are looking for a SLC Nand flash that can operate at high temperature 
reliably (near 200C)

Turns out the older SLC NAND chip would do this regularly but as the die 
shrinks and density increases have occurred, the high temperature 
performance has fallen off.

I'm looking for a company not named Toshiba, Samsung or Micron (I've 
checked with them), that can create a special version of NAND that 
represents older technology with larger die process.  There are silicon 
constriction techniques that tolerate operation at high temperature. 
Bare die is fine and no packaging of the part is necessary.

I'm looking for somewhere around 16BGbits total and 3.3V supplies.


thanks.






On a sunny day (Tue, 23 Apr 2013 06:51:46 -0500) it happened mook johnson
<mook@mook.net> wrote in <517675c5$0$11390$862e30e2@ngroups.net>:

>Gents, > >I wondering if any of you have information on companies that can perform >this service. > >We are looking for a SLC Nand flash that can operate at high temperature >reliably (near 200C) > >Turns out the older SLC NAND chip would do this regularly but as the die >shrinks and density increases have occurred, the high temperature >performance has fallen off. > >I'm looking for a company not named Toshiba, Samsung or Micron (I've >checked with them), that can create a special version of NAND that >represents older technology with larger die process. There are silicon >constriction techniques that tolerate operation at high temperature. >Bare die is fine and no packaging of the part is necessary. > >I'm looking for somewhere around 16BGbits total and 3.3V supplies. > > >thanks.
Well you have mentioned the bigger companies. How about Peltier cooling one of theirs? Dunno your budget, but 'have a company create' sounds like a bit expensive, or expensive per bit (pun intended).
Spansion are moving into NAND.

Looking at the ECC they require suggests that they are using an older geometry.

Colin

On Tue, 23 Apr 2013 06:51:46 -0500, mook johnson <mook@mook.net>
wrote:

>Gents, > >I wondering if any of you have information on companies that can perform >this service. > >We are looking for a SLC Nand flash that can operate at high temperature >reliably (near 200C) > >Turns out the older SLC NAND chip would do this regularly but as the die >shrinks and density increases have occurred, the high temperature >performance has fallen off. > >I'm looking for a company not named Toshiba, Samsung or Micron (I've >checked with them), that can create a special version of NAND that >represents older technology with larger die process. There are silicon >constriction techniques that tolerate operation at high temperature. >Bare die is fine and no packaging of the part is necessary. > >I'm looking for somewhere around 16BGbits total and 3.3V supplies. > > >thanks. > >
Small feature size == LEAKAGE, which is why it's become hell on wheels to do low-voltage Analog. TSMC, UMC & X-Fab all have older, large feature-size processes available. I don't know if what you have in mind is small enough to fit on a MOSIS MPW (Multi-Project-Wafer) for one of those processes. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
mook johnson <mook@mook.net> wrote:

>Gents, > >I wondering if any of you have information on companies that can perform >this service. > >We are looking for a SLC Nand flash that can operate at high temperature >reliably (near 200C) > >Turns out the older SLC NAND chip would do this regularly but as the die >shrinks and density increases have occurred, the high temperature >performance has fallen off. > >I'm looking for a company not named Toshiba, Samsung or Micron (I've >checked with them), that can create a special version of NAND that >represents older technology with larger die process. There are silicon >constriction techniques that tolerate operation at high temperature. >Bare die is fine and no packaging of the part is necessary.
Did you contact Windond or SSI? One of these companies specialises in older memory types. -- Failure does not prove something is impossible, failure simply indicates you are not using the right tools... nico@nctdevpuntnl (punt=.) --------------------------------------------------------------
nico@puntnl.niks (Nico Coesel) wrote:

>mook johnson <mook@mook.net> wrote: > >>Gents, >> >>I wondering if any of you have information on companies that can perform >>this service. >> >>We are looking for a SLC Nand flash that can operate at high temperature >>reliably (near 200C) >> >>Turns out the older SLC NAND chip would do this regularly but as the die >>shrinks and density increases have occurred, the high temperature >>performance has fallen off. >> >>I'm looking for a company not named Toshiba, Samsung or Micron (I've >>checked with them), that can create a special version of NAND that >>represents older technology with larger die process. There are silicon >>constriction techniques that tolerate operation at high temperature. >>Bare die is fine and no packaging of the part is necessary. > >Did you contact Windond or SSI? One of these companies specialises in >older memory types.
SSI must be ISSI -- Failure does not prove something is impossible, failure simply indicates you are not using the right tools... nico@nctdevpuntnl (punt=.) --------------------------------------------------------------
Jim Thompson wrote:


> > I don't know if what you have in mind is small enough to fit on a > MOSIS MPW (Multi-Project-Wafer) for one of those processes.
Sure, we had a 6 x 7 mm chip built by MOSIS on the On Semi (formerly AMI) C5N process. They can do bigger, for sure, but you pay by the square mm. That is a 500 nm process, so not too compact for memory, but it suited out mixed-signal project well. Not sure that process has the layers for a flash memory, however, and with MOSIS, you have to take the layers as they are, no tweaking the process for your specific design. The minimum of 40 chips runs about $8000 last time we did a quote on that process. It is probably the cheapest process at MOSIS, too (at least by the square mm). Jon
On Wed, 24 Apr 2013 11:49:57 -0500, Jon Elson <elson@pico-systems.com>
wrote:

>Jim Thompson wrote: > > >> >> I don't know if what you have in mind is small enough to fit on a >> MOSIS MPW (Multi-Project-Wafer) for one of those processes. >Sure, we had a 6 x 7 mm chip built by MOSIS on the On Semi (formerly >AMI) C5N process. They can do bigger, for sure, but you pay by >the square mm. That is a 500 nm process, so not too compact for >memory, but it suited out mixed-signal project well. Not sure >that process has the layers for a flash memory, however, and >with MOSIS, you have to take the layers as they are, no tweaking >the process for your specific design. The minimum of 40 chips >runs about $8000 last time we did a quote on that process. It >is probably the cheapest process at MOSIS, too (at least by the >square mm). > >Jon
Yep. I know the AMI processes quite well. Ran several chips there at Pocatello way before ON Semi came along. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.