On Oct 3, 1:15=A0pm, "k...@att.bizzzzzzzzzzzz" <k...@att.bizzzzzzzzzzzz> wrote:> On Tue, 2 Oct 2012 19:43:44 -0700 (PDT), dagmargoodb...@yahoo.com wrote: > >On Oct 1, 10:09=A0pm, "Vladimir Vassilevsky" <nos...@nowhere.com> wrote: > >> "John Larkin" <jjlar...@highNOTlandTHIStechnologyPART.com> wrote in me=ssage> > >>news:n5bk68h59kckkcmb8ntr5ecfauefjkmq6l@4ax.com... > > >> > If a CMOS gate's input is roughly midway between Vcc and ground, bot=h> >> > p-channel and n-channel fets can be partially turned on in the front > >> > end. > > >> This problem is greatly overstated. > >> While ago I tested static cross conduction of HCT04 gate powered at +5=V.> >> The worst case was about 4mA, at 0.9V at the input. > > >> Vladimir Vassilevsky > >> DSP and Mixed Signal Consultantwww.abvolt.com > > >I've destroyed 74AC parts that way. =A0Smoked 'em. > > HCT stuff isn't tuned for speed so has little crossover current (none, > ideally). =A0AC logic is a whole different kettle. =A0Better decouple AC =gates> well. =A0 ;-)I was experimenting using one as a VHF amplifier. That works well, until the smoke comes out. Another guy put a resistor in the supply line with some success. I switched to 'HC. Cool as a cucumber, and it just worked. -- Cheers, James Arthur
Low RDSon Logic CMOS Gate
Started by ●October 1, 2012
Reply by ●October 4, 20122012-10-04
Reply by ●October 4, 20122012-10-04
On Thursday, October 4, 2012 6:34:46 AM UTC+2, (unknown) wrote:> On Oct 3, 1:15=A0pm, "k...@att.bizzzzzzzzzzzz" <k...@att.bizzzzzzzzzzzz> >=20 > wrote: >=20 > > On Tue, 2 Oct 2012 19:43:44 -0700 (PDT), dagmargoodb...@yahoo.com wrote=:>=20 > > >On Oct 1, 10:09=A0pm, "Vladimir Vassilevsky" <nos...@nowhere.com> wrot=e:>=20 > > >> "John Larkin" <jjlar...@highNOTlandTHIStechnologyPART.com> wrote in =message>=20 > > >=20 > > >>news:n5bk68h59kckkcmb8ntr5ecfauefjkmq6l@4ax.com... >=20 > > >=20 > > >> > If a CMOS gate's input is roughly midway between Vcc and ground, b=oth>=20 > > >> > p-channel and n-channel fets can be partially turned on in the fro=nt>=20 > > >> > end. >=20 > > >=20 > > >> This problem is greatly overstated. >=20 > > >> While ago I tested static cross conduction of HCT04 gate powered at =+5V.>=20 > > >> The worst case was about 4mA, at 0.9V at the input. >=20 > > >=20 > > >> Vladimir Vassilevsky >=20 > > >> DSP and Mixed Signal Consultantwww.abvolt.com >=20 > > >=20 > > >I've destroyed 74AC parts that way. =A0Smoked 'em. >=20 > > >=20 > > HCT stuff isn't tuned for speed so has little crossover current (none, >=20 > > ideally). =A0AC logic is a whole different kettle. =A0Better decouple A=C gates>=20 > > well. =A0 ;-) >=20 >=20 >=20 > I was experimenting using one as a VHF amplifier. That works well, >=20 > until the smoke comes out. Another guy put a resistor in the supply >=20 > line with some success. >=20 >=20 >=20 > I switched to 'HC. Cool as a cucumber, and it just worked. >=20 >=20Some measurements of supply current: For NC7SZ14: 100kHz, 3 gates in parallel, one gate feeding the 3 gates for fast switchin= g of inputs, no output load: 3.3V, 366uA 5V, 1400uA 1MHz: 3V3,1280uA 5V, 3100uA Cheers Klaus
Reply by ●October 4, 20122012-10-04
On Thu, 4 Oct 2012 01:12:24 -0700 (PDT), Klaus Kragelund <klauskvik@hotmail.com> wrote:>Some measurements of supply current: > >For NC7SZ14: > > 100kHz, 3 gates in parallel, one gate feeding the 3 gates > for fast switching of inputs, no output load: > >3.3V, 366uA >5V, 1400uA > >1MHz: > >3V3,1280uA >5V, 3100uALinear assumption, then: 3.3V: I =3D 265uA + 1.02uA*f (in kHz) 5.0V: I =3D 1210uA + 1.89uA*f (in kHz) Jon
Reply by ●October 4, 20122012-10-04
Jon Kirwan a �crit :> On Thu, 4 Oct 2012 01:12:24 -0700 (PDT), Klaus Kragelund > <klauskvik@hotmail.com> wrote: > >> Some measurements of supply current: >> >> For NC7SZ14: >> >> 100kHz, 3 gates in parallel, one gate feeding the 3 gates >> for fast switching of inputs, no output load: >> >> 3.3V, 366uA >> 5V, 1400uA >> >> 1MHz: >> >> 3V3,1280uA >> 5V, 3100uA > > Linear assumption, then: > > 3.3V: I = 265uA + 1.02uA*f (in kHz) > 5.0V: I = 1210uA + 1.89uA*f (in kHz) > > JonWhich seems a lot... Also, the "static" (1210uA) current is way too big. 1.89uA/kHz -> 1.89nC/switch event and a *big* 380pF Cpd under 5V 380pF/4 gates, mean 95pF/gate which is 3 time the Fairchild figure... -- Thanks, Fred.
Reply by ●October 4, 20122012-10-04
On Thursday, October 4, 2012 1:00:39 PM UTC+2, Fred Bartoli wrote:> Jon Kirwan a =E9crit : >=20 > > On Thu, 4 Oct 2012 01:12:24 -0700 (PDT), Klaus Kragelund >=20 > > <klauskvik@hotmail.com> wrote: >=20 > >=20 >=20 > >> Some measurements of supply current: >=20 > >> >=20 > >> For NC7SZ14: >=20 > >> >=20 > >> 100kHz, 3 gates in parallel, one gate feeding the 3 gates >=20 > >> for fast switching of inputs, no output load: >=20 > >> >=20 > >> 3.3V, 366uA >=20 > >> 5V, 1400uA >=20 > >> >=20 > >> 1MHz: >=20 > >> >=20 > >> 3V3,1280uA >=20 > >> 5V, 3100uA >=20 > >=20 >=20 > > Linear assumption, then: >=20 > >=20 >=20 > > 3.3V: I =3D 265uA + 1.02uA*f (in kHz) >=20 > > 5.0V: I =3D 1210uA + 1.89uA*f (in kHz) >=20 > >=20 >=20 > > Jon >=20 >=20 >=20 > Which seems a lot... >=20 > Also, the "static" (1210uA) current is way too big. >=20 >=20 >=20 > 1.89uA/kHz -> 1.89nC/switch event and a *big* 380pF Cpd under 5V >=20 >=20 >=20 > 380pF/4 gates, mean 95pF/gate which is 3 time the Fairchild figure... >=20 >=20 >=20The static consumption is unmeaserable (or at least below 1uA) Regarding the high consumption, they are in parallel, so might be cross con= duction from device to device if propagation times are no equal I'll dig further and post back here Cheers Klaus
Reply by ●October 4, 20122012-10-04
On Wed, 3 Oct 2012 21:14:26 -0700 (PDT), dagmargoodboat@yahoo.com wrote:>On Oct 3, 1:48�pm, John Larkin <jlar...@highlandtechnology.com> wrote:[snip]>> >> Even a break-before-make CMOS analog switch has several CMOS gate >> driver sections, each of which will have shoot-through. Then the final >> switch capacitance behaves just like a Cpd effect, wasting energy on >> every transition. No free lunch. > >The lunch doesn't have to be free. If it's smaller, cheaper, and all >wrapped up in a nicer box, that counts too.An interesting thought sprung into my head. The driver sections don't have to have shoot-thru, they can be time staggered all the way back to the basic on-off control. I'll have to implement that in my next H-bridge controller ;-) ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Reply by ●October 4, 20122012-10-04
On Thu, 04 Oct 2012 08:38:20 -0700, Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:>On Wed, 3 Oct 2012 21:14:26 -0700 (PDT), dagmargoodboat@yahoo.com >wrote: > >>On Oct 3, 1:48�pm, John Larkin <jlar...@highlandtechnology.com> wrote: >[snip] >>> >>> Even a break-before-make CMOS analog switch has several CMOS gate >>> driver sections, each of which will have shoot-through. Then the final >>> switch capacitance behaves just like a Cpd effect, wasting energy on >>> every transition. No free lunch. >> >>The lunch doesn't have to be free. If it's smaller, cheaper, and all >>wrapped up in a nicer box, that counts too. > >An interesting thought sprung into my head. The driver sections don't >have to have shoot-thru, they can be time staggered all the way back >to the basic on-off control. I'll have to implement that in my next >H-bridge controller ;-) > > ...Jim ThompsonIf they switch, they have to at least charge node capacitances. If a chip has a narrow specified Vcc range, I guess you can avoid overlap fet conduction, at the cost of speed. Another requirement with analog switches is low charge/glitch injection, which puts constraints on staggering the drives to the analog switch devices. -- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators
Reply by ●October 4, 20122012-10-04
On Wed, 3 Oct 2012 21:34:46 -0700 (PDT), dagmargoodboat@yahoo.com wrote:>On Oct 3, 1:15�pm, "k...@att.bizzzzzzzzzzzz" <k...@att.bizzzzzzzzzzzz> >wrote: >> On Tue, 2 Oct 2012 19:43:44 -0700 (PDT), dagmargoodb...@yahoo.com wrote: >> >On Oct 1, 10:09�pm, "Vladimir Vassilevsky" <nos...@nowhere.com> wrote: >> >> "John Larkin" <jjlar...@highNOTlandTHIStechnologyPART.com> wrote in message >> >> >>news:n5bk68h59kckkcmb8ntr5ecfauefjkmq6l@4ax.com... >> >> >> > If a CMOS gate's input is roughly midway between Vcc and ground, both >> >> > p-channel and n-channel fets can be partially turned on in the front >> >> > end. >> >> >> This problem is greatly overstated. >> >> While ago I tested static cross conduction of HCT04 gate powered at +5V. >> >> The worst case was about 4mA, at 0.9V at the input. >> >> >> Vladimir Vassilevsky >> >> DSP and Mixed Signal Consultantwww.abvolt.com >> >> >I've destroyed 74AC parts that way. �Smoked 'em. >> >> HCT stuff isn't tuned for speed so has little crossover current (none, >> ideally). �AC logic is a whole different kettle. �Better decouple AC gates >> well. � ;-) > >I was experimenting using one as a VHF amplifier. That works well, >until the smoke comes out. Another guy put a resistor in the supply >line with some success. > >I switched to 'HC. Cool as a cucumber, and it just worked.Some of the TinyLogic gates could be used as RF power amps. One of the hidden gems is the LVDS line receiver. These are essentially r-r comparators with screaming-fast CMOS output stages. They make great RF oscillators. Dirt cheap. SN65LVDS2DBVR and such. -- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators
Reply by ●October 4, 20122012-10-04
On Thu, 04 Oct 2012 09:08:57 -0700, John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: [snip]> >One of the hidden gems is the LVDS line receiver. These are >essentially r-r comparators with screaming-fast CMOS output stages. >They make great RF oscillators. Dirt cheap. SN65LVDS2DBVR and such.Yep. I designed a couple for Fairchild. (Portland, ME, division. Wonderful town. The car rental people warm up the car interior before they bring it around to you :-) ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Reply by ●October 4, 20122012-10-04
On Thu, 04 Oct 2012 09:04:29 -0700, John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:>On Thu, 04 Oct 2012 08:38:20 -0700, Jim Thompson ><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: > >>On Wed, 3 Oct 2012 21:14:26 -0700 (PDT), dagmargoodboat@yahoo.com >>wrote: >> >>>On Oct 3, 1:48�pm, John Larkin <jlar...@highlandtechnology.com> wrote: >>[snip] >>>> >>>> Even a break-before-make CMOS analog switch has several CMOS gate >>>> driver sections, each of which will have shoot-through. Then the final >>>> switch capacitance behaves just like a Cpd effect, wasting energy on >>>> every transition. No free lunch. >>> >>>The lunch doesn't have to be free. If it's smaller, cheaper, and all >>>wrapped up in a nicer box, that counts too. >> >>An interesting thought sprung into my head. The driver sections don't >>have to have shoot-thru, they can be time staggered all the way back >>to the basic on-off control. I'll have to implement that in my next >>H-bridge controller ;-) >> >> ...Jim Thompson > >If they switch, they have to at least charge node capacitances. If a >chip has a narrow specified Vcc range, I guess you can avoid overlap >fet conduction, at the cost of speed.Nope, not necessary. Ask Klaus. I sent him my whole chip design... minus customer-identifying information. Of course YOU are not allowed to see it >:-)> >Another requirement with analog switches is low charge/glitch >injection, which puts constraints on staggering the drives to the >analog switch devices.Big difference between analog switch needs and those for a 500mA H-bridge. ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
