Forums

Low RDSon Logic CMOS Gate

Started by Klaus Kragelund October 1, 2012
On 2 Okt., 00:53, n...@puntnl.niks (Nico Coesel) wrote:
> Klaus Kragelund <klausk...@hotmail.com> wrote: > >Hi > > >I need a CMOS gate with low voltage drop at about 30mA current source and s= > >ink. The tiny logic NL27WZ14 has 600mV drop at 32mA which equates to 18ohm = > >RDS on. > > Maybe look for a MOSFET driver chip. >
that was my first thought, something like fan3111, but.. datasheet doesn't say what the dropout is, it maybe a bit slow for 10MHz and who knows how much power it will use maybe a buffer/linedriver -Lasse
On 2 Okt., 02:04, John Larkin
<jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> On Mon, 01 Oct 2012 12:35:52 -0600, hamilton <hamil...@nothere.com> > wrote: > > >On 10/1/2012 11:46 AM, John Larkin wrote: > >> On Mon, 01 Oct 2012 10:42:16 -0700, Jim Thompson > > >>> How about a 6-pack of '04's paralleled? > > >>> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 ...Jim Thompson
> > >> Massive shoot-through. > > >Please describe shoot-through. > > If a CMOS gate's input is roughly midway between Vcc and ground, both > p-channel and n-channel fets can be partially turned on in the front > end. Current "shots through" the fets from Vcc to ground. That can > draw a lot of supply current and potentially heat up the chip. It > always happens briefly when a normal, fast input transitions, but it > can get much worse if an input transitions slowly, or parks at an > intermediate voltage. Schmitt-trigger gates are designed for slow > inputs, so generally have moderate peak shoot-through currents. > > Paralleling Schmitts is interesting. At some input voltage, some of > the gates will see a "1" and some may see a "0", so their paralleled > outputs will fight one another and pull a *lot* of supply current. > Running the signal through one Schmitt section, and then driving a > bunch more sections in parallel, is safer. > > We almost fried some Tiny Logic gates, powering them from +5 but > driving them from 3.3 volt logic from an FPGA. They got really hot. >
HC or HCT ? http://www.ti.com/lit/ds/symlink/sn74hct04.pdf http://www.nxp.com/documents/data_sheet/74HC_HCT04.pdf TI <3mA per pin at 2.4Vin NXP <590uA at 2.9Vin that shouldn't be a problem driven with a 3.3V output -Lasse
On Tue, 2 Oct 2012 06:35:42 -0700 (PDT), "langwadt@fonz.dk"
<langwadt@fonz.dk> wrote:

>On 2 Okt., 02:04, John Larkin ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: >> On Mon, 01 Oct 2012 12:35:52 -0600, hamilton <hamil...@nothere.com> >> wrote: >> >> >On 10/1/2012 11:46 AM, John Larkin wrote: >> >> On Mon, 01 Oct 2012 10:42:16 -0700, Jim Thompson >> >> >>> How about a 6-pack of '04's paralleled? >> >> >>> &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; &#2013266080; ...Jim Thompson >> >> >> Massive shoot-through. >> >> >Please describe shoot-through. >> >> If a CMOS gate's input is roughly midway between Vcc and ground, both >> p-channel and n-channel fets can be partially turned on in the front >> end. Current "shots through" the fets from Vcc to ground. That can >> draw a lot of supply current and potentially heat up the chip. It >> always happens briefly when a normal, fast input transitions, but it >> can get much worse if an input transitions slowly, or parks at an >> intermediate voltage. Schmitt-trigger gates are designed for slow >> inputs, so generally have moderate peak shoot-through currents. >> >> Paralleling Schmitts is interesting. At some input voltage, some of >> the gates will see a "1" and some may see a "0", so their paralleled >> outputs will fight one another and pull a *lot* of supply current. >> Running the signal through one Schmitt section, and then driving a >> bunch more sections in parallel, is safer. >> >> We almost fried some Tiny Logic gates, powering them from +5 but >> driving them from 3.3 volt logic from an FPGA. They got really hot. >> > >HC or HCT ? > >http://www.ti.com/lit/ds/symlink/sn74hct04.pdf >http://www.nxp.com/documents/data_sheet/74HC_HCT04.pdf > >TI <3mA per pin at 2.4Vin >NXP <590uA at 2.9Vin > >that shouldn't be a problem driven with a 3.3V output > >-Lasse
NL37WZ16. All three sections in parallel. The US8 package doesn't get rid of heat very well. -- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators
On Monday, October 1, 2012 1:01:52 PM UTC-7, Klaus Kragelund wrote:
> On Monday, October 1, 2012 9:52:19 PM UTC+2, whit3rd wrote: > > > On Monday, October 1, 2012 10:33:01 AM UTC-7, Klaus Kragelund wrote:
> > > I need a CMOS gate with low voltage drop at about 30mA current source and sink. > > One can use discrete complementary MOSFETs to make a CMOS-like inverter,
> I have 3.3V, can make 5V if I need to. This is for a high efficiency device, so any powerloss is critical. Shoot through if a FET pair can easily go up to several amps, which won't be noticed if you are not looking.
A dual MOSFET (P-channel/N-channel pair) like Rohm EM6M2 can easily handle the task. If you add a couple of 2 ohm drain resistors, it limits the shoot-through to well under one amp, but the output resistance only gets two ohms drop (still well below your 5 ohm goal for 3.3V power supplies). Note the PFET has rather high capacitance, that's required to get the low on-resistance. For best shoot-through limit, it gets complicated (you need something more than a logic drive, it takes turn-on delayed but turn-off prompt).
On Wednesday, October 3, 2012 12:04:57 AM UTC+2, whit3rd wrote:
> On Monday, October 1, 2012 1:01:52 PM UTC-7, Klaus Kragelund wrote: > > > On Monday, October 1, 2012 9:52:19 PM UTC+2, whit3rd wrote: > > > > > > > On Monday, October 1, 2012 10:33:01 AM UTC-7, Klaus Kragelund wrote: > > > > > > > I need a CMOS gate with low voltage drop at about 30mA current source and sink. > > > > One can use discrete complementary MOSFETs to make a CMOS-like inverter, > > > > > I have 3.3V, can make 5V if I need to. This is for a high efficiency device, so any powerloss is critical. Shoot through if a FET pair can easily go up to several amps, which won't be noticed if you are not looking. > > > > A dual MOSFET (P-channel/N-channel pair) like Rohm EM6M2 can easily handle the task. > > If you add a couple of 2 ohm drain resistors, it limits the shoot-through to well under one > > amp, but the output resistance only gets two ohms drop (still well below your 5 ohm > > goal for 3.3V power supplies). Note the PFET has rather high capacitance, that's > > required to get the low on-resistance. > >
..Snip.. The EM6M2 has 1nC of gate charge. Running that at 5V and 200kHz will consume 1mW. I was trying to reduce the gate charge losses by using a logic IC On that subject, anyone know the value of the gate charge for a run-of-the-mill gate inside a chip? Regards Klaus
On Oct 1, 8:18=A0pm, John Larkin
<jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> On Mon, 1 Oct 2012 16:49:41 -0700 (PDT), dagmargoodb...@yahoo.com > wrote: > > > > > > > > > > >On Oct 1, 1:33 pm, Klaus Kragelund <klausk...@hotmail.com> wrote: > >> Hi > > >> I need a CMOS gate with low voltage drop at about 30mA current source =
and sink. The tiny logic NL27WZ14 has 600mV drop at 32mA which equates to 1= 8ohm RDS on.
> > >> I am searching for a device with less than 5-10 ohms and it would need=
to be ok to parallel to get lower resistance. Also, it must not have to mu= ch crossover shoot-through (so probably schmitt trigger type) and must have= low dissipation at high operational frequency (1-10MHz)
> > >> Any one have a part in mind? > > >> Thanks > > >> Klaus > > >http://www.intersil.com/en/products/switches-muxs-crosspoints/low-vol... > > >(from John Devereux, earlier this year) > > >Break-before-make. > > >DigiKey had competing parts, too. > > But look at the capacitances! There's no free lunch.
For sure there are higher Rds(on) parts with lower capacitances, right? I was just throwing out an extreme example, since I'm an extremist :-). I suspect the make-before-break convenience, integration, and capacitances in other switches will be attractive. I didn't have time to screen parts--I mostly have to post and run these days. James
On Oct 1, 10:09=A0pm, "Vladimir Vassilevsky" <nos...@nowhere.com> wrote:
> "John Larkin" <jjlar...@highNOTlandTHIStechnologyPART.com> wrote in messa=
ge
> > news:n5bk68h59kckkcmb8ntr5ecfauefjkmq6l@4ax.com... > > > If a CMOS gate's input is roughly midway between Vcc and ground, both > > p-channel and n-channel fets can be partially turned on in the front > > end. > > This problem is greatly overstated. > While ago I tested static cross conduction of HCT04 gate powered at +5V. > The worst case was about 4mA, at 0.9V at the input. > > Vladimir Vassilevsky > DSP and Mixed Signal Consultantwww.abvolt.com
I've destroyed 74AC parts that way. Smoked 'em. -- Cheers, James Arthur
On Tue, 2 Oct 2012 19:43:44 -0700 (PDT), dagmargoodboat@yahoo.com wrote:

>On Oct 1, 10:09&#2013266080;pm, "Vladimir Vassilevsky" <nos...@nowhere.com> wrote: >> "John Larkin" <jjlar...@highNOTlandTHIStechnologyPART.com> wrote in message >> >> news:n5bk68h59kckkcmb8ntr5ecfauefjkmq6l@4ax.com... >> >> > If a CMOS gate's input is roughly midway between Vcc and ground, both >> > p-channel and n-channel fets can be partially turned on in the front >> > end. >> >> This problem is greatly overstated. >> While ago I tested static cross conduction of HCT04 gate powered at +5V. >> The worst case was about 4mA, at 0.9V at the input. >> >> Vladimir Vassilevsky >> DSP and Mixed Signal Consultantwww.abvolt.com > >I've destroyed 74AC parts that way. Smoked 'em.
HCT stuff isn't tuned for speed so has little crossover current (none, ideally). AC logic is a whole different kettle. Better decouple AC gates well. ;-)
On Tue, 2 Oct 2012 19:42:45 -0700 (PDT), dagmargoodboat@yahoo.com
wrote:

>On Oct 1, 8:18&#2013266080;pm, John Larkin ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: >> On Mon, 1 Oct 2012 16:49:41 -0700 (PDT), dagmargoodb...@yahoo.com >> wrote: >> >> >> >> >> >> >> >> >> >> >On Oct 1, 1:33 pm, Klaus Kragelund <klausk...@hotmail.com> wrote: >> >> Hi >> >> >> I need a CMOS gate with low voltage drop at about 30mA current source and sink. The tiny logic NL27WZ14 has 600mV drop at 32mA which equates to 18ohm RDS on. >> >> >> I am searching for a device with less than 5-10 ohms and it would need to be ok to parallel to get lower resistance. Also, it must not have to much crossover shoot-through (so probably schmitt trigger type) and must have low dissipation at high operational frequency (1-10MHz) >> >> >> Any one have a part in mind? >> >> >> Thanks >> >> >> Klaus >> >> >http://www.intersil.com/en/products/switches-muxs-crosspoints/low-vol... >> >> >(from John Devereux, earlier this year) >> >> >Break-before-make. >> >> >DigiKey had competing parts, too. >> >> But look at the capacitances! There's no free lunch. > >For sure there are higher Rds(on) parts with lower capacitances, >right? I was just throwing out an extreme example, since I'm an >extremist :-). > >I suspect the make-before-break convenience, integration, and >capacitances in other switches will be attractive. > >I didn't have time to screen parts--I mostly have to post and run >these days. > >James
Even a break-before-make CMOS analog switch has several CMOS gate driver sections, each of which will have shoot-through. Then the final switch capacitance behaves just like a Cpd effect, wasting energy on every transition. No free lunch. -- John Larkin Highland Technology, Inc jlarkin at highlandtechnology dot com http://www.highlandtechnology.com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom laser drivers and controllers Photonics and fiberoptic TTL data links VME thermocouple, LVDT, synchro acquisition and simulation
On Oct 3, 1:48=A0pm, John Larkin <jlar...@highlandtechnology.com> wrote:
> On Tue, 2 Oct 2012 19:42:45 -0700 (PDT), dagmargoodb...@yahoo.com > wrote: > > > > > > > > > > >On Oct 1, 8:18 pm, John Larkin > ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: > >> On Mon, 1 Oct 2012 16:49:41 -0700 (PDT), dagmargoodb...@yahoo.com > >> wrote: > > >> >On Oct 1, 1:33 pm, Klaus Kragelund <klausk...@hotmail.com> wrote: > >> >> Hi > > >> >> I need a CMOS gate with low voltage drop at about 30mA current sour=
ce and sink. The tiny logic NL27WZ14 has 600mV drop at 32mA which equates t= o 18ohm RDS on.
> > >> >> I am searching for a device with less than 5-10 ohms and it would n=
eed to be ok to parallel to get lower resistance. Also, it must not have to= much crossover shoot-through (so probably schmitt trigger type) and must h= ave low dissipation at high operational frequency (1-10MHz)
> > >> >> Any one have a part in mind? > > >> >> Thanks > > >> >> Klaus > > >> >http://www.intersil.com/en/products/switches-muxs-crosspoints/low-vol=
...
> > >> >(from John Devereux, earlier this year) > > >> >Break-before-make. > > >> >DigiKey had competing parts, too. > > >> But look at the capacitances! There's no free lunch. > > >For sure there are higher Rds(on) parts with lower capacitances, > >right? =A0I was just throwing out an extreme example, since I'm an > >extremist :-). > > >I suspect the make-before-break convenience, integration, and > >capacitances in other switches will be attractive. > > >I didn't have time to screen parts--I mostly have to post and run > >these days. > > >James > > Even a break-before-make CMOS analog switch has several CMOS gate > driver sections, each of which will have shoot-through. Then the final > switch capacitance behaves just like a Cpd effect, wasting energy on > every transition. No free lunch.
The lunch doesn't have to be free. If it's smaller, cheaper, and all wrapped up in a nicer box, that counts too. -- Cheers, James Arthur