Forums

simple opamp amplifier circuit

Started by panfilero June 18, 2012
I'm simulating on LTSpice, a simple amplifier circuit with a 2.5V offset, but if I don't include a capacitor on my input my output hits the rails... why is this?  The link shows what I'm doing in LTSpice

thanks

http://i555.photobucket.com/albums/jj477/panfilero/Capture-1.jpg

On 6/18/2012 8:25 AM, panfilero wrote:
> I'm simulating on LTSpice, a simple amplifier circuit with a 2.5V offset, but if I don't include a capacitor on my input my output hits the rails... why is this? The link shows what I'm doing in LTSpice > > thanks > > http://i555.photobucket.com/albums/jj477/panfilero/Capture-1.jpg >
This is an incomplete circuit. Whats on the input ??
panfilero a �crit :
> I'm simulating on LTSpice, a simple amplifier circuit with a 2.5V offset, but if I don't include a capacitor on my input my output hits the rails... why is this? The link shows what I'm doing in LTSpice > > thanks > > http://i555.photobucket.com/albums/jj477/panfilero/Capture-1.jpg >
Assuming your DC input is 0V, then the circuit has a gain of 3 WRT to the opamp positive input and the 3x2.5V = 7.5V hits the rail. Do you really need simulation for that? -- Thanks, Fred.
On Jun 18, 10:25=A0am, panfilero <panfil...@gmail.com> wrote:
> I'm simulating on LTSpice, a simple amplifier circuit with a 2.5V offset,=
but if I don't include a capacitor on my input my output hits the rails...= why is this? =A0The link shows what I'm doing in LTSpice
> > thanks > > http://i555.photobucket.com/albums/jj477/panfilero/Capture-1.jpg
With the (-) input driven from a low impedance, it's a gain of three circuit for the (+) input. (1+R1/R2) George H.
On Monday, June 18, 2012 9:25:39 AM UTC-5, panfilero wrote:
> I'm simulating on LTSpice, a simple amplifier circuit with a 2.5V offset, but if I don't include a capacitor on my input my output hits the rails... why is this? The link shows what I'm doing in LTSpice > > thanks > > http://i555.photobucket.com/albums/jj477/panfilero/Capture-1.jpg
sorry, the input signal is a sine wave, with no dc offset, at 10kHz with 0.25V amplitude
On Monday, June 18, 2012 9:37:27 AM UTC-5, Fred Bartoli wrote:
> panfilero a =EF=BF=BDcrit : > > I'm simulating on LTSpice, a simple amplifier circuit with a 2.5V offse=
t, but if I don't include a capacitor on my input my output hits the rails.= .. why is this? The link shows what I'm doing in LTSpice
> >=20 > > thanks > >=20 > > http://i555.photobucket.com/albums/jj477/panfilero/Capture-1.jpg > >=20 >=20 > Assuming your DC input is 0V, then the circuit has a gain of 3 WRT to=20 > the opamp positive input and the 3x2.5V =3D 7.5V hits the rail. >=20 > Do you really need simulation for that? >=20 > --=20 > Thanks, > Fred.
what's WRT?
On Mon, 18 Jun 2012 08:05:43 -0700, panfilero wrote:

> On Monday, June 18, 2012 9:37:27 AM UTC-5, Fred Bartoli wrote: >> panfilero a &iuml;&iquest;&frac12;crit : >> > I'm simulating on LTSpice, a simple amplifier circuit with a 2.5V >> > offset, but if I don't include a capacitor on my input my output hits >> > the rails... why is this? The link shows what I'm doing in LTSpice >> > >> > thanks >> > >> > http://i555.photobucket.com/albums/jj477/panfilero/Capture-1.jpg >> > >> > >> Assuming your DC input is 0V, then the circuit has a gain of 3 WRT to >> the opamp positive input and the 3x2.5V = 7.5V hits the rail. >> >> Do you really need simulation for that? >> >> -- >> Thanks, >> Fred. > > what's WRT?
With Respect To. And you do need to think about the DC voltages: if the blocking capacitor keeps it from saturating, then your input voltage has some DC bias (if 0V is a bias) that makes the bad things happen. -- Tim Wescott Control system and signal processing consulting www.wescottdesign.com
On Mon, 18 Jun 2012 08:03:59 -0700, panfilero wrote:

> On Monday, June 18, 2012 9:25:39 AM UTC-5, panfilero wrote: >> I'm simulating on LTSpice, a simple amplifier circuit with a 2.5V >> offset, but if I don't include a capacitor on my input my output hits >> the rails... why is this? The link shows what I'm doing in LTSpice >> >> thanks >> >> http://i555.photobucket.com/albums/jj477/panfilero/Capture-1.jpg > > sorry, the input signal is a sine wave, with no dc offset, at 10kHz with > 0.25V amplitude
* Is there a problem with having a blocking capacitor in there? * What do you want the output to be? If the answers are "no" and "0.5V amplitude centered around 2.5V", then what's the problem? If the answers aren't that -- tell us what they are. You can do this with an all DC coupled system -- it just requires more resistors, and the amount of offset from nominal is often dissapointingly sensitive to resistor value mismatch. -- Tim Wescott Control system and signal processing consulting www.wescottdesign.com
panfilero wrote:

> I'm simulating on LTSpice, a simple amplifier circuit with a 2.5V offset, > but if I don't include a capacitor on my input my output hits the rails... > why is this? The link shows what I'm doing in LTSpice > > thanks > > http://i555.photobucket.com/albums/jj477/panfilero/Capture-1.jpg
This circuit has a 2:1 DC gain, so if the input is substantially away from 2.5 V, the output will saturate. The proper input range has to be between +/- 1.25 V around the 2.5 V "pseudo-ground" to keep the output voltage within the DC rails. Actually, it will be less than that, as the output swing of the op amp will be somewhat less than that. Jon
On Monday, June 18, 2012 10:37:27 AM UTC-4, Fred Bartoli wrote:
> panfilero a =EF=BF=BDcrit : > > I'm simulating on LTSpice, a simple amplifier circuit with a 2.5V offse=
t, but if I don't include a capacitor on my input my output hits the rails.= .. why is this? The link shows what I'm doing in LTSpice
> >=20 > > thanks > >=20 > > http://i555.photobucket.com/albums/jj477/panfilero/Capture-1.jpg > >=20 >=20 > Assuming your DC input is 0V, then the circuit has a gain of 3 WRT to=20 > the opamp positive input and the 3x2.5V =3D 7.5V hits the rail. >=20 > Do you really need simulation for that? >=20 > --=20 > Thanks, > Fred.
huh?