pre-regulator for LDO linear regulator

can anyone explain how the pre-regulator circuit with a pmos threshold
setting the differential voltage across a linear regulator works?

the situation is you have a dc/dc switcher going to a linear
regulator, and you use a pmos to keep your dropout voltage at a
minimum set by the pmos threshold voltage

I saw this thing on the eevblog video, link below

http://www.eevblog.com/2012/03/20/eevblog-260-tracking-pre-regulator-simulation-in-ltspice-psu-part-13/

and it's on the LT3080 datasheet pg 20

here's what I think is going on,

The DC/DC is set to a high output voltage, it keeps going up until it
meets the dropout voltage criteria of the linear, at that point the
linear will begin outputting, this creates a voltage across Vgs that
turns on the pmos, which causes a short that feeds the output of the
switching supply straight to its feedback pin... that's about as far
as I can go.... after that I think the voltage output of the switcher
is dropping.... but it must never drop below the linear's ldo voltage
cause the linear never turns off.... i'm lost at this point

much thanks!

On Fri, 27 Apr 2012 14:26:17 -0700 (PDT), panfilero
<panfilero@gmail.com> wrote:

>can anyone explain how the pre-regulator circuit with a pmos threshold
>setting the differential voltage across a linear regulator works?

PMOS?

>
>the situation is you have a dc/dc switcher going to a linear
>regulator, and you use a pmos to keep your dropout voltage at a
>minimum set by the pmos threshold voltage
>
>I saw this thing on the eevblog video, link below
>
>http://www.eevblog.com/2012/03/20/eevblog-260-tracking-pre-regulator-simulation-in-ltspice-psu-part-13/
>
>and it's on the LT3080 datasheet pg 20

PMOS?  I see a PNP.

As soon as the input to the LDO exceeds a Vbe above the output
potential, current flows into the emitter of the PNP and then the
resistors connected to VFB, keeping the switcher output from rising.

>
>here's what I think is going on,
>
>The DC/DC is set to a high output voltage, it keeps going up until it
>meets the dropout voltage criteria of the linear, at that point the
>linear will begin outputting, this creates a voltage across Vgs that
>turns on the pmos, which causes a short that feeds the output of the
>switching supply straight to its feedback pin... that's about as far
>as I can go.... after that I think the voltage output of the switcher
>is dropping.... but it must never drop below the linear's ldo voltage
>cause the linear never turns off.... i'm lost at this point
>
>much thanks!
		
                                        ...Jim Thompson
-- 
| James E.Thompson, CTO                            |    mens     |
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| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
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On 2012-04-27, panfilero <panfilero@gmail.com> wrote:
> can anyone explain how the pre-regulator circuit with a pmos threshold
> setting the differential voltage across a linear regulator works?

once the source voltage exceeds the gate voltage by the threshold
voltage the PMOS mosfet starts to conduct reducing the set point of the
switching regulators.

> here's what I think is going on,

> The DC/DC is set to a high output voltage, it keeps going up until it
> meets the dropout voltage criteria of the linear, at that point the
> linear will begin outputting, this creates a voltage across Vgs that
> turns on the pmos, which causes a short that feeds the output of the
> switching supply straight to its feedback pin... that's about as far
> as I can go.... after that I think the voltage output of the switcher
> is dropping.... but it must never drop below the linear's ldo voltage
> cause the linear never turns off.... i'm lost at this point

linears will often output a lower poorly regulated voltage if the
input voltage is too low, 

The PMOS doesn't turn all the way on, it doesn't becpome a dead short.
it only conducts nough on enough that the
switcher's output stops increasing.

-- 
&#9858;&#9859; 100% natural

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On Friday, April 27, 2012 5:26:17 PM UTC-4, panfilero wrote:
> can anyone explain how the pre-regulator circuit with a pmos threshold
> setting the differential voltage across a linear regulator works?
>=20
> the situation is you have a dc/dc switcher going to a linear
> regulator, and you use a pmos to keep your dropout voltage at a
> minimum set by the pmos threshold voltage
>=20
> I saw this thing on the eevblog video, link below
>=20
> http://www.eevblog.com/2012/03/20/eevblog-260-tracking-pre-regulator-simu=
lation-in-ltspice-psu-part-13/
>=20
> and it's on the LT3080 datasheet pg 20
>=20
> here's what I think is going on,
>=20
> The DC/DC is set to a high output voltage, it keeps going up until it
> meets the dropout voltage criteria of the linear, at that point the
> linear will begin outputting, this creates a voltage across Vgs that
> turns on the pmos, which causes a short that feeds the output of the
> switching supply straight to its feedback pin... that's about as far
> as I can go.... after that I think the voltage output of the switcher
> is dropping.... but it must never drop below the linear's ldo voltage
> cause the linear never turns off.... i'm lost at this point
>=20
> much thanks!

There is a happy medium in VGS somewhere between full on and full off where=
 the PMOS conducts just enough to produce a voltage at the switcher feedbac=
k input equal to the switcher's internal reference ( for practical purposes=
). At that point the feedback network internal to the siwtcher is satisfied=
 and makes its output lock steady. It stops calling for any further change =
in its output, increase or decrease, it locks the output steady.