Forums

Stable simple dc amplifiers

Started by Archival March 11, 2012
On 15 Mar 2012 12:21:36 GMT, Jasen Betts <jasen@xnet.co.nz> wrote:

>On 2012-03-13, bloggs.fredbloggs.fred@gmail.com <bloggs.fredbloggs.fred@gmail.com> wrote: > >> See figure 94 on page 43 of http://www.ti.com/lit/an/snoa653/snoa653.pdf > >but that has fixed gain. OP wants gain proportional to VCC. > >Figure 3 has the current mirror drawn in a way I've not seen before.
Elaborate on what it is that you find strange. It's a so-called "Norton" amplifier. ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
On Thu, 15 Mar 2012 18:32:16 -0500, Jamie
<jamie_ka1lpa_not_valid_after_ka1lpa_@charter.net> wrote:

>josephkk wrote: > >> On Mon, 12 Mar 2012 16:45:55 -0700 (PDT), Archival =
<archival998@gmail.com>
>> wrote: >>=20 >>=20 >>>On Monday, March 12, 2012 6:35:04 PM UTC-5, Archival wrote: >>> >>>>On Monday, March 12, 2012 8:38:25 AM UTC-5, bloggs.fred...@gmail.com =
wrote:
>>>> >>>>>On Sunday, March 11, 2012 5:32:01 PM UTC-4, Archival wrote: >>>>> >>>>>>I need a simple(=3D cheap) relatively stable(temp and noise) dc =
amplifier that can take a voltage from 0 to 5V and output from around = 0V(not critical) to near Vcc(but arbitrary) somewhat linearly.
>>>>>> >>>>>> >>>>>>I'm thinking a simple bjt amplifier with temp compensation will =
work decently but the issue is linearity and range.
>>>>>> >>>>>>e.g., the output voltage of an ideal CE amplifier is Vout =3D Vcc -=
Rc/Re*Vin
>>>>>> >>>>>>Of course when Vin =3D 0 volts, Vout =3D Vcc. When Vin is 5V we get=
Vout =3D Vcc - 5Rc/Re but we would like 0V or some low fixed voltage = instead.=20
>>>>>> >>>>>>Adding temperature compensation makes things worse since it effects=
our upper range(which is more crucial than the lower range) since Vin = cannot swing down to 0V(I'm assuming the simple diode compensation scheme= generally used).
>>>>>> >>>>>>In any case the requirements are >>>>>> >>>>>>1. Relatively cheap and easy to built(e.g., a few discrete =
components)/
>>>>>>2. Amplifies a voltage from [0, Vin_max] to approximately [0, Vcc] =
with the upper range being more important. Vcc is somewhat arbitrary = =3D=3D> May change after the design of the circuit =3D=3D> no component = values can depend on Vcc to achieve specs. (Obviously one can assume that= Vcc is within all the maximum voltage ratings of the components)
>>>>>>3. Temperature stable/compensated. The temperature range will vary =
only around 10-20C.
>>>>>>4. Relatively low noise(not that big of an issue since caps can =
take care of the big problems).
>>>>>> >>>>>> >>>>>>Vin ranges from 0 to 5V and Vcc ranges from about 50V to 500V. >>>>> >>>>>Your requirements make no sense since Vcc varies over 10:1 range how=
could the minimum Vcc-5Rc/Re not vary as well. If you get Vout,min=3D0V = with Vcc=3D50V then Vout,min will be 450V for Vcc=3D50V.
>>>> >>>> >>>>Huh? You are the one not making any sense. The 5V is a programming =
voltage and has nothing to do with the output voltage.
>>> >>>Well, I see. You seem to be thinking that Vout can change during =
operation and this is not the case.
>>> >>>Vout is arbitrary but not changing. What this means is that is not =
specifically specified. In the real circuit it might be 234.32V but will = not change in that circuit. What I do know is that it will be between 50V= and 450V. If I can design a circuit that works over the whole range then= I won't have to worry about changing resistors.
>>> >>>A simple example, is, say, the voltage is user specified. The user and=
change it to be between 50V and 450V. I would like to design the circuit= so it behaves the same regardless without having to change resistors to = make it so.
>>=20 >>=20 >> Bloody hell. What is the output current and is there any accuracy >> specification? >> How do expect to design, let alone build, anything so piss poorly >> specified >>=20 >> /:-(( >it's simple actually.. > > He wants a selectable gain control. > > If the VCC is to change, then the gain control can be governed via=20 >the VCC level. > Simple actually. A 50V minimum fixed reference against the VCC to=20 >generate a gain reference.. > > The 0..5V in the input to choice the level of that. > > Yes, a simple OP-Amp circuit with a gain pot on the front end would=
=20
>work find. The 0..5Volts would simply be the range of the set gain.. > > And if there is not enough VCC on the rails to meet the output as=20 >required, then I guess one could even design in a fail safe error logic=20 >bit output :) > > > Oh well, sounds like something I can whip together in my sleep.. ! > >Jamie >
Show us a circuit at both 50 V and 250 V. ?-/
On 2012-03-16, Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:
> On 15 Mar 2012 12:21:36 GMT, Jasen Betts <jasen@xnet.co.nz> wrote: > >>On 2012-03-13, bloggs.fredbloggs.fred@gmail.com <bloggs.fredbloggs.fred@gmail.com> wrote: >> >>> See figure 94 on page 43 of http://www.ti.com/lit/an/snoa653/snoa653.pdf >> >>but that has fixed gain. OP wants gain proportional to VCC. >> >>Figure 3 has the current mirror drawn in a way I've not seen before. > > Elaborate on what it is that you find strange. It's a so-called > "Norton" amplifier.
Where I would have expected a diode connected transistor just a diode is drawn. -- &#9858;&#9859; 100% natural --- Posted via news://freenews.netfront.net/ - Complaints to news@netfront.net ---
On 17 Mar 2012 10:32:49 GMT, Jasen Betts <jasen@xnet.co.nz> wrote:

>On 2012-03-16, Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >> On 15 Mar 2012 12:21:36 GMT, Jasen Betts <jasen@xnet.co.nz> wrote: >> >>>On 2012-03-13, bloggs.fredbloggs.fred@gmail.com <bloggs.fredbloggs.fred@gmail.com> wrote: >>> >>>> See figure 94 on page 43 of http://www.ti.com/lit/an/snoa653/snoa653.pdf >>> >>>but that has fixed gain. OP wants gain proportional to VCC. >>> >>>Figure 3 has the current mirror drawn in a way I've not seen before. >> >> Elaborate on what it is that you find strange. It's a so-called >> "Norton" amplifier. > >Where I would have expected a diode connected transistor just a diode >is drawn.
That's "artistic license" taken by the village idiots in the applications department. Unfortunately, quite early on, datasheets and appnotes weren't written by the designer. ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
On 2012-03-17, Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:
> On 17 Mar 2012 10:32:49 GMT, Jasen Betts <jasen@xnet.co.nz> wrote: > >>On 2012-03-16, Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>> On 15 Mar 2012 12:21:36 GMT, Jasen Betts <jasen@xnet.co.nz> wrote: >>> >>>>On 2012-03-13, bloggs.fredbloggs.fred@gmail.com <bloggs.fredbloggs.fred@gmail.com> wrote: >>>> >>>>> See figure 94 on page 43 of http://www.ti.com/lit/an/snoa653/snoa653.pdf >>>> >>>>but that has fixed gain. OP wants gain proportional to VCC. >>>> >>>>Figure 3 has the current mirror drawn in a way I've not seen before. >>> >>> Elaborate on what it is that you find strange. It's a so-called >>> "Norton" amplifier. >> >>Where I would have expected a diode connected transistor just a diode >>is drawn. > > That's "artistic license" taken by the village idiots in the > applications department. Unfortunately, quite early on, datasheets > and appnotes weren't written by the designer.
That's good to know, I spent an hour or so searching for a schematic with a proper current mirror in vain, trying to reason why a diode would be used there. -- &#9858;&#9859; 100% natural --- Posted via news://freenews.netfront.net/ - Complaints to news@netfront.net ---
On 17 Mar 2012 19:49:07 GMT, Jasen Betts <jasen@xnet.co.nz> wrote:

>On 2012-03-17, Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >> On 17 Mar 2012 10:32:49 GMT, Jasen Betts <jasen@xnet.co.nz> wrote: >> >>>On 2012-03-16, Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>>> On 15 Mar 2012 12:21:36 GMT, Jasen Betts <jasen@xnet.co.nz> wrote: >>>> >>>>>On 2012-03-13, bloggs.fredbloggs.fred@gmail.com <bloggs.fredbloggs.fred@gmail.com> wrote: >>>>> >>>>>> See figure 94 on page 43 of http://www.ti.com/lit/an/snoa653/snoa653.pdf >>>>> >>>>>but that has fixed gain. OP wants gain proportional to VCC. >>>>> >>>>>Figure 3 has the current mirror drawn in a way I've not seen before. >>>> >>>> Elaborate on what it is that you find strange. It's a so-called >>>> "Norton" amplifier. >>> >>>Where I would have expected a diode connected transistor just a diode >>>is drawn. >> >> That's "artistic license" taken by the village idiots in the >> applications department. Unfortunately, quite early on, datasheets >> and appnotes weren't written by the designer. > >That's good to know, I spent an hour or so searching for a schematic >with a proper current mirror in vain, trying to reason why a diode >would be used there.
In the I/C world a "pure" diode, unencumbered by parasitic junctions does not exist. So you can rest assured that a "diode" on an I/C schematic is actually a three (or more) layer device, connected in diode mode. That's why I'm always wary of more than trivial currents in ESD "diodes"... the positive rail one (in most processes) is actually a PNP with a very BIG collector (otherwise known as the whole device substrate)... and the "guard ring" diffusions to limit parasitic action DO NOT go all the way thru the die thickness. ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Jim Thompson wrote:
> On 17 Mar 2012 19:49:07 GMT, Jasen Betts<jasen@xnet.co.nz> wrote: > >> On 2012-03-17, Jim Thompson<To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>> On 17 Mar 2012 10:32:49 GMT, Jasen Betts<jasen@xnet.co.nz> wrote: >>> >>>> On 2012-03-16, Jim Thompson<To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>>>> On 15 Mar 2012 12:21:36 GMT, Jasen Betts<jasen@xnet.co.nz> wrote: >>>>> >>>>>> On 2012-03-13, bloggs.fredbloggs.fred@gmail.com<bloggs.fredbloggs.fred@gmail.com> wrote: >>>>>> >>>>>>> See figure 94 on page 43 of http://www.ti.com/lit/an/snoa653/snoa653.pdf >>>>>> >>>>>> but that has fixed gain. OP wants gain proportional to VCC. >>>>>> >>>>>> Figure 3 has the current mirror drawn in a way I've not seen before. >>>>> >>>>> Elaborate on what it is that you find strange. It's a so-called >>>>> "Norton" amplifier. >>>> >>>> Where I would have expected a diode connected transistor just a diode >>>> is drawn. >>> >>> That's "artistic license" taken by the village idiots in the >>> applications department. Unfortunately, quite early on, datasheets >>> and appnotes weren't written by the designer. >> >> That's good to know, I spent an hour or so searching for a schematic >> with a proper current mirror in vain, trying to reason why a diode >> would be used there. > > In the I/C world a "pure" diode, unencumbered by parasitic junctions > does not exist. So you can rest assured that a "diode" on an I/C > schematic is actually a three (or more) layer device, connected in > diode mode. > > That's why I'm always wary of more than trivial currents in ESD > "diodes"... the positive rail one (in most processes) is actually a > PNP with a very BIG collector (otherwise known as the whole device > substrate)... and the "guard ring" diffusions to limit parasitic > action DO NOT go all the way thru the die thickness. > > ...Jim Thompson
Check and double check. Start with something simple to illustrate: two "isolated" NPNs on a substrate. In one case, if properly done in a geometrical fashion, they will be matched extremely well (beta,leakage) with good thermal tracking (better than 10mSec hysteresis). In another case, in a high gain op-amp, the lateral PNP (base is the substrate) Q1 to Q2 could have a beta of 0.000001 or so and give hell in feedback - all the way across a chip where Q1 is part the op-amp input and Q2 is part of the output. A measly gain over 10^6 can be trouble in river city. Happened in the first cut for the uA741 at (the original) Fairchild. If i remember right, the solution was to wrap a vertical PNP around the output and make it a DCT to kill the beta across the chip.
On Sat, 17 Mar 2012 18:26:01 -0800, Robert Baer
<robertbaer@localnet.com> wrote:

>Jim Thompson wrote: >>
[snip]
>> >> In the I/C world a "pure" diode, unencumbered by parasitic junctions >> does not exist. So you can rest assured that a "diode" on an I/C >> schematic is actually a three (or more) layer device, connected in >> diode mode. >> >> That's why I'm always wary of more than trivial currents in ESD >> "diodes"... the positive rail one (in most processes) is actually a >> PNP with a very BIG collector (otherwise known as the whole device >> substrate)... and the "guard ring" diffusions to limit parasitic >> action DO NOT go all the way thru the die thickness. >> >> ...Jim Thompson > Check and double check. > Start with something simple to illustrate: two "isolated" NPNs on a >substrate. In one case, if properly done in a geometrical fashion, they >will be matched extremely well (beta,leakage) with good thermal tracking >(better than 10mSec hysteresis). > In another case, in a high gain op-amp, the lateral PNP (base is the >substrate)
Almost correct. See... http://www.analog-innovations.com/SED/NPN-VPNP.pdf This is a typical bipolar process cross-section. CMOS? Still a P-type substrate. A lateral-PNP is like a vertical-PNP except there are two P-base emitters side-by-side... plus a feeble attempt to kill the vertical device by adding buried layer
> Q1 to Q2 could have a beta of 0.000001 or so and give hell in >feedback - all the way across a chip where Q1 is part the op-amp input >and Q2 is part of the output. > A measly gain over 10^6 can be trouble in river city. > Happened in the first cut for the uA741 at (the original) Fairchild. > If i remember right, the solution was to wrap a vertical PNP around >the output and make it a DCT to kill the beta across the chip.
But you are right, all kinds of sneak paths to "brighten" (*) your day. (*) I had a complex pin driver chip, ~1980, that glowed in the dark ;-) ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
> (*) I had a complex pin driver chip, ~1980, that glowed in the dark > ;-)
Interesting, how did that happen? I'm sure this is on topic, of course.
Jim Thompson wrote:
> On Sat, 17 Mar 2012 18:26:01 -0800, Robert Baer > <robertbaer@localnet.com> wrote: > >> Jim Thompson wrote: >>> > [snip] >>> >>> In the I/C world a "pure" diode, unencumbered by parasitic junctions >>> does not exist. So you can rest assured that a "diode" on an I/C >>> schematic is actually a three (or more) layer device, connected in >>> diode mode. >>> >>> That's why I'm always wary of more than trivial currents in ESD >>> "diodes"... the positive rail one (in most processes) is actually a >>> PNP with a very BIG collector (otherwise known as the whole device >>> substrate)... and the "guard ring" diffusions to limit parasitic >>> action DO NOT go all the way thru the die thickness. >>> >>> ...Jim Thompson >> Check and double check. >> Start with something simple to illustrate: two "isolated" NPNs on a >> substrate. In one case, if properly done in a geometrical fashion, they >> will be matched extremely well (beta,leakage) with good thermal tracking >> (better than 10mSec hysteresis). >> In another case, in a high gain op-amp, the lateral PNP (base is the >> substrate) > > Almost correct. See... > > http://www.analog-innovations.com/SED/NPN-VPNP.pdf > > This is a typical bipolar process cross-section. CMOS? Still a > P-type substrate. > > A lateral-PNP is like a vertical-PNP except there are two P-base > emitters side-by-side... plus a feeble attempt to kill the vertical > device by adding buried layer > >> Q1 to Q2 could have a beta of 0.000001 or so and give hell in >> feedback - all the way across a chip where Q1 is part the op-amp input >> and Q2 is part of the output. >> A measly gain over 10^6 can be trouble in river city. >> Happened in the first cut for the uA741 at (the original) Fairchild. >> If i remember right, the solution was to wrap a vertical PNP around >> the output and make it a DCT to kill the beta across the chip. > > But you are right, all kinds of sneak paths to "brighten" (*) your > day. > > (*) I had a complex pin driver chip, ~1980, that glowed in the dark > ;-) > > ...Jim Thompson
OK; Q1 NPN base is emitter of substrate lateral with that beta of 0.000001, Q2 NPN base is the collector.. Still think a vertical PNP (nice drawing!) was used as a beta killer.