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LT Spice question

Started by John Larkin December 15, 2011
On Sun, 18 Dec 2011 16:19:11 -0800, Joerg wrote:

> I do not trust behavioral models for this > kind of stuff.
Me, too. For any kind of stuff. I've been spending a chunk of my free time trying to get a Zetex-supplied, partially behavioral model for ZTX415 to get somewhere close to their own datasheet and app note figures under avalanche conditions. It does avalanche, but that's about all you can say, the starting voltages are nowhere near published curves. That's before I've gotten round to actually measuring one. I guess I'll have to roll my own. -- "For a successful technology, reality must take precedence over public relations, for nature cannot be fooled." (Richard Feynman)
On Mon, 19 Dec 2011 07:39:35 -0800, Joerg <invalid@invalid.invalid>
wrote:

>John Larkin wrote: >> On Sun, 18 Dec 2011 16:19:11 -0800, Joerg <invalid@invalid.invalid> >> wrote: >> >>> Fred Bartoli wrote: >>>> Joerg a &#2013265929;crit : >>>>> Fred Bartoli wrote: >>>>>> Joerg a &#2013265929;crit : >>>>>>> John Larkin wrote: >>>>>>> >>>>>>> [SPICE netlist] >>>>>>> >>>>>>>> I'm trying to get the most linear ramp at OUT, from +1 to +3 volts in >>>>>>>> 16 ns. AD8014 was probably a bad choice, and the best feedback >>>>>>>> resistor value is way below the 1K that ADI suggests for a follower. >>>>>>>> >>>>>>>> I had to use .lib instead of .include to make LT Spice happy. The >>>>>>>> default pin order was ok. >>>>>>>> >>>>>>>> If the opamp model is accurate (namely, it doesn't oscillate with the >>>>>>>> 249 ohm resistor) it looks pretty good. My original circuit (R2=1K, >>>>>>>> L1=56n) was terrible. I'll try it in real life next. >>>>>>>> >>>>>>> Doesn't look bad at all. For snappier corners you have to pick an amp >>>>>>> with a lot more bandwidth. Like this little dude: >>>>>>> >>>>>>> http://www.ti.com/lit/ds/symlink/ths4303.pdf >>>>>>> >>>>>>> However, the AD8014 is a CFB and they really do not like this >>>>>>> configuration with just Rf and a cap from IN- to ground. Might put them >>>>>>> close to oscillation even if SPICE says they are ok. >>>>>>> >>>>>> Ahem, CFB opamp, for the same FB resistor, do tolerate more parasitics >>>>>> than VFB opamps. >>>>>> Because the additional parasitic pole frequency is Rfb Cp for the VFB >>>>>> and is Rin Cp for the CFB opamp, with Rin being roughly between 50R and >>>>>> 100R. >>>>>> What CFB opamps don't like much is parasitic inductance in series with >>>>>> their minus input. >>>>>> >>>>> http://cds.linear.com/docs/Design%20Note/dn46fa.pdf >>>>> >>>>> Quote "DO NOT PUT A SMALL CAPACITOR FROM THE INVERTING INPUT >>>>> OF A CURRENT FEEDBACK AMPLIFIER TO ANYWHERE" >>>>> >>>> Don't clip the end of sentence please. So: >>>> "DO NOT PUT A SMALL CAPACITOR FROM THE INVERTING INPUT OF A CURRENT >>>> FEEDBACK AMPLIFIER TO ANYWHERE, ESPECIALLY NOT TO THE OUTPUT." >>>> >>>> Now the next sentence is somewhat incomplete. >>>> "The capacitor on the inverting input will cause peaking or >>>> oscillations." should be more like : >>>> "A capacitor between the inverting input and GND will cause peaking >>>> while a capacitor between the inverting input and the output will cause >>>> oscillations." >>>> >>> In my experience both can cause oscillation. >>> >>> >>>>> Yes, they put it all in capital letters, and if LTC does that they have >>>>> their reasons :-) >>>> While if I'm saying that I do have mine :-) >>>> >>> As long as our wives are around only their reasons really count :-) >>> >>> >>>> See the netlist bellow. >>>> The pencil & paper demonstration left as an exercise to the student, to >>>> parrot some people here :-) >>>> >>> Ok, now move C1 across R1 instead of ground -> Total stability. And that >>> ain't happ'nin in real life. I do not trust behavioral models for this >>> kind of stuff. >>> >>> Does anyone have a SPICE model for a CFB amp that is 100% >>> down-to-the-bone tried and true and has zero behavioral elements in there? >> >> If there were one, full of transistors and caps and such, it would >> probably run very, very slowly. >> > >Not in your case because you only want to look at one lone ramp. If you >want to sim a switcher with start-up and all that in non-behavioral, >different thing. BTDT. I used that day to repair a deck post while the >sim was running inside. > >Why are there no aluminum deck posts that don't rot?
Why are there no wooden deck posts that don't rot? Why doesn't Home Depot sell stainless steel deck posts?
> > >> When I sim circuits, I generally use a VCVS to simulate an opamp, with >> an RC on the output if bandwidth matters. Runs fast! >> > >But it'll tell lies :-)
All Spice tells lies. A VCVS opamp works fine in situations where you know it works fine.
> > >>> Even then it's risky. CFB amps aren't all the same. Some really do not >>> like G=+1 operation while others are ok in that configuration. >> >> G=1 usually works fine if you use the right feedback resistor. I'm >> groveling around for 0.1% linearity on a 16 ns ramp, so that's a >> little delicate. >> >> The AD8014, with 1.4 mA supply current, barely qualifies as a CFB. >> > >In this case it's almost tempting to try something more unorthodox. Use >a nicely linear RF amp or just a follower with enough amplitude range as >a 1:1 buffer and then servo out the DC error with an el-cheapo opamp. >Costs less, too, but I guess that's not a concern here.
Sounds like a ton of parts. All I really need is a better opamp. One of the VFB fast fet opamps, like an ADA4817 maybe. I'd have to change the PCB layout for that. Expensive, too. John
On Mon, 19 Dec 2011 08:41:48 -0800, Fred Abse
<excretatauris@invalid.invalid> wrote:

>On Sun, 18 Dec 2011 16:19:11 -0800, Joerg wrote: > >> I do not trust behavioral models for this >> kind of stuff. > >Me, too. For any kind of stuff. I've been spending a chunk of my free time >trying to get a Zetex-supplied, partially behavioral model for ZTX415 to >get somewhere close to their own datasheet and app note figures under >avalanche conditions. It does avalanche, but that's about all you can say, >the starting voltages are nowhere near published curves. That's before >I've gotten round to actually measuring one. I guess I'll have to roll my >own.
Those Zetex avalanche transistors are very repeatable and avalanche hard, pretty much shorting out like an SCR when they fire. But they are slow, with nanosecond edges, not picoseconds. Using a SOT23 transistor to make 12 kilowatt pulses is pretty impressive. I usually trigger them, rather than waiting for them to fire on their own. That way, you get very repeatable pulses. Just a little blip on the base will do it. Jitter is very low. I was told they are made in Russia. Good avalanche transistors seem to come out of ancient diffused-junction processes. Modern epitaxial parts don't avalanche usefully. Why model this, when you can measure them? John
John Larkin wrote:
> On Mon, 19 Dec 2011 07:39:35 -0800, Joerg <invalid@invalid.invalid> > wrote: > >> John Larkin wrote: >>> On Sun, 18 Dec 2011 16:19:11 -0800, Joerg <invalid@invalid.invalid> >>> wrote: >>> >>>> Fred Bartoli wrote: >>>>> Joerg a &#2013265929;crit : >>>>>> Fred Bartoli wrote: >>>>>>> Joerg a &#2013265929;crit : >>>>>>>> John Larkin wrote: >>>>>>>> >>>>>>>> [SPICE netlist] >>>>>>>> >>>>>>>>> I'm trying to get the most linear ramp at OUT, from +1 to +3 volts in >>>>>>>>> 16 ns. AD8014 was probably a bad choice, and the best feedback >>>>>>>>> resistor value is way below the 1K that ADI suggests for a follower. >>>>>>>>> >>>>>>>>> I had to use .lib instead of .include to make LT Spice happy. The >>>>>>>>> default pin order was ok. >>>>>>>>> >>>>>>>>> If the opamp model is accurate (namely, it doesn't oscillate with the >>>>>>>>> 249 ohm resistor) it looks pretty good. My original circuit (R2=1K, >>>>>>>>> L1=56n) was terrible. I'll try it in real life next. >>>>>>>>> >>>>>>>> Doesn't look bad at all. For snappier corners you have to pick an amp >>>>>>>> with a lot more bandwidth. Like this little dude: >>>>>>>> >>>>>>>> http://www.ti.com/lit/ds/symlink/ths4303.pdf >>>>>>>> >>>>>>>> However, the AD8014 is a CFB and they really do not like this >>>>>>>> configuration with just Rf and a cap from IN- to ground. Might put them >>>>>>>> close to oscillation even if SPICE says they are ok. >>>>>>>> >>>>>>> Ahem, CFB opamp, for the same FB resistor, do tolerate more parasitics >>>>>>> than VFB opamps. >>>>>>> Because the additional parasitic pole frequency is Rfb Cp for the VFB >>>>>>> and is Rin Cp for the CFB opamp, with Rin being roughly between 50R and >>>>>>> 100R. >>>>>>> What CFB opamps don't like much is parasitic inductance in series with >>>>>>> their minus input. >>>>>>> >>>>>> http://cds.linear.com/docs/Design%20Note/dn46fa.pdf >>>>>> >>>>>> Quote "DO NOT PUT A SMALL CAPACITOR FROM THE INVERTING INPUT >>>>>> OF A CURRENT FEEDBACK AMPLIFIER TO ANYWHERE" >>>>>> >>>>> Don't clip the end of sentence please. So: >>>>> "DO NOT PUT A SMALL CAPACITOR FROM THE INVERTING INPUT OF A CURRENT >>>>> FEEDBACK AMPLIFIER TO ANYWHERE, ESPECIALLY NOT TO THE OUTPUT." >>>>> >>>>> Now the next sentence is somewhat incomplete. >>>>> "The capacitor on the inverting input will cause peaking or >>>>> oscillations." should be more like : >>>>> "A capacitor between the inverting input and GND will cause peaking >>>>> while a capacitor between the inverting input and the output will cause >>>>> oscillations." >>>>> >>>> In my experience both can cause oscillation. >>>> >>>> >>>>>> Yes, they put it all in capital letters, and if LTC does that they have >>>>>> their reasons :-) >>>>> While if I'm saying that I do have mine :-) >>>>> >>>> As long as our wives are around only their reasons really count :-) >>>> >>>> >>>>> See the netlist bellow. >>>>> The pencil & paper demonstration left as an exercise to the student, to >>>>> parrot some people here :-) >>>>> >>>> Ok, now move C1 across R1 instead of ground -> Total stability. And that >>>> ain't happ'nin in real life. I do not trust behavioral models for this >>>> kind of stuff. >>>> >>>> Does anyone have a SPICE model for a CFB amp that is 100% >>>> down-to-the-bone tried and true and has zero behavioral elements in there? >>> If there were one, full of transistors and caps and such, it would >>> probably run very, very slowly. >>> >> Not in your case because you only want to look at one lone ramp. If you >> want to sim a switcher with start-up and all that in non-behavioral, >> different thing. BTDT. I used that day to repair a deck post while the >> sim was running inside. >> >> Why are there no aluminum deck posts that don't rot? > > Why are there no wooden deck posts that don't rot?
They do, but the injected stuff rots screws and can poison animals if they lick or crunch it. Small children are a concern as well.
> ... Why doesn't Home Depot sell stainless steel deck posts? >
Touch to drill. Aluminum would be cheaper and good enough. There is a large market but they fail to see it. Galvanized works well, too, it an last decades.
> >> >>> When I sim circuits, I generally use a VCVS to simulate an opamp, with >>> an RC on the output if bandwidth matters. Runs fast! >>> >> But it'll tell lies :-) > > All Spice tells lies. A VCVS opamp works fine in situations where you > know it works fine. >
And you can switch 5kV with a 2N7002 because SPICE doesn't have a *KABLAM* function :-)
>> >>>> Even then it's risky. CFB amps aren't all the same. Some really do not >>>> like G=+1 operation while others are ok in that configuration. >>> G=1 usually works fine if you use the right feedback resistor. I'm >>> groveling around for 0.1% linearity on a 16 ns ramp, so that's a >>> little delicate. >>> >>> The AD8014, with 1.4 mA supply current, barely qualifies as a CFB. >>> >> In this case it's almost tempting to try something more unorthodox. Use >> a nicely linear RF amp or just a follower with enough amplitude range as >> a 1:1 buffer and then servo out the DC error with an el-cheapo opamp. >> Costs less, too, but I guess that's not a concern here. > > Sounds like a ton of parts. All I really need is a better opamp. One > of the VFB fast fet opamps, like an ADA4817 maybe. I'd have to change > the PCB layout for that. Expensive, too. >
I've had an app recently where I was in a similar pickle. The only real good option was to accept a fixed gain of 5 and use the 12GHz rocket amps from TI. That did the trick. External resistor just don't work well anymore at those speeds, too much ringing. -- Regards, Joerg http://www.analogconsultants.com/
On Mon, 19 Dec 2011 09:42:04 -0800, Joerg <invalid@invalid.invalid>
wrote:

>John Larkin wrote: >> On Mon, 19 Dec 2011 07:39:35 -0800, Joerg <invalid@invalid.invalid> >> wrote: >> >>> John Larkin wrote: >>>> On Sun, 18 Dec 2011 16:19:11 -0800, Joerg <invalid@invalid.invalid> >>>> wrote: >>>> >>>>> Fred Bartoli wrote: >>>>>> Joerg a &#2013265929;crit : >>>>>>> Fred Bartoli wrote: >>>>>>>> Joerg a &#2013265929;crit : >>>>>>>>> John Larkin wrote: >>>>>>>>> >>>>>>>>> [SPICE netlist] >>>>>>>>> >>>>>>>>>> I'm trying to get the most linear ramp at OUT, from +1 to +3 volts in >>>>>>>>>> 16 ns. AD8014 was probably a bad choice, and the best feedback >>>>>>>>>> resistor value is way below the 1K that ADI suggests for a follower. >>>>>>>>>> >>>>>>>>>> I had to use .lib instead of .include to make LT Spice happy. The >>>>>>>>>> default pin order was ok. >>>>>>>>>> >>>>>>>>>> If the opamp model is accurate (namely, it doesn't oscillate with the >>>>>>>>>> 249 ohm resistor) it looks pretty good. My original circuit (R2=1K, >>>>>>>>>> L1=56n) was terrible. I'll try it in real life next. >>>>>>>>>> >>>>>>>>> Doesn't look bad at all. For snappier corners you have to pick an amp >>>>>>>>> with a lot more bandwidth. Like this little dude: >>>>>>>>> >>>>>>>>> http://www.ti.com/lit/ds/symlink/ths4303.pdf >>>>>>>>> >>>>>>>>> However, the AD8014 is a CFB and they really do not like this >>>>>>>>> configuration with just Rf and a cap from IN- to ground. Might put them >>>>>>>>> close to oscillation even if SPICE says they are ok. >>>>>>>>> >>>>>>>> Ahem, CFB opamp, for the same FB resistor, do tolerate more parasitics >>>>>>>> than VFB opamps. >>>>>>>> Because the additional parasitic pole frequency is Rfb Cp for the VFB >>>>>>>> and is Rin Cp for the CFB opamp, with Rin being roughly between 50R and >>>>>>>> 100R. >>>>>>>> What CFB opamps don't like much is parasitic inductance in series with >>>>>>>> their minus input. >>>>>>>> >>>>>>> http://cds.linear.com/docs/Design%20Note/dn46fa.pdf >>>>>>> >>>>>>> Quote "DO NOT PUT A SMALL CAPACITOR FROM THE INVERTING INPUT >>>>>>> OF A CURRENT FEEDBACK AMPLIFIER TO ANYWHERE" >>>>>>> >>>>>> Don't clip the end of sentence please. So: >>>>>> "DO NOT PUT A SMALL CAPACITOR FROM THE INVERTING INPUT OF A CURRENT >>>>>> FEEDBACK AMPLIFIER TO ANYWHERE, ESPECIALLY NOT TO THE OUTPUT." >>>>>> >>>>>> Now the next sentence is somewhat incomplete. >>>>>> "The capacitor on the inverting input will cause peaking or >>>>>> oscillations." should be more like : >>>>>> "A capacitor between the inverting input and GND will cause peaking >>>>>> while a capacitor between the inverting input and the output will cause >>>>>> oscillations." >>>>>> >>>>> In my experience both can cause oscillation. >>>>> >>>>> >>>>>>> Yes, they put it all in capital letters, and if LTC does that they have >>>>>>> their reasons :-) >>>>>> While if I'm saying that I do have mine :-) >>>>>> >>>>> As long as our wives are around only their reasons really count :-) >>>>> >>>>> >>>>>> See the netlist bellow. >>>>>> The pencil & paper demonstration left as an exercise to the student, to >>>>>> parrot some people here :-) >>>>>> >>>>> Ok, now move C1 across R1 instead of ground -> Total stability. And that >>>>> ain't happ'nin in real life. I do not trust behavioral models for this >>>>> kind of stuff. >>>>> >>>>> Does anyone have a SPICE model for a CFB amp that is 100% >>>>> down-to-the-bone tried and true and has zero behavioral elements in there? >>>> If there were one, full of transistors and caps and such, it would >>>> probably run very, very slowly. >>>> >>> Not in your case because you only want to look at one lone ramp. If you >>> want to sim a switcher with start-up and all that in non-behavioral, >>> different thing. BTDT. I used that day to repair a deck post while the >>> sim was running inside. >>> >>> Why are there no aluminum deck posts that don't rot? >> >> Why are there no wooden deck posts that don't rot? > > >They do, but the injected stuff rots screws and can poison animals if >they lick or crunch it. Small children are a concern as well. > > >> ... Why doesn't Home Depot sell stainless steel deck posts? >> > >Touch to drill. Aluminum would be cheaper and good enough. There is a >large market but they fail to see it. Galvanized works well, too, it an >last decades. > >> >>> >>>> When I sim circuits, I generally use a VCVS to simulate an opamp, with >>>> an RC on the output if bandwidth matters. Runs fast! >>>> >>> But it'll tell lies :-) >> >> All Spice tells lies. A VCVS opamp works fine in situations where you >> know it works fine. >> > >And you can switch 5kV with a 2N7002 because SPICE doesn't have a >*KABLAM* function :-)
I posted a sim of a 1N4148 running happily at 100KV reverse bias.
> > >>> >>>>> Even then it's risky. CFB amps aren't all the same. Some really do not >>>>> like G=+1 operation while others are ok in that configuration. >>>> G=1 usually works fine if you use the right feedback resistor. I'm >>>> groveling around for 0.1% linearity on a 16 ns ramp, so that's a >>>> little delicate. >>>> >>>> The AD8014, with 1.4 mA supply current, barely qualifies as a CFB. >>>> >>> In this case it's almost tempting to try something more unorthodox. Use >>> a nicely linear RF amp or just a follower with enough amplitude range as >>> a 1:1 buffer and then servo out the DC error with an el-cheapo opamp. >>> Costs less, too, but I guess that's not a concern here. >> >> Sounds like a ton of parts. All I really need is a better opamp. One >> of the VFB fast fet opamps, like an ADA4817 maybe. I'd have to change >> the PCB layout for that. Expensive, too. >> > >I've had an app recently where I was in a similar pickle. The only real >good option was to accept a fixed gain of 5 and use the 12GHz rocket >amps from TI. That did the trick. > >External resistor just don't work well anymore at those speeds, too much >ringing.
It helps some to keep the feedback path very tight and cut out any planes below the stuff on the inverting node. But those fixed-gain TI things are the cat's pajamas. Or use a 99 cent darlington MMIC, if conditions allow. They are dead stable and work fine wideband/time domain. John
On Sat, 17 Dec 2011 17:23:08 -0500, "krw@att.bizzzzzzzzzzzz"
<krw@att.bizzzzzzzzzzzz> wrote:

>On Sat, 17 Dec 2011 11:37:01 -0800, Joerg <invalid@invalid.invalid> wrote: > >>krw@att.bizzzzzzzzzzzz wrote: >>> On Sat, 17 Dec 2011 10:26:28 -0800, Joerg <invalid@invalid.invalid> wrote: >>> >>>> John Larkin wrote: >>>>> On Fri, 16 Dec 2011 16:53:26 -0700, Jim Thompson >>>>> <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>>>> >>>>>> On Thu, 15 Dec 2011 08:21:17 -0800, John Larkin >>>>>> <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>>>>> >>>>>>> Hi, >>>>>>> >>>>>>> I have the AD8014 Spice model from Analog Devices, and I have LT >>>>>>> Spice. >>>>>>> >>>>>>> The model file AD8014.cir starts with... >>>>>>> >>>>>>> >>>>>>> AD8014 SPICE model >>>>>>> >>>>>>> * Node assignments >>>>>>> * non-inverting input >>>>>>> * | inverting input >>>>>>> * | | positive supply >>>>>>> * | | | negative supply >>>>>>> * | | | | output >>>>>>> * | | | | | >>>>>>> .SUBCKT AD8014 1 2 99 50 28 >>>>>>> >>>>>>> >>>>>>> So, how do I draw an LT Spice schematic, with the usual opamp symbol, >>>>>>> and plug this model into it? >>>>>>> >>>>>>> I'm having a small problem with my ramp circuit >>>>>>> >>>>>>> ftp://jjlarkin.lmi.net/Ramp.JPG >>>>>>> >>>>>>> and it would be more convenient, just now, to tweak it by simulating >>>>>>> instead of soldering. >>>>>>> >>>>>>> Yes, yes, I should know this, but I don't use Spice often enough to >>>>>>> remember all the mechanics. >>>>>>> >>>>>>> Speaking of which, we have more ideas and stuff to do than we have >>>>>>> time and energy. It would be great to have someone who could do Spice >>>>>>> setups and simulations and parts research and maybe a little >>>>>>> breadboarding for us occasionally, for pay of course. >>>>>>> >>>>>>> John >>>>>> The AD8014 Spice model is crap... pure behavioral. >>>>> But it doesn't behave right! >>>>> >>>> That's just the problem with behavioral models. Even some LT parts which >>>> are nearly all behavioral with some secret hooks don't. I found numerous >>>> discrepancies, some rather serious. Synchronizable switchers that didn't >>>> synchronize correctly, a comparator where I discovered a real bug in the >>>> silicon, things like that. >>> >>> At the LT Spice seminar a few months ago, they warned about synchronous >>> switchers. The netlists include warnings that the models don't allow >>> synchronization. >>> >> >>It would be kind of nice if their jig schematics contained a warning >>about that. > >You don't read the Surgeon General's warning on all the models you use? ;-) > >>> Yes, that's the problem I've found using Spice. Its utility is severely >>> compromised by lousy models. I guess I was spoiled by good models. ;-) >>> >> >>The ones in bikinis? :-) > >Nah, they've been bad for my health for >40 years. > >>>> That is not to diss LTSpice or the models, one just has to not expect >>>> too much. >>> >>> Like correct operation? ;-) >>> >> >>It can be an issue. For example, a comparator had an undocumented flaw >>after power-up. I was the guy who found out, and only after layouts and >>prototype build :-( > >Someone has to find those sorts of problems. It's one reason I don't like to >do my own verification. Bad assumptions often get passed from design right >through to the customer.
Or, more often, through to hundreds of customers, who each trip over the same bug at great expense. And the parts or datasheets aren't fixed for years or decades. We need an ICBUGS.COM web site, where we post the gotchas we find. Except the name is already claimed. John
John Larkin wrote:
> On Sat, 17 Dec 2011 17:23:08 -0500, "krw@att.bizzzzzzzzzzzz" > <krw@att.bizzzzzzzzzzzz> wrote: > >> On Sat, 17 Dec 2011 11:37:01 -0800, Joerg <invalid@invalid.invalid> wrote: >> >>> krw@att.bizzzzzzzzzzzz wrote: >>>> On Sat, 17 Dec 2011 10:26:28 -0800, Joerg <invalid@invalid.invalid> wrote: >>>> >>>>> John Larkin wrote: >>>>>> On Fri, 16 Dec 2011 16:53:26 -0700, Jim Thompson >>>>>> <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>>>>> >>>>>>> On Thu, 15 Dec 2011 08:21:17 -0800, John Larkin >>>>>>> <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>>>>>> >>>>>>>> Hi, >>>>>>>> >>>>>>>> I have the AD8014 Spice model from Analog Devices, and I have LT >>>>>>>> Spice. >>>>>>>> >>>>>>>> The model file AD8014.cir starts with... >>>>>>>> >>>>>>>> >>>>>>>> AD8014 SPICE model >>>>>>>> >>>>>>>> * Node assignments >>>>>>>> * non-inverting input >>>>>>>> * | inverting input >>>>>>>> * | | positive supply >>>>>>>> * | | | negative supply >>>>>>>> * | | | | output >>>>>>>> * | | | | | >>>>>>>> .SUBCKT AD8014 1 2 99 50 28 >>>>>>>> >>>>>>>> >>>>>>>> So, how do I draw an LT Spice schematic, with the usual opamp symbol, >>>>>>>> and plug this model into it? >>>>>>>> >>>>>>>> I'm having a small problem with my ramp circuit >>>>>>>> >>>>>>>> ftp://jjlarkin.lmi.net/Ramp.JPG >>>>>>>> >>>>>>>> and it would be more convenient, just now, to tweak it by simulating >>>>>>>> instead of soldering. >>>>>>>> >>>>>>>> Yes, yes, I should know this, but I don't use Spice often enough to >>>>>>>> remember all the mechanics. >>>>>>>> >>>>>>>> Speaking of which, we have more ideas and stuff to do than we have >>>>>>>> time and energy. It would be great to have someone who could do Spice >>>>>>>> setups and simulations and parts research and maybe a little >>>>>>>> breadboarding for us occasionally, for pay of course. >>>>>>>> >>>>>>>> John >>>>>>> The AD8014 Spice model is crap... pure behavioral. >>>>>> But it doesn't behave right! >>>>>> >>>>> That's just the problem with behavioral models. Even some LT parts which >>>>> are nearly all behavioral with some secret hooks don't. I found numerous >>>>> discrepancies, some rather serious. Synchronizable switchers that didn't >>>>> synchronize correctly, a comparator where I discovered a real bug in the >>>>> silicon, things like that. >>>> At the LT Spice seminar a few months ago, they warned about synchronous >>>> switchers. The netlists include warnings that the models don't allow >>>> synchronization. >>>> >>> It would be kind of nice if their jig schematics contained a warning >>> about that. >> You don't read the Surgeon General's warning on all the models you use? ;-) >> >>>> Yes, that's the problem I've found using Spice. Its utility is severely >>>> compromised by lousy models. I guess I was spoiled by good models. ;-) >>>> >>> The ones in bikinis? :-) >> Nah, they've been bad for my health for >40 years. >> >>>>> That is not to diss LTSpice or the models, one just has to not expect >>>>> too much. >>>> Like correct operation? ;-) >>>> >>> It can be an issue. For example, a comparator had an undocumented flaw >>> after power-up. I was the guy who found out, and only after layouts and >>> prototype build :-( >> Someone has to find those sorts of problems. It's one reason I don't like to >> do my own verification. Bad assumptions often get passed from design right >> through to the customer. > > Or, more often, through to hundreds of customers, who each trip over > the same bug at great expense. And the parts or datasheets aren't > fixed for years or decades. > > We need an ICBUGS.COM web site, where we post the gotchas we find. > Except the name is already claimed. >
How about icbloopers.com, icgoofs.com or cattywompuschips.com? -- Regards, Joerg http://www.analogconsultants.com/
Joerg wrote:
> > John Larkin wrote: > > On Sat, 17 Dec 2011 17:23:08 -0500, "krw@att.bizzzzzzzzzzzz" > > <krw@att.bizzzzzzzzzzzz> wrote: > > > >> On Sat, 17 Dec 2011 11:37:01 -0800, Joerg <invalid@invalid.invalid> wrote: > >> > >>> krw@att.bizzzzzzzzzzzz wrote: > >>>> On Sat, 17 Dec 2011 10:26:28 -0800, Joerg <invalid@invalid.invalid> wrote: > >>>> > >>>>> John Larkin wrote: > >>>>>> On Fri, 16 Dec 2011 16:53:26 -0700, Jim Thompson > >>>>>> <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: > >>>>>> > >>>>>>> On Thu, 15 Dec 2011 08:21:17 -0800, John Larkin > >>>>>>> <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: > >>>>>>> > >>>>>>>> Hi, > >>>>>>>> > >>>>>>>> I have the AD8014 Spice model from Analog Devices, and I have LT > >>>>>>>> Spice. > >>>>>>>> > >>>>>>>> The model file AD8014.cir starts with... > >>>>>>>> > >>>>>>>> > >>>>>>>> AD8014 SPICE model > >>>>>>>> > >>>>>>>> * Node assignments > >>>>>>>> * non-inverting input > >>>>>>>> * | inverting input > >>>>>>>> * | | positive supply > >>>>>>>> * | | | negative supply > >>>>>>>> * | | | | output > >>>>>>>> * | | | | | > >>>>>>>> .SUBCKT AD8014 1 2 99 50 28 > >>>>>>>> > >>>>>>>> > >>>>>>>> So, how do I draw an LT Spice schematic, with the usual opamp symbol, > >>>>>>>> and plug this model into it? > >>>>>>>> > >>>>>>>> I'm having a small problem with my ramp circuit > >>>>>>>> > >>>>>>>> ftp://jjlarkin.lmi.net/Ramp.JPG > >>>>>>>> > >>>>>>>> and it would be more convenient, just now, to tweak it by simulating > >>>>>>>> instead of soldering. > >>>>>>>> > >>>>>>>> Yes, yes, I should know this, but I don't use Spice often enough to > >>>>>>>> remember all the mechanics. > >>>>>>>> > >>>>>>>> Speaking of which, we have more ideas and stuff to do than we have > >>>>>>>> time and energy. It would be great to have someone who could do Spice > >>>>>>>> setups and simulations and parts research and maybe a little > >>>>>>>> breadboarding for us occasionally, for pay of course. > >>>>>>>> > >>>>>>>> John > >>>>>>> The AD8014 Spice model is crap... pure behavioral. > >>>>>> But it doesn't behave right! > >>>>>> > >>>>> That's just the problem with behavioral models. Even some LT parts which > >>>>> are nearly all behavioral with some secret hooks don't. I found numerous > >>>>> discrepancies, some rather serious. Synchronizable switchers that didn't > >>>>> synchronize correctly, a comparator where I discovered a real bug in the > >>>>> silicon, things like that. > >>>> At the LT Spice seminar a few months ago, they warned about synchronous > >>>> switchers. The netlists include warnings that the models don't allow > >>>> synchronization. > >>>> > >>> It would be kind of nice if their jig schematics contained a warning > >>> about that. > >> You don't read the Surgeon General's warning on all the models you use? ;-) > >> > >>>> Yes, that's the problem I've found using Spice. Its utility is severely > >>>> compromised by lousy models. I guess I was spoiled by good models. ;-) > >>>> > >>> The ones in bikinis? :-) > >> Nah, they've been bad for my health for >40 years. > >> > >>>>> That is not to diss LTSpice or the models, one just has to not expect > >>>>> too much. > >>>> Like correct operation? ;-) > >>>> > >>> It can be an issue. For example, a comparator had an undocumented flaw > >>> after power-up. I was the guy who found out, and only after layouts and > >>> prototype build :-( > >> Someone has to find those sorts of problems. It's one reason I don't like to > >> do my own verification. Bad assumptions often get passed from design right > >> through to the customer. > > > > Or, more often, through to hundreds of customers, who each trip over > > the same bug at great expense. And the parts or datasheets aren't > > fixed for years or decades. > > > > We need an ICBUGS.COM web site, where we post the gotchas we find. > > Except the name is already claimed. > > > > How about icbloopers.com, icgoofs.com or cattywompuschips.com?
We should call it 'joergwazhere.org' ;-) -- You can't have a sense of humor, if you have no sense.
On 12/19/2011 05:27 PM, Michael A. Terrell wrote:
> > Joerg wrote: >> >> John Larkin wrote: >>> On Sat, 17 Dec 2011 17:23:08 -0500, "krw@att.bizzzzzzzzzzzz" >>> <krw@att.bizzzzzzzzzzzz> wrote: >>> >>>> On Sat, 17 Dec 2011 11:37:01 -0800, Joerg<invalid@invalid.invalid> wrote: >>>> >>>>> krw@att.bizzzzzzzzzzzz wrote: >>>>>> On Sat, 17 Dec 2011 10:26:28 -0800, Joerg<invalid@invalid.invalid> wrote: >>>>>> >>>>>>> John Larkin wrote: >>>>>>>> On Fri, 16 Dec 2011 16:53:26 -0700, Jim Thompson >>>>>>>> <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>>>>>>> >>>>>>>>> On Thu, 15 Dec 2011 08:21:17 -0800, John Larkin >>>>>>>>> <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>>>>>>>> >>>>>>>>>> Hi, >>>>>>>>>> >>>>>>>>>> I have the AD8014 Spice model from Analog Devices, and I have LT >>>>>>>>>> Spice. >>>>>>>>>> >>>>>>>>>> The model file AD8014.cir starts with... >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> AD8014 SPICE model >>>>>>>>>> >>>>>>>>>> * Node assignments >>>>>>>>>> * non-inverting input >>>>>>>>>> * | inverting input >>>>>>>>>> * | | positive supply >>>>>>>>>> * | | | negative supply >>>>>>>>>> * | | | | output >>>>>>>>>> * | | | | | >>>>>>>>>> .SUBCKT AD8014 1 2 99 50 28 >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> So, how do I draw an LT Spice schematic, with the usual opamp symbol, >>>>>>>>>> and plug this model into it? >>>>>>>>>> >>>>>>>>>> I'm having a small problem with my ramp circuit >>>>>>>>>> >>>>>>>>>> ftp://jjlarkin.lmi.net/Ramp.JPG >>>>>>>>>> >>>>>>>>>> and it would be more convenient, just now, to tweak it by simulating >>>>>>>>>> instead of soldering. >>>>>>>>>> >>>>>>>>>> Yes, yes, I should know this, but I don't use Spice often enough to >>>>>>>>>> remember all the mechanics. >>>>>>>>>> >>>>>>>>>> Speaking of which, we have more ideas and stuff to do than we have >>>>>>>>>> time and energy. It would be great to have someone who could do Spice >>>>>>>>>> setups and simulations and parts research and maybe a little >>>>>>>>>> breadboarding for us occasionally, for pay of course. >>>>>>>>>> >>>>>>>>>> John >>>>>>>>> The AD8014 Spice model is crap... pure behavioral. >>>>>>>> But it doesn't behave right! >>>>>>>> >>>>>>> That's just the problem with behavioral models. Even some LT parts which >>>>>>> are nearly all behavioral with some secret hooks don't. I found numerous >>>>>>> discrepancies, some rather serious. Synchronizable switchers that didn't >>>>>>> synchronize correctly, a comparator where I discovered a real bug in the >>>>>>> silicon, things like that. >>>>>> At the LT Spice seminar a few months ago, they warned about synchronous >>>>>> switchers. The netlists include warnings that the models don't allow >>>>>> synchronization. >>>>>> >>>>> It would be kind of nice if their jig schematics contained a warning >>>>> about that. >>>> You don't read the Surgeon General's warning on all the models you use? ;-) >>>> >>>>>> Yes, that's the problem I've found using Spice. Its utility is severely >>>>>> compromised by lousy models. I guess I was spoiled by good models. ;-) >>>>>> >>>>> The ones in bikinis? :-) >>>> Nah, they've been bad for my health for>40 years. >>>> >>>>>>> That is not to diss LTSpice or the models, one just has to not expect >>>>>>> too much. >>>>>> Like correct operation? ;-) >>>>>> >>>>> It can be an issue. For example, a comparator had an undocumented flaw >>>>> after power-up. I was the guy who found out, and only after layouts and >>>>> prototype build :-( >>>> Someone has to find those sorts of problems. It's one reason I don't like to >>>> do my own verification. Bad assumptions often get passed from design right >>>> through to the customer. >>> >>> Or, more often, through to hundreds of customers, who each trip over >>> the same bug at great expense. And the parts or datasheets aren't >>> fixed for years or decades. >>> >>> We need an ICBUGS.COM web site, where we post the gotchas we find. >>> Except the name is already claimed. >>> >> >> How about icbloopers.com, icgoofs.com or cattywompuschips.com? > > > We should call it 'joergwazhere.org' ;-) > >
chipbugs.com is available. Cheers Phil Hobbs (Who just let three of his domain names lapse) -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 845-480-2058 hobbs at electrooptical dot net http://electrooptical.net
On 19 Dec., 22:28, John Larkin
<jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> On Mon, 19 Dec 2011 09:42:04 -0800, Joerg <inva...@invalid.invalid> > wrote: > > > > > > > > > > >John Larkin wrote: > >> On Mon, 19 Dec 2011 07:39:35 -0800, Joerg <inva...@invalid.invalid> > >> wrote: > > >>> John Larkin wrote: > >>>> On Sun, 18 Dec 2011 16:19:11 -0800, Joerg <inva...@invalid.invalid> > >>>> wrote: > > >>>>> Fred Bartoli wrote: > >>>>>> Joerg a =E9crit : > >>>>>>> Fred Bartoli wrote: > >>>>>>>> Joerg a =E9crit : > >>>>>>>>> John Larkin wrote: > > >>>>>>>>> [SPICE netlist] > > >>>>>>>>>> I'm trying to get the most linear ramp at OUT, from +1 to +3 v=
olts in
> >>>>>>>>>> 16 ns. AD8014 was probably a bad choice, and the best feedback > >>>>>>>>>> resistor value is way below the 1K that ADI suggests for a fol=
lower.
> > >>>>>>>>>> I had to use .lib instead of .include to make LT Spice happy. =
The
> >>>>>>>>>> default pin order was ok. > > >>>>>>>>>> If the opamp model is accurate (namely, it doesn't oscillate w=
ith the
> >>>>>>>>>> 249 ohm resistor) it looks pretty good. My original circuit (R=
2=3D1K,
> >>>>>>>>>> L1=3D56n) was terrible. I'll try it in real life next. > > >>>>>>>>> Doesn't look bad at all. For snappier corners you have to pick =
an amp
> >>>>>>>>> with a lot more bandwidth. Like this little dude: > > >>>>>>>>>http://www.ti.com/lit/ds/symlink/ths4303.pdf > > >>>>>>>>> However, the AD8014 is a CFB and they really do not like this > >>>>>>>>> configuration with just Rf and a cap from IN- to ground. Might =
put them
> >>>>>>>>> close to oscillation even if SPICE says they are ok. > > >>>>>>>> Ahem, CFB opamp, for the same FB resistor, do tolerate more para=
sitics
> >>>>>>>> than VFB opamps. > >>>>>>>> Because the additional parasitic pole frequency is Rfb Cp for th=
e VFB
> >>>>>>>> and is Rin Cp for the CFB opamp, with Rin being roughly between =
50R and
> >>>>>>>> 100R. > >>>>>>>> What CFB opamps don't like much is parasitic inductance in serie=
s with
> >>>>>>>> their minus input. > > >>>>>>>http://cds.linear.com/docs/Design%20Note/dn46fa.pdf > > >>>>>>> Quote "DO NOT PUT A SMALL CAPACITOR FROM THE INVERTING INPUT > >>>>>>> OF A CURRENT FEEDBACK AMPLIFIER TO ANYWHERE" > > >>>>>> Don't clip the end of sentence please. So: > >>>>>> "DO NOT PUT A SMALL CAPACITOR FROM THE INVERTING INPUT OF A CURREN=
T
> >>>>>> FEEDBACK AMPLIFIER TO ANYWHERE, ESPECIALLY NOT TO THE OUTPUT." > > >>>>>> Now the next sentence is somewhat incomplete. > >>>>>> "The capacitor on the inverting input will cause peaking or > >>>>>> oscillations." should be more like : > >>>>>> "A capacitor between the inverting input and GND will cause peakin=
g
> >>>>>> while a capacitor between the inverting input and the output will =
cause
> >>>>>> oscillations." > > >>>>> In my experience both can cause oscillation. > > >>>>>>> Yes, they put it all in capital letters, and if LTC does that the=
y have
> >>>>>>> their reasons :-) > >>>>>> While if I'm saying that I do have mine :-) > > >>>>> As long as our wives are around only their reasons really count :-) > > >>>>>> See the netlist bellow. > >>>>>> The pencil & =A0paper demonstration left as an exercise to the stu=
dent, to
> >>>>>> parrot some people here :-) > > >>>>> Ok, now move C1 across R1 instead of ground -> Total stability. And=
that
> >>>>> ain't happ'nin in real life. I do not trust behavioral models for t=
his
> >>>>> kind of stuff. > > >>>>> Does anyone have a SPICE model for a CFB amp that is 100% > >>>>> down-to-the-bone tried and true and has zero behavioral elements in=
there?
> >>>> If there were one, full of transistors and caps and such, it would > >>>> probably run very, very slowly. > > >>> Not in your case because you only want to look at one lone ramp. If y=
ou
> >>> want to sim a switcher with start-up and all that in non-behavioral, > >>> different thing. BTDT. I used that day to repair a deck post while th=
e
> >>> sim was running inside. > > >>> Why are there no aluminum deck posts that don't rot? > > >> Why are there no wooden deck posts that don't rot? > > >They do, but the injected stuff rots screws and can poison animals if > >they lick or crunch it. Small children are a concern as well. > > >> =A0 ... Why doesn't Home Depot sell stainless steel deck posts? > > >Touch to drill. Aluminum would be cheaper and good enough. There is a > >large market but they fail to see it. Galvanized works well, too, it an > >last decades. > > >>>> When I sim circuits, I generally use a VCVS to simulate an opamp, wi=
th
> >>>> an RC on the output if bandwidth matters. Runs fast! > > >>> But it'll tell lies :-) > > >> All Spice tells lies. A VCVS opamp works fine in situations where you > >> know it works fine. > > >And you can switch 5kV with a 2N7002 because SPICE doesn't have a > >*KABLAM* function :-) > > I posted a sim of a 1N4148 running happily at 100KV reverse bias. > >
for some reason diodes and mosfets in ltspice doesn't have the parameter bv set. try this: Version 4 SHEET 1 880 680 WIRE 112 32 48 32 WIRE 256 32 192 32 WIRE 48 80 48 32 WIRE 256 80 256 32 WIRE 256 160 256 144 FLAG 48 160 0 FLAG 256 160 0 SYMBOL voltage 48 64 R0 WINDOW 3 -266 54 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value SINE(0 150 1 0 0 0 1) SYMBOL diode 272 144 R180 WINDOW 0 24 72 Left 0 WINDOW 3 -196 32 Left 0 SYMATTR InstName D1 SYMATTR Value MMSD4148_bv SYMBOL res 208 16 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R1 SYMATTR Value 1k TEXT 304 152 Left 0 !.model mmsd4148_bv ako: mmsd4148 bv=3D100 TEXT -218 -4 Left 0 !.tran .5 -Lasse