PLL -- basic question

Started by vkj November 22, 2011
I have just started reading about PLLs.  Most of the (introductory)
material I have seen always starts with the phase as the detected variable.
 And phase = Integral(freq).  But why not use frequency itself?  That is,
why cant you determine the frequency (using a counter) and compare that
with the desired frequency and thus generate an appropriate error signal to
the VCO?  

Thanks,

vkj	   
					
---------------------------------------		
Posted through http://www.Electronics-Related.com
On Nov 22, 7:07=A0pm, "vkj"
<tranquine@n_o_s_p_a_m.n_o_s_p_a_m.gmail.com> wrote:
> I have just started reading about PLLs. =A0Most of the (introductory) > material I have seen always starts with the phase as the detected variabl=
e.
> =A0And phase =3D Integral(freq). =A0But why not use frequency itself? =A0=
That is,
> why cant you determine the frequency (using a counter) and compare that > with the desired frequency and thus generate an appropriate error signal =
to
> the VCO? > > Thanks, > > vkj > > --------------------------------------- > Posted throughhttp://www.Electronics-Related.com
Wouldn't that be an FLL rather than a PLL? At least in TV, the lock MUST be in exact phase. Frequency locked only is insufficient. G=B2
On Nov 22, 10:07=A0pm, "vkj"
<tranquine@n_o_s_p_a_m.n_o_s_p_a_m.gmail.com> wrote:
> I have just started reading about PLLs. =A0Most of the (introductory) > material I have seen always starts with the phase as the detected variabl=
e.
> =A0And phase =3D Integral(freq). =A0But why not use frequency itself? =A0=
That is,
> why cant you determine the frequency (using a counter) and compare that > with the desired frequency and thus generate an appropriate error signal =
to
> the VCO? > > Thanks, > > vkj > > --------------------------------------- > Posted throughhttp://www.Electronics-Related.com
you can, but then it would be a frequency locked loop. if you use phase as the control function, then even when the loop has only finite gain and therefore a phase error, the frequency error is 0. We usually want 0 frequency error and the easiest way to get that is to use phase as the control. Mark
"Mark" <makolber@yahoo.com> wrote in message 
news:0999fcda-8614-4f0d-b22d-aff4c44a2cac@o1g2000vbe.googlegroups.com...
> if you use phase as the control function, then even when the loop has > only finite gain and therefore a phase error, the frequency error is > 0. We usually want 0 frequency error and the easiest way to get that > is to use phase as the control.
In fact, this is a general control loop theorem -- anywhere you have a variable under control, you can achieve zero steady-state error (at constant output) with an ideal integrator. Or for an infinite ramp input, you need a double integrator, etc. In practical terms, you use an op-amp for these sorts of control problems, which approximates an integrator, but still has finite DC gain (60~120dB depending), resulting in a nonzero steady state error term. Only true integrators, usually physically realized manifestations of mathematical quantities, like phase to frequency, or position to velocity, are capable of achieving zero steady state error. Fundamentally, this is why time can be measured so damned accurately -- you can count the vibrations of individual atoms in an atomic clock and keep your circuit in perfect lock-step (and, in turn, radio transmitters, world power distribution networks and internet-sychronized clocks). Even if it varies in the short term (a phase shift), the frequency (rate, ticks/second) remains exactly constant. Tim -- Deep Friar: a very philosophical monk. Website: http://webpages.charter.net/dawill/tmoranwms
"vkj"  wrote in message=20
news:PbqdnQPrPofk_lHTnZ2dnUVZ_qKdnZ2d@giganews.com...

> I have just started reading about PLLs. Most of the (introductory) > material I have seen always starts with the phase as the detected > variable. And phase =3D Integral(freq). But why not use frequency > itself? That is, why cant you determine the frequency (using a > counter) and compare that with the desired frequency and thus > generate an appropriate error signal to the VCO?
Usually a PLL is used to generate a frequency that is an integer = multiple of=20 the fundamental, sometimes as much as 1000 times. For instance, to = measure a=20 low frequency, such as 60 Hz, to a precision of 0.001 Hz, you have the = PLL=20 generate a frequency of about 60 kHz, and then divide that down with = three=20 decade counters to 60 Hz. When the two are compared, a very small change = in=20 frequency will cause a phase error, to which the loop can respond. Of course, these days it is also fairly easy to measure the period of = the 60=20 Hz signal to a high degree of accuracy with, say, a 10 MHz counter, = which=20 will give 166667 counts, and this can be inverted and converted to = frequency=20 to a resolution of 6 uSec. But when I was working with them in 1980, = such=20 computation was rather difficult and expensive. I had actually worked = out a=20 design which would enter the count into a calculator which would do the=20 floating point math and display the result. Now a very popular use of a PLL is to generate higher internal clock = signals=20 on a PIC. The PIC18F2450 uses a 20 MHz clock to generate 48 MHz for full = speed USB. So the oscillator is divided by 5 (4 MHz) and then multiplied = by=20 12 using a PLL. I found a lab document that describes some of the concepts, and it uses = the=20 very popular 74HC4046 (or CD4046) PLL: http://ecee.colorado.edu/~ecen4618/lab4.pdf Paul=20
On Tue, 22 Nov 2011 21:07:37 -0600, vkj wrote:

> I have just started reading about PLLs. Most of the (introductory) > material I have seen always starts with the phase as the detected > variable. > And phase = Integral(freq). But why not use frequency itself? That > is, > why cant you determine the frequency (using a counter) and compare that > with the desired frequency and thus generate an appropriate error signal > to the VCO?
In addition to the desirability of using phase error (which is really only true once the loop is locked -- before then it's a pain in the behind), it's easier to make a good accurate phase comparator than it is to take accurate frequency measurements. So: less hardware, more desirable results -- what more could you want? -- My liberal friends think I'm a conservative kook. My conservative friends think I'm a liberal kook. Why am I not happy that they have found common ground? Tim Wescott, Communications, Control, Circuits & Software http://www.wescottdesign.com
"vkj" <tranquine@n_o_s_p_a_m.n_o_s_p_a_m.gmail.com> schreef in bericht 
news:PbqdnQPrPofk_lHTnZ2dnUVZ_qKdnZ2d@giganews.com...
>I have just started reading about PLLs. Most of the (introductory) > material I have seen always starts with the phase as the detected > variable. > And phase = Integral(freq). But why not use frequency itself? That is, > why cant you determine the frequency (using a counter) and compare that > with the desired frequency and thus generate an appropriate error signal > to > the VCO? > > Thanks, > > vkj > > --------------------------------------- > Posted through http://www.Electronics-Related.com
As a matter of fact it *is* done. I once found a description of a TCVXCO locked on GPS using FLL. Don't remember where. petrus bitbyter

vkj schrieb:

> And phase = Integral(freq). But why not use frequency itself? That is, > why cant you determine the frequency (using a counter) and compare that > with the desired frequency and thus generate an appropriate error signal to > the VCO?
Hello, if you want to determine the frequency with a counter, you need some time to count a result with enough precision. When working with low frequencies, you need 1 second, 10 seconds or even 100 seconds. The long time needed is very bad for a control loop to adjust the frequency of the oscillator. A phase detector is faster and needs less parts or transistors. When working with low frequencies, it is better to count the period time. Bye
On Tue, 22 Nov 2011 23:53:49 -0600, Tim Wescott <tim@seemywebsite.com>
wrote:

>On Tue, 22 Nov 2011 21:07:37 -0600, vkj wrote: > >> I have just started reading about PLLs. Most of the (introductory) >> material I have seen always starts with the phase as the detected >> variable. >> And phase = Integral(freq). But why not use frequency itself? That >> is, >> why cant you determine the frequency (using a counter) and compare that >> with the desired frequency and thus generate an appropriate error signal >> to the VCO? > >In addition to the desirability of using phase error (which is really >only true once the loop is locked -- before then it's a pain in the >behind), it's easier to make a good accurate phase comparator than it is >to take accurate frequency measurements. > >So: less hardware, more desirable results -- what more could you want?
You never answered (or I missed) if you said what _type_ of phase detector you are using. At very narrow bandwidths a PFD with lots of "ooomph" could be the problem... bouncing source, PFD knocks VCO too far. ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
vkj wrote:

> I have just started reading about PLLs. Most of the (introductory) > material I have seen always starts with the phase as the detected variable. > And phase = Integral(freq). But why not use frequency itself? That is, > why cant you determine the frequency (using a counter) and compare that > with the desired frequency and thus generate an appropriate error signal to > the VCO? > > Thanks, > > vkj > > --------------------------------------- > Posted through http://www.Electronics-Related.com
You can but you're doing to get a wandering VCO with in a +/- 1 cycle for the correction. That is, if you are dealing with a 1:1 ratio lock. If the VCO was being scaled to produce a multiple of a stable frequency, then your wandering effects will be multiplied also, simply due to the fact that more cycles are going to be in error before error detector will notice 1 cycle +/- from the scaler. Yes, a phase detection is needed, even if you use a frequency count method to ensure this does not happen. Depending on the required design, will dictate the gain needed in the error detect circuit and phase shift offset needed incase exact phase alignment is needed. It would be like designing a good working PID loop. This brings back memories of yesteryears! Jamie