Forums

Unconnected part LTSpice seems to need (weird ...)

Started by Joerg August 14, 2011
On Fri, 19 Aug 2011 10:54:14 +0200, "Fred_Bartoli"
<fred.removethis.bartoli.canxxxelthis@free.andthisbittoo.fr> wrote:

> >"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> a &#2013265929;crit >dans le message de news:qj1r479gronv8mp8mkeevdglo3lfdngm2j@4ax.com... >> On Thu, 18 Aug 2011 14:37:45 -0700, Charlie E. <edmondson@ieee.org> wrote: >> >>>On Wed, 17 Aug 2011 19:59:44 -0400, Jim Thompson >>><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>> >>>>On Wed, 17 Aug 2011 16:44:36 -0700, Joerg <invalid@invalid.invalid> >>>>wrote: >>>> >>>>>John S wrote: >>>>>> On 8/17/2011 5:40 PM, Joerg wrote: >>>>>>> Fred_Bartoli wrote: >>>>>>>> >>>>>>>> "Joerg"<invalid@invalid.invalid> a &#2013265929;crit dans le message de >>>>>>>> news:9avccjFfkgU1@mid.individual.net... >>>>>>>>> Martin Brown wrote: >>>>>>>>>> On 14/08/2011 23:33, Joerg wrote: >>>>>>>>>>> Folks, >>>>>>>>>>> >>>>>>>>>>> This is close to voodoo but repeatable. Unfortunately I can't >>>>>>>>>>> disclose >>>>>>>>>>> the schematic since it is for a client. Just wondering , anyone >>>>>>>>>>> had >>>>>>>>>>> this >>>>>>>>>>> before? >>>>>>>>>>> >>>>>>>>>>> At the far end of a TX line I used to have a diode connected >>>>>>>>>>> across >>>>>>>>>>> because a previous version of a chip would have such a substrat >>>>>>>>>>> path. >>>>>>>>>>> Nice waveforms, fast sims. Everything as expected and peachy. Now >>>>>>>>>>> the >>>>>>>>>>> new iteration of the chip design won't have this diode path so I >>>>>>>>>>> chopped >>>>>>>>>>> off its cathode connection. Sims fine. So I deleted the diode -> >>>>>>>>>>> ka-crunch ... sim slows down and the ouput is junk. >>>>>>>>>>> >>>>>>>>>>> If I put the diode back in and connect only its anode -> fine. >>>>>>>>>>> If I >>>>>>>>>>> leave the anode open and only connect the cathode it still sims >>>>>>>>>>> but the >>>>>>>>>>> results are different. >>>>>>>>>>> >>>>>>>>>>> <scratching head> >>>>>>>>>> >>>>>>>>>> I am always amazed how well spice works these days. Best I can >>>>>>>>>> suggest >>>>>>>>>> is start deleting other nodes and components to try and get a >>>>>>>>>> minimum >>>>>>>>>> size network that shows the problem and can be disclosed publicly. >>>>>>>>>> >>>>>>>>> >>>>>>>>> I did that a couple of days ago, it's attached again. >>>>>>>>> >>>>>>>>> >>>>>>>>>> If you only connect the anode but to the wrong side of where the >>>>>>>>>> diode >>>>>>>>>> goes do you get the "anode connected" behaviour or the other one? >>>>>>>>>> >>>>>>>>> >>>>>>>>> Then the sim completely bombed on me. Like Fred said, it is >>>>>>>>> possible >>>>>>>>> that SPICE incudes this diode in the matrix and chokes on it. But >>>>>>>>> then >>>>>>>>> it's supposed to issue an error message and not just fly straight >>>>>>>>> into >>>>>>>>> terrain. >>>>>>>>> >>>>>>>> >>>>>>>> Looking a bit further (I don't use LTspice as my current production >>>>>>>> tool) it happens that: >>>>>>>> * a default 10^-12 gmin option is permanently set. No way to defeat >>>>>>>> it, >>>>>>>> apprat from, maybe, setting it to zero. >>>>>>>> * look at the log file. The unconnected node is detected. >>>>>>>> >>>>>>> >>>>>>> Thanks, this would explain a lot. That's what Jim suspected, he beat >>>>>>> you >>>>>>> by 14 minutes :-) >>>>>>> >>>>>>> Well, if it can't be turned off I guess I'll have to learn to live >>>>>>> with >>>>>>> that stuff. No complaints because LTSpice is free and generally >>>>>>> doesn't >>>>>>> crash. Other SPICEs cost an arm amnd a leg and crash a lot. >>>>>>> >>>>>> >>>>>> In LTSpice click Tools/Control Panel. >>>>>> Click the Spice tab. >>>>>> Change Gmin as you wish in the upper right box. >>>>>> >>>>> >>>>>Could be dicey. If I set it to zero other things my go kablouie because >>>>>it's then universal. >>>> >>>>The VALUE of gmin isn't the problem, it's that unconnected pins are being >>>>connected to ground (most likely) via gmin. I basically only use LTspice >>>>as a >>>>viwer and to run netlists, so I don't know the ins-and-outs of >>>>configuring >>>>pins. Make sure your symbols don't default to connecting thru gmin, >>>>rather >>>>than balking. >>>> >>>> ...Jim Thompson >>>> >>>> [On the Road, in New York] >>> >>>Lets get all the terms correct... >>> >>>It is connecting to ground via a resistance of 1/gmin, i.e. the >>>highest value resistor that it can model. >>> >>>Charlie >> >> Some of us _can_ think in terms of conductance ;-) >> > >Yup. >But to be more precise, gmin is an additional conductance set *across* every >junction, while the additional path to ground if set by rshunt (or gshunt in >LTspice).
That _may_ be true in LTspice, but in all Berkeley-compliant Spice's, every node has a resistor of value 1/gmin to GROUND. ...Jim Thompson [On the Road, in New York] -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
On Fri, 19 Aug 2011 02:24:32 -0700, josephkk <joseph_barrett@sbcglobal.net>
wrote:

>On Mon, 15 Aug 2011 09:44:56 -0700, Joerg <invalid@invalid.invalid> wrote: > >>nuny@bid.nes wrote: >>> On 8/15/2011 7:29 AM, Joerg wrote: >>>> nuny@bid.nes wrote: >>>>> On Aug 14, 3:33 pm, Joerg<inva...@invalid.invalid> wrote: >>>>>> Folks, >>>>>> >>>>>> This is close to voodoo but repeatable. Unfortunately I can't disclose >>>>>> the schematic since it is for a client. Just wondering , anyone had >>>>>> this >>>>>> before? >>>>>> >>>>>> At the far end of a TX line I used to have a diode connected across >>>>>> because a previous version of a chip would have such a substrat path. >>>>>> Nice waveforms, fast sims. Everything as expected and peachy. Now the >>>>>> new iteration of the chip design won't have this diode path so I >>>>>> chopped >>>>>> off its cathode connection. Sims fine. So I deleted the diode -> >>>>>> ka-crunch ... sim slows down and the ouput is junk. >>>>>> >>>>>> If I put the diode back in and connect only its anode -> fine. If I >>>>>> leave the anode open and only connect the cathode it still sims but the >>>>>> results are different. >>>>>> >>>>>> <scratching head> >>>>> >>>>> I really hate to ask this, but have you "simulated" your LTSpice >>>>> results in hardware yet? >>>> >>>> No, can't do that yet. It's an IC and that is not taped out yet. >>> >>> Dang. Do you have an example of the old setup handy on which you can >>> try your diode changes as above? >>> >> >>No, this IC will be totally new turf. Reason for my sims is the we now >>have to take care of the design of the connecting electronics while >>it'll be in production. That way it'll all come together at roughly the >>same time. >> >> >>>>> Also, what's the RF voltage level on the line? >>>> >>>> About 100V, and then from microvolts up to a volt during receive >>>> depending on signal strength coming in. >>> >>> I thought it might be high. Think; what happens with a real diode >>> connected as described above in such a field? >>> >> >>In the end we'll have to live with whatever the IC has, there is >>practically no space for any other parts to the right of the TX line. >> >> >>> Anyway, if it were me I'd stop fiddling with the diode and just use a >>> terminating resistor. >>> >>> Of course, once the chip was ready I'd try it with the diode, just to >>> see. ;>) >>> >> >>I might. But we can't place diodes because it's multi-channel and that >>would be lots of parts in a space that isn't there :-) >> >>It's no problem because the signals going up can be shaped accordingly. >>I was just wondering why LTSpice is producing inconsistent results here. >>It's ok if it runs into a dead end with some calcs but I'd have thought >>that would caused the usual error messages. Yet I get none of those. > >I can totally understand being uneasy committing to an IC design with a >sim that i could not trust. > >?-/
I don't know that I'd trust LTspice for an I/C design. Too many gimmicks built-in to speed up simulation. It is, after all, tailored to running commercial LTC products. ...Jim Thompson [On the Road, in New York] -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Charlie E. wrote:
> On Wed, 17 Aug 2011 11:02:07 -0700, Joerg <invalid@invalid.invalid> > wrote: > >> Interesting, I also grew up with good old ECA224 but that was when the >> 286 was the latest and greatest. It was quite a useful simulator. >> Someone told me it merged into EWB but when I tried that at a client I >> did not like it anymore. For my consulting office I bought MicroSim >> PSpice. It came with those nice cloth covered IBM-style binders. >> >> I find this sim behavior odd. It seems only naturaly that, in a >> "what-if" scenario, an engineer disconnects just one leg of a part. >> After all, that's how we also do it in real life. SPICE is not supposed >> to "partially smoosh that" and then not tell anyone. > > Hi Joerg, > Yes, it looks like you have hit another of those 'interesting > assumptions' that always come up and bite us on the posterior. > > Spice has to have everything connected Somewhere, and have a path to > ground from that connection. ...
Why? Why can't it just do the only correct thing and pretend a diode with one side disconnected is no longer part of the netlist? That's not hard to implement.
> ... In the real world, you can have things > that go nowhere, and there is no problem. Some spice progs will just > give you an error message and say "Where is this supposed to connect, > dummy?" while others, like you have run into, try to help out and > assume you have a floating node, and it should connect to ground > through a high value reisistance. I am afraid it is just a part of > learning the capabilities of the tools... 8-) >
Or the tools should learn to follow breadboarding strategies more closely :-) -- Regards, Joerg http://www.analogconsultants.com/
josephkk wrote:
> On Mon, 15 Aug 2011 09:44:56 -0700, Joerg <invalid@invalid.invalid> wrote: > >> nuny@bid.nes wrote: >>> On 8/15/2011 7:29 AM, Joerg wrote: >>>> nuny@bid.nes wrote: >>>>> On Aug 14, 3:33 pm, Joerg<inva...@invalid.invalid> wrote: >>>>>> Folks, >>>>>> >>>>>> This is close to voodoo but repeatable. Unfortunately I can't disclose >>>>>> the schematic since it is for a client. Just wondering , anyone had >>>>>> this >>>>>> before? >>>>>> >>>>>> At the far end of a TX line I used to have a diode connected across >>>>>> because a previous version of a chip would have such a substrat path. >>>>>> Nice waveforms, fast sims. Everything as expected and peachy. Now the >>>>>> new iteration of the chip design won't have this diode path so I >>>>>> chopped >>>>>> off its cathode connection. Sims fine. So I deleted the diode -> >>>>>> ka-crunch ... sim slows down and the ouput is junk. >>>>>> >>>>>> If I put the diode back in and connect only its anode -> fine. If I >>>>>> leave the anode open and only connect the cathode it still sims but the >>>>>> results are different. >>>>>> >>>>>> <scratching head> >>>>> I really hate to ask this, but have you "simulated" your LTSpice >>>>> results in hardware yet? >>>> No, can't do that yet. It's an IC and that is not taped out yet. >>> Dang. Do you have an example of the old setup handy on which you can >>> try your diode changes as above? >>> >> No, this IC will be totally new turf. Reason for my sims is the we now >> have to take care of the design of the connecting electronics while >> it'll be in production. That way it'll all come together at roughly the >> same time. >> >> >>>>> Also, what's the RF voltage level on the line? >>>> About 100V, and then from microvolts up to a volt during receive >>>> depending on signal strength coming in. >>> I thought it might be high. Think; what happens with a real diode >>> connected as described above in such a field? >>> >> In the end we'll have to live with whatever the IC has, there is >> practically no space for any other parts to the right of the TX line. >> >> >>> Anyway, if it were me I'd stop fiddling with the diode and just use a >>> terminating resistor. >>> >>> Of course, once the chip was ready I'd try it with the diode, just to >>> see. ;>) >>> >> I might. But we can't place diodes because it's multi-channel and that >> would be lots of parts in a space that isn't there :-) >> >> It's no problem because the signals going up can be shaped accordingly. >> I was just wondering why LTSpice is producing inconsistent results here. >> It's ok if it runs into a dead end with some calcs but I'd have thought >> that would caused the usual error messages. Yet I get none of those. > > I can totally understand being uneasy committing to an IC design with a > sim that i could not trust. >
I have a solution in situations like that: Weller WES51 :-) -- Regards, Joerg http://www.analogconsultants.com/
josephkk wrote:
> On Mon, 15 Aug 2011 07:29:01 -0700, Joerg <invalid@invalid.invalid> wrote: > >> nuny@bid.nes wrote: >>> On Aug 14, 3:33 pm, Joerg <inva...@invalid.invalid> wrote: >>>> Folks, >>>> >>>> This is close to voodoo but repeatable. Unfortunately I can't disclose >>>> the schematic since it is for a client. Just wondering , anyone had this >>>> before? >>>> >>>> At the far end of a TX line I used to have a diode connected across >>>> because a previous version of a chip would have such a substrat path. >>>> Nice waveforms, fast sims. Everything as expected and peachy. Now the >>>> new iteration of the chip design won't have this diode path so I chopped >>>> off its cathode connection. Sims fine. So I deleted the diode -> >>>> ka-crunch ... sim slows down and the ouput is junk. >>>> >>>> If I put the diode back in and connect only its anode -> fine. If I >>>> leave the anode open and only connect the cathode it still sims but the >>>> results are different. >>>> >>>> <scratching head> >>> I really hate to ask this, but have you "simulated" your LTSpice >>> results in hardware yet? >>> >> No, can't do that yet. It's an IC and that is not taped out yet. >> > Is someone of crazy here (very possibly me, i have not done an actual IC > design)? How can you dare try tapeout before having a believable > simulation? Can't you get adequate device models without tapeout? ...
The IC is completely simulated out on the big Mentor simulator, not LTSpice It's about the system interface, not the IC.
> ... Do > they even know which fab and process they are going to use?
Oh yes, they do and I do :-) When you do an IC of this complexity you tailor it to a specific process right from the beginning. [...] -- Regards, Joerg http://www.analogconsultants.com/
On 08/19/2011 10:59 AM, Joerg wrote:
> Charlie E. wrote: >> On Wed, 17 Aug 2011 11:02:07 -0700, Joerg<invalid@invalid.invalid> >> wrote: >> >>> Interesting, I also grew up with good old ECA224 but that was when the >>> 286 was the latest and greatest. It was quite a useful simulator. >>> Someone told me it merged into EWB but when I tried that at a client I >>> did not like it anymore. For my consulting office I bought MicroSim >>> PSpice. It came with those nice cloth covered IBM-style binders. >>> >>> I find this sim behavior odd. It seems only naturaly that, in a >>> "what-if" scenario, an engineer disconnects just one leg of a part. >>> After all, that's how we also do it in real life. SPICE is not supposed >>> to "partially smoosh that" and then not tell anyone. >> >> Hi Joerg, >> Yes, it looks like you have hit another of those 'interesting >> assumptions' that always come up and bite us on the posterior. >> >> Spice has to have everything connected Somewhere, and have a path to >> ground from that connection. ... > > > Why? Why can't it just do the only correct thing and pretend a diode > with one side disconnected is no longer part of the netlist? That's not > hard to implement. > > >> ... In the real world, you can have things >> that go nowhere, and there is no problem. Some spice progs will just >> give you an error message and say "Where is this supposed to connect, >> dummy?" while others, like you have run into, try to help out and >> assume you have a floating node, and it should connect to ground >> through a high value reisistance. I am afraid it is just a part of >> learning the capabilities of the tools... 8-) >> > > Or the tools should learn to follow breadboarding strategies more > closely :-) >
So all standoffs should be 22 meg? Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 845-480-2058 hobbs at electrooptical dot net http://electrooptical.net
Phil Hobbs wrote:
> On 08/19/2011 10:59 AM, Joerg wrote: >> Charlie E. wrote: >>> On Wed, 17 Aug 2011 11:02:07 -0700, Joerg<invalid@invalid.invalid> >>> wrote: >>> >>>> Interesting, I also grew up with good old ECA224 but that was when the >>>> 286 was the latest and greatest. It was quite a useful simulator. >>>> Someone told me it merged into EWB but when I tried that at a client I >>>> did not like it anymore. For my consulting office I bought MicroSim >>>> PSpice. It came with those nice cloth covered IBM-style binders. >>>> >>>> I find this sim behavior odd. It seems only naturaly that, in a >>>> "what-if" scenario, an engineer disconnects just one leg of a part. >>>> After all, that's how we also do it in real life. SPICE is not supposed >>>> to "partially smoosh that" and then not tell anyone. >>> >>> Hi Joerg, >>> Yes, it looks like you have hit another of those 'interesting >>> assumptions' that always come up and bite us on the posterior. >>> >>> Spice has to have everything connected Somewhere, and have a path to >>> ground from that connection. ... >> >> >> Why? Why can't it just do the only correct thing and pretend a diode >> with one side disconnected is no longer part of the netlist? That's not >> hard to implement. >> >> >>> ... In the real world, you can have things >>> that go nowhere, and there is no problem. Some spice progs will just >>> give you an error message and say "Where is this supposed to connect, >>> dummy?" while others, like you have run into, try to help out and >>> assume you have a floating node, and it should connect to ground >>> through a high value reisistance. I am afraid it is just a part of >>> learning the capabilities of the tools... 8-) >>> >> >> Or the tools should learn to follow breadboarding strategies more >> closely :-) >> > > So all standoffs should be 22 meg? >
No, no, this implies the kludgy kind of experimenting. No standoffs. Wire cutters ... snip ... pinggggg ... oh, looks bad, we need this, got to solder it back on ... bend it down ... apply liberal gob of solder. -- Regards, Joerg http://www.analogconsultants.com/
On 08/19/2011 12:41 PM, Joerg wrote:
> Phil Hobbs wrote: >> On 08/19/2011 10:59 AM, Joerg wrote: >>> Charlie E. wrote: >>>> On Wed, 17 Aug 2011 11:02:07 -0700, Joerg<invalid@invalid.invalid> >>>> wrote: >>>> >>>>> Interesting, I also grew up with good old ECA224 but that was when the >>>>> 286 was the latest and greatest. It was quite a useful simulator. >>>>> Someone told me it merged into EWB but when I tried that at a client I >>>>> did not like it anymore. For my consulting office I bought MicroSim >>>>> PSpice. It came with those nice cloth covered IBM-style binders. >>>>> >>>>> I find this sim behavior odd. It seems only naturaly that, in a >>>>> "what-if" scenario, an engineer disconnects just one leg of a part. >>>>> After all, that's how we also do it in real life. SPICE is not supposed >>>>> to "partially smoosh that" and then not tell anyone. >>>> >>>> Hi Joerg, >>>> Yes, it looks like you have hit another of those 'interesting >>>> assumptions' that always come up and bite us on the posterior. >>>> >>>> Spice has to have everything connected Somewhere, and have a path to >>>> ground from that connection. ... >>> >>> >>> Why? Why can't it just do the only correct thing and pretend a diode >>> with one side disconnected is no longer part of the netlist? That's not >>> hard to implement. >>> >>> >>>> ... In the real world, you can have things >>>> that go nowhere, and there is no problem. Some spice progs will just >>>> give you an error message and say "Where is this supposed to connect, >>>> dummy?" while others, like you have run into, try to help out and >>>> assume you have a floating node, and it should connect to ground >>>> through a high value reisistance. I am afraid it is just a part of >>>> learning the capabilities of the tools... 8-) >>>> >>> >>> Or the tools should learn to follow breadboarding strategies more >>> closely :-) >>> >> >> So all standoffs should be 22 meg? >> > > No, no, this implies the kludgy kind of experimenting. No standoffs. > Wire cutters ... snip ... pinggggg ... oh, looks bad, we need this, got > to solder it back on ... bend it down ... apply liberal gob of solder. >
Dead bug Muntzing! Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 845-480-2058 hobbs at electrooptical dot net http://electrooptical.net
On Fri, 19 Aug 2011 14:01:07 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

>On 08/19/2011 12:41 PM, Joerg wrote: >> Phil Hobbs wrote: >>> On 08/19/2011 10:59 AM, Joerg wrote: >>>> Charlie E. wrote: >>>>> On Wed, 17 Aug 2011 11:02:07 -0700, Joerg<invalid@invalid.invalid> >>>>> wrote: >>>>> >>>>>> Interesting, I also grew up with good old ECA224 but that was when the >>>>>> 286 was the latest and greatest. It was quite a useful simulator. >>>>>> Someone told me it merged into EWB but when I tried that at a client I >>>>>> did not like it anymore. For my consulting office I bought MicroSim >>>>>> PSpice. It came with those nice cloth covered IBM-style binders. >>>>>> >>>>>> I find this sim behavior odd. It seems only naturaly that, in a >>>>>> "what-if" scenario, an engineer disconnects just one leg of a part. >>>>>> After all, that's how we also do it in real life. SPICE is not supposed >>>>>> to "partially smoosh that" and then not tell anyone. >>>>> >>>>> Hi Joerg, >>>>> Yes, it looks like you have hit another of those 'interesting >>>>> assumptions' that always come up and bite us on the posterior. >>>>> >>>>> Spice has to have everything connected Somewhere, and have a path to >>>>> ground from that connection. ... >>>> >>>> >>>> Why? Why can't it just do the only correct thing and pretend a diode >>>> with one side disconnected is no longer part of the netlist? That's not >>>> hard to implement. >>>> >>>> >>>>> ... In the real world, you can have things >>>>> that go nowhere, and there is no problem. Some spice progs will just >>>>> give you an error message and say "Where is this supposed to connect, >>>>> dummy?" while others, like you have run into, try to help out and >>>>> assume you have a floating node, and it should connect to ground >>>>> through a high value reisistance. I am afraid it is just a part of >>>>> learning the capabilities of the tools... 8-) >>>>> >>>> >>>> Or the tools should learn to follow breadboarding strategies more >>>> closely :-) >>>> >>> >>> So all standoffs should be 22 meg? >>> >> >> No, no, this implies the kludgy kind of experimenting. No standoffs. >> Wire cutters ... snip ... pinggggg ... oh, looks bad, we need this, got >> to solder it back on ... bend it down ... apply liberal gob of solder. >> > >Dead bug Muntzing!
Or as Antoine de Saint Exup&#2013265929;ry might say, "Il semble que la perfection soit atteinte non quand il n'y a plus rien &#2013265920; ajouter, mais quand il n'y a plus rien &#2013265920; retrancher". (perfection is attained not when there is no longer anything to add, but when there is no longer anything to take away )
> >Cheers > >Phil Hobbs
On Aug 19, 2:20=A0am, josephkk <joseph_barr...@sbcglobal.net> wrote:
> On Mon, 15 Aug 2011 07:29:01 -0700, Joerg <inva...@invalid.invalid> wrote=
:
> >n...@bid.nes wrote: > >> On Aug 14, 3:33 pm, Joerg <inva...@invalid.invalid> wrote: > >>> Folks, > > >>> This is close to voodoo but repeatable. Unfortunately I can't disclos=
e
> >>> the schematic since it is for a client. Just wondering , anyone had t=
his
> >>> before? > > >>> At the far end of a TX line I used to have a diode connected across > >>> because a previous version of a chip would have such a substrat path. > >>> Nice waveforms, fast sims. Everything as expected and peachy. Now the > >>> new iteration of the chip design won't have this diode path so I chop=
ped
> >>> off its cathode connection. Sims fine. So I deleted the diode -> > >>> ka-crunch ... sim slows down and the ouput is junk. > > >>> If I put the diode back in and connect only its anode -> fine. If I > >>> leave the anode open and only connect the cathode it still sims but t=
he
> >>> results are different. > > >>> <scratching head> > > >> =A0 I really hate to ask this, but have you "simulated" your LTSpice > >> results in hardware yet? > > >No, can't do that yet. It's an IC and that is not taped out yet. > > Is someone of crazy here (very possibly me, i have not done an actual IC > design)? =A0How can you dare try tapeout before having a believable > simulation? =A0Can't you get adequate device models without tapeout? =A0D=
o
> they even know which fab and process they are going to use?
My point was that when a mathematical model blows up (gives unphysical results or just crashes), it indicates the model does not accurately "model" reality and a "reality check" is in order.
> >> =A0 Also, what's the RF voltage level on the line? > > >About 100V, and then from microvolts up to a volt during receive > >depending on signal strength coming in.
I was wondering here about whether LTSpice can accurately model a diode acting as an antenna the way they actually do. Mark L. Fergerson