I'm trying to add the models of a couple of N-FETs I use to LTSpice. I'm getting a simulation-time error that I can't resolve. Any ideas? Thanks. The error: |M1: Only a level 9 B3SOI can have 6 nodes It thinks I have six terminals on my transistor and only SOI models have that many? Looks like only three to me. The circuit: Version 4 SHEET 1 880 680 WIRE 144 -80 16 -80 WIRE 288 -80 144 -80 WIRE 16 -32 16 -80 WIRE 144 0 144 -80 WIRE 288 16 288 -80 WIRE 16 80 16 48 WIRE 288 112 288 80 WIRE 144 192 144 80 WIRE 240 192 144 192 WIRE 144 240 144 192 WIRE 288 288 288 208 WIRE 288 288 208 288 WIRE 288 320 288 288 WIRE 144 448 144 336 WIRE 224 448 144 448 WIRE 288 448 288 400 WIRE 288 448 224 448 WIRE 224 496 224 448 FLAG 224 496 0 FLAG 16 80 0 SYMBOL LED 272 16 R0 SYMATTR InstName D1 SYMBOL npn 208 240 M0 SYMATTR InstName Q1 SYMBOL res 272 304 R0 WINDOW 0 -7 51 Left 0 SYMATTR InstName R1 SYMATTR Value 100 SYMATTR SpiceLine tol=1 pwr=0.1 SYMBOL res 128 -16 R0 SYMATTR InstName R2 SYMATTR Value 10K SYMATTR SpiceLine tol=1 pwr=0.1 SYMBOL voltage 16 -48 R0 SYMATTR InstName V1 SYMBOL DiodesInc\ Models\\DMG1012T 240 112 R0 SYMATTR InstName M1 TEXT -18 520 Left 0 !.op The model: *SYM=POWMOSN .SUBCKT DMG1012T D=10 G=20 S=30 * TERMINALS: D G S M1 1 20 3 3 NMOS L=0.6U W=47.66m RD 10 1 220m RS 30 3 80m CGS 20 3 57p EGD 12 0 20 1 1 VFB 14 0 0 FFB 20 1 VFB 1 CGD 13 14 27p R1 13 0 1.00 D1 12 13 DLIM DDG 15 14 DCGD R2 12 15 1.00 D2 15 0 DLIM DSD 3 10 DSUB .MODEL NMOS NMOS LEVEL=3 U0=500 VMAX=80k + ETA=0.1m VTO=0.99 TOX=16.8n NSUB=4.57e16 .MODEL DCGD D CJO=27p VJ=80m M=0.320 .MODEL DSUB D IS=36.1n N=1.50 RS=21.8m BV=20 + CJO=14p VJ=0.800 M=0.420 .MODEL DLIM D IS=100U .ENDS Another model with the same problem: .SUBCKT irlml6402 1 2 3 ************************************** * Model Generated by MODPEX * *Copyright(c) Symmetry Design Systems* * All Rights Reserved * * UNPUBLISHED LICENSED SOFTWARE * * Contains Proprietary Information * * Which is The Property of * * SYMMETRY OR ITS LICENSORS * *Commercial Use or Resale Restricted * * by Symmetry License Agreement * ************************************** * Model generated on Sep 25, 06 * MODEL FORMAT: SPICE3 * Symmetry POWER MOS Model (Version 1.0) * External Node Designations * Node 1 -> Drain * Node 2 -> Gate * Node 3 -> Source M1 9 7 8 8 MM L=100u W=100u .MODEL MM PMOS LEVEL=1 IS=1e-32 +VTO=-1 LAMBDA=0.0111358 KP=12.788 +CGSO=5.36099e-06 CGDO=5.54234e-08 RS 8 3 0.0246704 D1 1 3 MD .MODEL MD D IS=2.03395e-08 RS=0.0432758 N=1.5 BV=20 +IBV=0.00025 EG=1 XTI=4 TT=1e-07 +CJO=1.11974e-10 VJ=0.5 M=0.3 FC=0.5 RDS 3 1 5e+07 RD 9 1 0.0001 RG 2 7 29.2227 D2 5 4 MD1 * Default values used in MD1: * RS=0 EG=1.11 XTI=3.0 TT=0 * BV=infinite IBV=1mA .MODEL MD1 D IS=1e-32 N=50 +CJO=1.68841e-10 VJ=1.50027 M=0.3 FC=1e-08 D3 5 0 MD2 * Default values used in MD2: * EG=1.11 XTI=3.0 TT=0 CJO=0 * BV=infinite IBV=1mA .MODEL MD2 D IS=1e-10 N=0.4 RS=3e-06 RL 5 10 1 FI2 7 9 VFI2 -1 VFI2 4 0 0 EV16 10 0 9 7 1 CAP 11 10 9.68769e-10 FI1 7 9 VFI1 -1 VFI1 11 6 0 RCAP 6 10 1 D4 6 0 MD3 * Default values used in MD3: * EG=1.11 XTI=3.0 TT=0 CJO=0 * RS=0 BV=infinite IBV=1mA .MODEL MD3 D IS=1e-10 N=0.4 .ENDS irlml6402
LT Spice problem
Started by ●June 1, 2011
Reply by ●June 1, 20112011-06-01
krw@att.bizzzzzzzzzzzz wrote:> I'm trying to add the models of a couple of N-FETs I use to LTSpice. I'm > getting a simulation-time error that I can't resolve. Any ideas? Thanks. > > The error: > > |M1: Only a level 9 B3SOI can have 6 nodes > > It thinks I have six terminals on my transistor and only SOI models have that > many? Looks like only three to me. >I don't have your symbol so can't run the subcircuit. But when I use just your NMOS model it runs. You have to give V1 a voltage and the LED still needs a model as well. [...] -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
Reply by ●June 2, 20112011-06-02
Joerg wrote:> krw@att.bizzzzzzzzzzzz wrote: >> I'm trying to add the models of a couple of N-FETs I use to LTSpice. I'm >> getting a simulation-time error that I can't resolve. Any ideas? Thanks. >> >> The error: >> >> |M1: Only a level 9 B3SOI can have 6 nodes >> >> It thinks I have six terminals on my transistor and only SOI models have that >> many? Looks like only three to me. >> > > I don't have your symbol so can't run the subcircuit. But when I use > just your NMOS model it runs. You have to give V1 a voltage and the LED > still needs a model as well. > > [...] >Model...you mean the one with the long skirt and fancy hat?
Reply by ●June 2, 20112011-06-02
Robert Baer wrote:> Joerg wrote: >> krw@att.bizzzzzzzzzzzz wrote: >>> I'm trying to add the models of a couple of N-FETs I use to LTSpice. >>> I'm >>> getting a simulation-time error that I can't resolve. Any ideas? >>> Thanks. >>> >>> The error: >>> |M1: Only a level 9 B3SOI can have 6 nodes >>> >>> It thinks I have six terminals on my transistor and only SOI models >>> have that >>> many? Looks like only three to me. >>> >> >> I don't have your symbol so can't run the subcircuit. But when I use >> just your NMOS model it runs. You have to give V1 a voltage and the LED >> still needs a model as well. >> >> [...] >> > Model...you mean the one with the long skirt and fancy hat?No, no, the one with the bikini :-) -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
Reply by ●June 2, 20112011-06-02
<krw@att.bizzzzzzzzzzzz> schrieb im Newsbeitrag news:m1hdu6pu6n0vg2cn2vjhtcejv8eit6tl2m@4ax.com...> > I'm trying to add the models of a couple of N-FETs I use to LTSpice. I'm > getting a simulation-time error that I can't resolve. Any ideas? Thanks. > > The error: > > |M1: Only a level 9 B3SOI can have 6 nodes > > It thinks I have six terminals on my transistor and only SOI models have > that > many? Looks like only three to me.Hello krw, I don't have your Mosfet-symbol, but I have been able to get it working. 1. The subcircuit definition was wrong. Below is the corrected line. * D=10 G=20 S=30 .SUBCKT DMG1012T 10 20 30 2. Most of th models for power-Mosfets are subcircuits. Therefore you can use the normal symbol "nmos" or "pmos" with a very small modification. Place a symbol "nmos" on the schematic. Ctrl-right-mouse-click on the placed symbol. A dialog will pop-up. Change Prefix:MN to Prefix:X OK. The attached example has bias point data flags on the nets to better show the operating point. Best regards, Helmut> > > The circuit: > > Version 4 > SHEET 1 880 680 > WIRE 144 -80 16 -80 > WIRE 288 -80 144 -80 > WIRE 16 -32 16 -80 > WIRE 144 0 144 -80 > WIRE 288 16 288 -80 > WIRE 16 80 16 48 > WIRE 288 112 288 80 > WIRE 144 192 144 80 > WIRE 240 192 144 192 > WIRE 144 240 144 192 > WIRE 288 288 288 208 > WIRE 288 288 208 288 > WIRE 288 320 288 288 > WIRE 144 448 144 336 > WIRE 224 448 144 448 > WIRE 288 448 288 400 > WIRE 288 448 224 448 > WIRE 224 496 224 448 > FLAG 224 496 0 > FLAG 16 80 0 > SYMBOL LED 272 16 R0 > SYMATTR InstName D1 > SYMBOL npn 208 240 M0 > SYMATTR InstName Q1 > SYMBOL res 272 304 R0 > WINDOW 0 -7 51 Left 0 > SYMATTR InstName R1 > SYMATTR Value 100 > SYMATTR SpiceLine tol=1 pwr=0.1 > SYMBOL res 128 -16 R0 > SYMATTR InstName R2 > SYMATTR Value 10K > SYMATTR SpiceLine tol=1 pwr=0.1 > SYMBOL voltage 16 -48 R0 > SYMATTR InstName V1 > SYMBOL DiodesInc\ Models\\DMG1012T 240 112 R0 > SYMATTR InstName M1 > TEXT -18 520 Left 0 !.op > > > The model: > > *SYM=POWMOSN > .SUBCKT DMG1012T D=10 G=20 S=30 > * TERMINALS: D G S > M1 1 20 3 3 NMOS L=0.6U W=47.66m > RD 10 1 220m > RS 30 3 80m > CGS 20 3 57p > EGD 12 0 20 1 1 > VFB 14 0 0 > FFB 20 1 VFB 1 > CGD 13 14 27p > R1 13 0 1.00 > D1 12 13 DLIM > DDG 15 14 DCGD > R2 12 15 1.00 > D2 15 0 DLIM > DSD 3 10 DSUB > .MODEL NMOS NMOS LEVEL=3 U0=500 VMAX=80k > + ETA=0.1m VTO=0.99 TOX=16.8n NSUB=4.57e16 > .MODEL DCGD D CJO=27p VJ=80m M=0.320 > .MODEL DSUB D IS=36.1n N=1.50 RS=21.8m BV=20 > + CJO=14p VJ=0.800 M=0.420 > .MODEL DLIM D IS=100U > .ENDS > > Another model with the same problem: > > .SUBCKT irlml6402 1 2 3 > ************************************** > * Model Generated by MODPEX * > *Copyright(c) Symmetry Design Systems* > * All Rights Reserved * > * UNPUBLISHED LICENSED SOFTWARE * > * Contains Proprietary Information * > * Which is The Property of * > * SYMMETRY OR ITS LICENSORS * > *Commercial Use or Resale Restricted * > * by Symmetry License Agreement * > ************************************** > * Model generated on Sep 25, 06 > * MODEL FORMAT: SPICE3 > * Symmetry POWER MOS Model (Version 1.0) > * External Node Designations > * Node 1 -> Drain > * Node 2 -> Gate > * Node 3 -> Source > M1 9 7 8 8 MM L=100u W=100u > .MODEL MM PMOS LEVEL=1 IS=1e-32 > +VTO=-1 LAMBDA=0.0111358 KP=12.788 > +CGSO=5.36099e-06 CGDO=5.54234e-08 > RS 8 3 0.0246704 > D1 1 3 MD > .MODEL MD D IS=2.03395e-08 RS=0.0432758 N=1.5 BV=20 > +IBV=0.00025 EG=1 XTI=4 TT=1e-07 > +CJO=1.11974e-10 VJ=0.5 M=0.3 FC=0.5 > RDS 3 1 5e+07 > RD 9 1 0.0001 > RG 2 7 29.2227 > D2 5 4 MD1 > * Default values used in MD1: > * RS=0 EG=1.11 XTI=3.0 TT=0 > * BV=infinite IBV=1mA > .MODEL MD1 D IS=1e-32 N=50 > +CJO=1.68841e-10 VJ=1.50027 M=0.3 FC=1e-08 > D3 5 0 MD2 > * Default values used in MD2: > * EG=1.11 XTI=3.0 TT=0 CJO=0 > * BV=infinite IBV=1mA > .MODEL MD2 D IS=1e-10 N=0.4 RS=3e-06 > RL 5 10 1 > FI2 7 9 VFI2 -1 > VFI2 4 0 0 > EV16 10 0 9 7 1 > CAP 11 10 9.68769e-10 > FI1 7 9 VFI1 -1 > VFI1 11 6 0 > RCAP 6 10 1 > D4 6 0 MD3 > * Default values used in MD3: > * EG=1.11 XTI=3.0 TT=0 CJO=0 > * RS=0 BV=infinite IBV=1mA > .MODEL MD3 D IS=1e-10 N=0.4 > .ENDS irlml6402begin 666 DMG1012T.lib M*E-933U03U=-3U-.#0HJ($0],3 @1STR,"!3/3,P#0HN4U5"0TM4($1-1S$P M,3)4(" @,3 @,C @,S -"BH@(" @(%1%4DU)3D%,4SH@($0@($<@(%,-"DTQ M(" @,2 @,C @(#,@(#,@($Y-3U,@3#TP+C95(%<]-#<N-C9M#0I21" @,3 @ M(#$@(#(R,&T-"E)3(" S," @,R @.#!M#0I#1U,@(#(P(" S(" U-W -"D5' M1" Q,B @," @,C @(#$@(#$-"E9&0B Q-" @," @, T*1D9"(" R," @,2 @ M5D9"(" Q#0I#1T0@,3,@,30@(#(W< T*4C$@(#$S(" P(" Q+C P#0I$,2 @ M,3(@,3,@($1,24T-"D1$1R Q-2 Q-" @1$-'1 T*4C(@(#$R(#$U(" Q+C P M#0I$,B @,34@(# @($1,24T-"D131" @,R Q," @1%-50@T*+DU/1$5,($Y- M3U,@3DU/4R!,159%3#TS(%4P/34P,"!634%8/3@P:PT**R!%5$$],"XQ;2!6 M5$\],"XY.2!43U@],38N.&X@3E-50CTT+C4W93$V#0HN34]$14P@1$-'1"!$ M($-*3STR-W @5DH].#!M($T],"XS,C -"BY-3T1%3"!$4U5"($0@25,],S8N M,6X@3CTQ+C4P(%)3/3(Q+CAM($)6/3(P#0HK($-*3STQ-' @5DH],"XX,# @ H33TP+C0R, T*+DU/1$5,($1,24T@1"!)4STQ,#!5#0HN14Y$4PT*( `` ` end begin 666 mosfet_test.asc M5F5R<VEO;B T#0I32$5%5" Q(#@X," V.# -"E=)4D4@,30T("TX," Q-B M M.# -"E=)4D4@,C(T("TX," Q-#0@+3@P#0I725)%(#(X." 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M,38@4C -"E-934%45%(@26YS=$YA;64@4C(-"E-934%45%(@ M5F%L=64@,3!+#0I364U!5%12(%-P:6-E3&EN92!T;VP],2!P=W(],"XQ#0I3 M64U"3TP@=F]L=&%G92 Q-B M-#@@4C -"E-934%45%(@26YS=$YA;64@5C$- M"E-934%45%(@5F%L=64@.0T*4UE-0D],(&YM;W,@,C0P(#$Q,B!2, T*4UE- M05144B!);G-T3F%M92!-,@T*4UE-05144B!686QU92!$34<Q,#$R5 T*4UE- M05144B!0<F5F:7@@6 T*5$585" Q-B M,3(P($QE9G0@," A+F]P#0I415A4 D(#$V("TQ-3(@3&5F=" P("$N;&EB($1-1S$P,3)4+FQI8@T* ` end
Reply by ●June 2, 20112011-06-02
On Thu, 02 Jun 2011 06:32:55 -0700, Joerg <invalid@invalid.invalid> wrote:>Robert Baer wrote: >> Joerg wrote: >>> krw@att.bizzzzzzzzzzzz wrote: >>>> I'm trying to add the models of a couple of N-FETs I use to LTSpice. >>>> I'm >>>> getting a simulation-time error that I can't resolve. Any ideas? >>>> Thanks. >>>> >>>> The error: >>>> |M1: Only a level 9 B3SOI can have 6 nodes >>>> >>>> It thinks I have six terminals on my transistor and only SOI models >>>> have that >>>> many? Looks like only three to me. >>>> >>> >>> I don't have your symbol so can't run the subcircuit. But when I use >>> just your NMOS model it runs. You have to give V1 a voltage and the LED >>> still needs a model as well. >>> >>> [...] >>> >> Model...you mean the one with the long skirt and fancy hat? > > >No, no, the one with the bikini :-)...and a long-tailed pair?
Reply by ●June 2, 20112011-06-02
On Wed, 01 Jun 2011 18:27:04 -0700, Joerg <invalid@invalid.invalid> wrote:>krw@att.bizzzzzzzzzzzz wrote: >> I'm trying to add the models of a couple of N-FETs I use to LTSpice. I'm >> getting a simulation-time error that I can't resolve. Any ideas? Thanks. >> >> The error: >> >> |M1: Only a level 9 B3SOI can have 6 nodes >> >> It thinks I have six terminals on my transistor and only SOI models have that >> many? Looks like only three to me. >> > >I don't have your symbol so can't run the subcircuit. But when I use >just your NMOS model it runs. You have to give V1 a voltage and the LED >still needs a model as well.It seemed to do something here at home. I didn't have time to look at it today. Maybe tomorrow they'll leave me alone so I can get back after it.
Reply by ●June 2, 20112011-06-02
krw@att.bizzzzzzzzzzzz wrote:> On Wed, 01 Jun 2011 18:27:04 -0700, Joerg <invalid@invalid.invalid> wrote: > >> krw@att.bizzzzzzzzzzzz wrote: >>> I'm trying to add the models of a couple of N-FETs I use to LTSpice. I'm >>> getting a simulation-time error that I can't resolve. Any ideas? Thanks. >>> >>> The error: >>> >>> |M1: Only a level 9 B3SOI can have 6 nodes >>> >>> It thinks I have six terminals on my transistor and only SOI models have that >>> many? Looks like only three to me. >>> >> I don't have your symbol so can't run the subcircuit. But when I use >> just your NMOS model it runs. You have to give V1 a voltage and the LED >> still needs a model as well. > > It seemed to do something here at home. I didn't have time to look at it > today. Maybe tomorrow they'll leave me alone so I can get back after it. >Just use the model alone. Package parasitics don't matter unless the LED has to also send out GHz pulses ;-) You can enter a ramp for the voltage source, then you can always see where it loses steam. -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
Reply by ●June 2, 20112011-06-02
On Thu, 2 Jun 2011 22:20:30 +0200, "Helmut Sennewald" <helmutsennewald@t-online.de> wrote:><krw@att.bizzzzzzzzzzzz> schrieb im Newsbeitrag >news:m1hdu6pu6n0vg2cn2vjhtcejv8eit6tl2m@4ax.com... >> >> I'm trying to add the models of a couple of N-FETs I use to LTSpice. I'm >> getting a simulation-time error that I can't resolve. Any ideas? Thanks. >> >> The error: >> >> |M1: Only a level 9 B3SOI can have 6 nodes >> >> It thinks I have six terminals on my transistor and only SOI models have >> that >> many? Looks like only three to me. > > >Hello krw, > >I don't have your Mosfet-symbol, but I have been able to get it working. > >1. The subcircuit definition was wrong. Below is the corrected line. > >* D=10 G=20 S=30 >.SUBCKT DMG1012T 10 20 30 > >2. Most of th models for power-Mosfets are subcircuits. >Therefore you can use the normal symbol "nmos" or "pmos" with a very small >modification. > >Place a symbol "nmos" on the schematic. >Ctrl-right-mouse-click on the placed symbol. >A dialog will pop-up. Change Prefix:MN to Prefix:X >OK. > >The attached example has bias point data flags on the nets >to better show the operating point.Thanks, Helmut. I still have something messed up. It can't find the model. I should have time to work on it tomorrow.
Reply by ●June 2, 20112011-06-02
On Thu, 02 Jun 2011 16:56:31 -0700, Joerg <invalid@invalid.invalid> wrote:>krw@att.bizzzzzzzzzzzz wrote: >> On Wed, 01 Jun 2011 18:27:04 -0700, Joerg <invalid@invalid.invalid> wrote: >> >>> krw@att.bizzzzzzzzzzzz wrote: >>>> I'm trying to add the models of a couple of N-FETs I use to LTSpice. I'm >>>> getting a simulation-time error that I can't resolve. Any ideas? Thanks. >>>> >>>> The error: >>>> >>>> |M1: Only a level 9 B3SOI can have 6 nodes >>>> >>>> It thinks I have six terminals on my transistor and only SOI models have that >>>> many? Looks like only three to me. >>>> >>> I don't have your symbol so can't run the subcircuit.Check out my website for simple ways to include a subcircuit of a part for which you have no symbol.>>> But when I use >>> just your NMOS model it runs. You have to give V1 a voltage and the LED >>> still needs a model as well. >> >> It seemed to do something here at home. I didn't have time to look at it >> today. Maybe tomorrow they'll leave me alone so I can get back after it. >> > >Just use the model alone. Package parasitics don't matter unless the LED >has to also send out GHz pulses ;-) > >You can enter a ramp for the voltage source, then you can always see >where it loses steam....Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
