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Calculating BW for DAC based PGA??

Started by anotherstevest November 17, 2010
Greetings,

Of late I have been investigating a circuit (on paper) that includes a
programmable gain stage (with an MDAC in an op-amp feedback loop in
the somewhat common manner, in this case it's an LTC8043 DAC and
OPA4277 op-amp).  I intuitive suspect that using the DAC in the
feedback loop at high gain settings is going to reduce the BW more
than what the gain-bandwidth product would suggest (parasitic
capacitance across the Vref to Iout pins?) but for the life of me, I
can't justify my intuition with any real analysis and I can't find any
helpful bits in the datasheets that seem relevant.

What am I missing?

Steve

On Wed, 17 Nov 2010 18:38:57 -0800 (PST), anotherstevest
<steve@tomasara.com> wrote:

>Greetings, > >Of late I have been investigating a circuit (on paper) that includes a >programmable gain stage (with an MDAC in an op-amp feedback loop in >the somewhat common manner, in this case it's an LTC8043 DAC and >OPA4277 op-amp). I intuitive suspect that using the DAC in the >feedback loop at high gain settings is going to reduce the BW more >than what the gain-bandwidth product would suggest (parasitic >capacitance across the Vref to Iout pins?) but for the life of me, I >can't justify my intuition with any real analysis and I can't find any >helpful bits in the datasheets that seem relevant. > >What am I missing? > >Steve
Right, most mdacs are fairly slow from the reference to the output. Unless you can get a really good Spice model, you should just breadboard it. Opamp loop stability could go either way. Note the variation of Cout as a function of code; expect variations in feedthrough versus code, too. Also, don't expect accuracy to be very good at high gains, namely DAC codes of just an LSB or two. TC can be terrible down there, too. Oh, don't use the dac as a simple feedback resistor. You have to include its internal Rfb in the gain equation if you want good accuracy. That probably implies two opamps and a tricky loop. John
Adding poles to the feedback loop is bad.  For fast amps, even more than a 
few pF on the -in node can cause instability.  This is worsened by your 
adjustable gain, which probably means the pole will shift all over the 
place, too.  That's hard to compensate.

I don't have a clue what kind of transfer function a DAC has, or how it 
varies with setting.  Maybe there's capacitance from Vref to out as you 
suggest, but there's inevitably capacitance to GND and +V as well.  Does 
it have a buffer on Vref?  That'll cause delay as well (even more 
poles..).

Tim

-- 
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

"anotherstevest" <steve@tomasara.com> wrote in message 
news:27f015cb-57ec-4e2e-9897-9ebd7ee1bfd9@t13g2000yqm.googlegroups.com...
> Greetings, > > Of late I have been investigating a circuit (on paper) that includes a > programmable gain stage (with an MDAC in an op-amp feedback loop in > the somewhat common manner, in this case it's an LTC8043 DAC and > OPA4277 op-amp). I intuitive suspect that using the DAC in the > feedback loop at high gain settings is going to reduce the BW more > than what the gain-bandwidth product would suggest (parasitic > capacitance across the Vref to Iout pins?) but for the life of me, I > can't justify my intuition with any real analysis and I can't find any > helpful bits in the datasheets that seem relevant. > > What am I missing? > > Steve >
On Nov 17, 6:38=A0pm, anotherstevest <st...@tomasara.com> wrote:
> Greetings, > > Of late I have been investigating a circuit (on paper) that includes a > programmable gain stage (with an MDAC in an op-amp feedback loop in > the somewhat common manner, in this case it's an LTC8043 DAC and > OPA4277 op-amp). =A0I intuitive suspect that... I can't find any > helpful bits in the datasheets that seem relevant.
The 'output capacitance' is specified to different limits, depending on the input code (all zeros and all ones gives different values). A lot of that channel capacitance is resistor-coupled to your Vref input pin. So your feedback has R-C-R type impedance that is somewhat numeric-input-value dependent.
I appreciate the info.

The configuration uses the MDAC to provide both the input and feedback
paths of a traditional inverting amp configuration.  The path in the
MDAC through Rfb acts as the input resistor and the path through the
R2R ladder to current source acts at the feedback resistor.  So for
counts of 1 - 4095 the idealized gain ranges from 4096 - ~1
respectively.

This is a retrospective analysis so the hardware exists but it's not
readily available to actually make measurements on it (yet...).  In
the mean time, I think I'll see if I can get some spice models from
the MDAC and op-amp vendors.

It bugs me that I can't figure out (using the datasheets) any analysis
to either support or refute my intuition...  In particular, what bugs
me is that I intuitively think that the effective bandwidth of this
PGA configuration will be less (when at high gains) than the Vref to
Iout bandwidth when the part is used as a traditional DAC (and at the
same settings) but I can't come up with one wit of support for my
intuition (so maybe it's totally wrong...).

Steve.



On Nov 19, 9:07=A0am, anotherstevest <st...@tomasara.com> wrote:

>.... =A0In particular, what bugs > me is that I intuitively think that the effective bandwidth of this > PGA configuration will be less (when at high gains)
Oh, it'll be less, all right; look at the recommended designs, there are feedback capacitors there. That's because your 'multiplying' DAC is actually multiplying by a value less than 1, so additional feedback capacitance is required; the negative feedback is too small for stability, otherwise.