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Unexpected PIC32 behavior

Started by Randy Day April 10, 2014
In article <40hgk99ivaph6tltbtaik74nn3lhoco0rq@4ax.com>, 
speffSNIP@interlogDOTyou.knowwhat says...

[snip]

> You have not given the whole part number, and I'm not going to plod > through more than one errata, but this might be relevant:-
PIC3mx150f128b.
> http://www.microchip.com/forums/tm.aspx?m=697846 > > Voh of 1V sure sounds like some kind of internal contention.
Interesting. I am trying to make RA0 my ss pin. I'll have to check out various settings when I've recovered from the soccer team's year-end windup! ;) Thanks!
On Fri, 11 Apr 2014 23:29:33 -0600, the renowned Randy Day
<randy.day@sasktel.netx> wrote:

>In article <40hgk99ivaph6tltbtaik74nn3lhoco0rq@4ax.com>, >speffSNIP@interlogDOTyou.knowwhat says... > >[snip] > >> You have not given the whole part number, and I'm not going to plod >> through more than one errata, but this might be relevant:- > >PIC3mx150f128b. > >> http://www.microchip.com/forums/tm.aspx?m=697846 >> >> Voh of 1V sure sounds like some kind of internal contention. > >Interesting. I am trying to make RA0 my >ss pin. I'll have to check out various >settings when I've recovered from the >soccer team's year-end windup! ;) > >Thanks!
Errata here: http://ww1.microchip.com/downloads/en/DeviceDoc/80000531E.pdf Module: I/O Ports Output High Voltage (VOH) on the RA0 and RA1 pins is not within the published data sheet specification if the I2C1 module is enabled. In addition, internal capacitance on these pins is one and one-half (1.5) and two times higher, respectively, than other I/O ports. Work around Disable slew rate control of the I2C1 module by setting the DISSLW bit (I2C1CON<9>). There is no workaround for higher capacitance Best regards, Spehro Pefhany -- "it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com
In article <1fohk916ccupb6ns3j0d3dihs3q396mvcp@4ax.com>, 
speffSNIP@interlogDOTyou.knowwhat says...

[snip]

> Errata here: > http://ww1.microchip.com/downloads/en/DeviceDoc/80000531E.pdf
Downloaded, thanks. No mention of excess current draw when SPI ports are enabled; RA1 is not affected. AFAICT, just RA0. Time for some bit-twiddling...