Reply by Bill Sloman June 14, 20212021-06-14
On Monday, June 14, 2021 at 5:11:18 AM UTC+10, Phil Hobbs wrote:
> jla...@highlandsniptechnology.com wrote: > > > > This is a new-to-me lowpass topology, roughly 2nd order Bessel. The > > final RC stomps opamp high-frequency noise. > > > <snip> > > Interesting idea--nice smooth symmetrical response with no overshoot. > It might be pretty useful driving a slowish capacitive ADC directly, > because you've already got the RC on the output. The op amp output > does peak a little, which costs you a bit of headroom, but nothing awful.
It's not so much interesting, as half-baked. The first stage time constant is 47psec, the second stage 300psec, so it is going to dominate. Williams and Taylor is full of ways to get a critically damped three pole filter, and John Larkin doesn't seem to have looked at any of them. Neither have I - that would take an effort. This does look to be critically damped. It drops the third time constant to 91psec, which won't get rid of as much amplifier noise. Version 4 SHEET 1 880 680 WIRE 96 32 48 32 WIRE 432 32 160 32 WIRE 368 112 336 112 WIRE 336 144 336 112 WIRE -160 160 -224 160 WIRE -96 160 -160 160 WIRE 48 160 48 32 WIRE 48 160 -16 160 WIRE 96 160 48 160 WIRE 208 160 176 160 WIRE 304 160 208 160 WIRE 432 176 432 32 WIRE 432 176 368 176 WIRE 448 176 432 176 WIRE 480 176 448 176 WIRE 512 176 480 176 WIRE 656 176 592 176 WIRE 704 176 656 176 WIRE 736 176 704 176 WIRE 304 192 256 192 WIRE 656 208 656 176 WIRE -224 224 -224 160 WIRE 448 224 448 176 WIRE 336 240 336 208 WIRE 368 240 336 240 WIRE 208 304 208 160 WIRE 656 304 656 272 WIRE 256 336 256 192 WIRE 448 336 448 304 WIRE 448 336 256 336 WIRE -224 352 -224 304 WIRE -176 432 -224 432 WIRE -160 432 -176 432 WIRE 0 432 -48 432 WIRE 16 432 0 432 WIRE -224 464 -224 432 WIRE -48 464 -48 432 WIRE 208 464 208 368 WIRE -224 592 -224 544 WIRE -48 592 -48 544 FLAG 656 304 0 FLAG 208 464 0 FLAG 368 240 +12 FLAG 368 112 -5 FLAG -160 160 DAC FLAG 704 176 OUT FLAG -224 352 0 FLAG -224 592 0 FLAG -48 592 0 FLAG -176 432 +12 FLAG 0 432 -5 FLAG 480 176 A SYMBOL res 464 320 R180 WINDOW 0 -48 51 Left 2 WINDOW 3 -47 19 Left 2 SYMATTR InstName R3 SYMATTR Value 2k SYMBOL res 608 160 R90 WINDOW 0 -50 58 VBottom 2 WINDOW 3 -44 56 VTop 2 SYMATTR InstName R4 SYMATTR Value 91 SYMBOL Opamps\\UniversalOpamp2 336 176 M180 WINDOW 0 -82 87 Left 2 SYMATTR InstName U1 SYMATTR SpiceLine ilimit=50m rail=0 Vos=0 phimargin=45 SYMATTR Value2 Avol=1Meg GBW=10Meg Slew=20Meg SYMBOL cap 640 208 R0 WINDOW 0 53 17 Left 2 WINDOW 3 54 48 Left 2 SYMATTR InstName C1 SYMATTR Value 1n SYMBOL cap 160 16 R90 WINDOW 0 71 31 VBottom 2 WINDOW 3 76 27 VTop 2 SYMATTR InstName C3 SYMATTR Value 47p SYMBOL res 0 144 R90 WINDOW 0 72 54 VBottom 2 WINDOW 3 75 55 VTop 2 SYMATTR InstName R5 SYMATTR Value 1K SYMBOL voltage -224 208 R0 WINDOW 0 52 79 Left 2 WINDOW 3 36 119 Left 2 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value PULSE(0 5 1u 10n 10n 8u) SYMBOL voltage -224 448 R0 WINDOW 0 -85 49 Left 2 WINDOW 3 -84 82 Left 2 SYMATTR InstName V2 SYMATTR Value 12 SYMBOL voltage -48 448 R0 WINDOW 0 59 50 Left 2 WINDOW 3 60 79 Left 2 SYMATTR InstName V3 SYMATTR Value -5 SYMBOL res 192 144 R90 WINDOW 0 72 54 VBottom 2 WINDOW 3 75 55 VTop 2 SYMATTR InstName R1 SYMATTR Value 1K SYMBOL cap 224 368 R180 WINDOW 0 24 56 Left 2 WINDOW 3 24 8 Left 2 SYMATTR InstName C2 SYMATTR Value 47p TEXT 576 496 Left 2 !.tran 12u TEXT 528 392 Left 2 ;T500 BIAS DRIVER TEXT 536 440 Left 2 ;JL June 12 2021 TEXT 224 120 Left 2 ;OPA197 -- Bill Sloman, Sydney
Reply by June 13, 20212021-06-13
On Sun, 13 Jun 2021 15:11:11 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

>jlarkin@highlandsniptechnology.com wrote: >> >> This is a new-to-me lowpass topology, roughly 2nd order Bessel. The >> final RC stomps opamp high-frequency noise. >> ><snip> >> >> > >Interesting idea--nice smooth symmetrical response with no overshoot. >It might be pretty useful driving a slowish capacitive ADC directly, >because you've already got the RC on the output. The op amp output >does peak a little, which costs you a bit of headroom, but nothing awful.
Yes, Lots of opamps go bonkers if they drive some sort of cmos switch, which includes many ADC front-ends. It's nice to have an active filter end with a hunky passive RC. I did that with my 3rd order lowpass, but then this goofy one occurred. There could be a little feedthru from the first cap to the second, but the c ratio is huge. -- John Larkin Highland Technology, Inc The best designs are necessarily accidental.
Reply by Bill Sloman June 13, 20212021-06-13
On Monday, June 14, 2021 at 6:47:37 AM UTC+10, jla...@highlandsniptechnology.com wrote:
> On Sun, 13 Jun 2021 15:11:11 -0400, Phil Hobbs > <pcdhSpamM...@electrooptical.net> wrote: > >jla...@highlandsniptechnology.com wrote:
<snip>
> Sloman hacked it back into 3rd order, and wrecked it pretty good.
I was just pointing out that it would have been dead easy to make it third order. I dug out Williams and Taylor, but couldn't be bothered to work out how to get to an equi-ripple approximation to a third order Bessel. It would be easy enough to fiddle the gain to make the ensemble dead-beat, but the work would wasted on a John Larkin post.
> He doesn't seem to approve of new ideas. His comments on my dc/dc converter are hilarious too.)
There wasn't anything new in your dc/dc converter. My comments were on the defects of your transformer model. No leakage inductance when the transformer data sheet - which you didn't seem to have read - actually specified a maximum leakage inductance, and no parallel capacitance for the transformer coils, and no inter-winding capacitance between them. There are hilarious defects in a simulation. -- Bill Sloman, Sydney
Reply by June 13, 20212021-06-13
On Sun, 13 Jun 2021 15:22:43 -0700 (PDT), John Walliker
<jrwalliker@gmail.com> wrote:

>On Sunday, 13 June 2021 at 21:47:37 UTC+1, jla...@highlandsniptechnology.com wrote: > >> I started with a 3rd order filter, a 2nd order S-K then the 3rd pole >> moved to the output, which attenuates the opamp HF noise. For some >> reason, people like to put the single pole first and then add peaky >> noise. Maybe that sequence improves pulse headroom? >> >One very good reason for putting a single pole first is to protect the op-amp >from slew-rate limiting if it is hit with fast edges. > >John
That too. Good point. I'll have a slow DAC and then a fast analog switch to make my pulses. So slew rate will be huge. -- John Larkin Highland Technology, Inc The best designs are necessarily accidental.
Reply by John Walliker June 13, 20212021-06-13
On Sunday, 13 June 2021 at 21:47:37 UTC+1, jla...@highlandsniptechnology.com wrote:
 
> I started with a 3rd order filter, a 2nd order S-K then the 3rd pole > moved to the output, which attenuates the opamp HF noise. For some > reason, people like to put the single pole first and then add peaky > noise. Maybe that sequence improves pulse headroom? >
One very good reason for putting a single pole first is to protect the op-amp from slew-rate limiting if it is hit with fast edges. John
Reply by June 13, 20212021-06-13
On Sun, 13 Jun 2021 15:11:11 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

>jlarkin@highlandsniptechnology.com wrote: >> >> This is a new-to-me lowpass topology, roughly 2nd order Bessel. The >> final RC stomps opamp high-frequency noise. >> ><snip> >> >> > >Interesting idea--nice smooth symmetrical response with no overshoot. >It might be pretty useful driving a slowish capacitive ADC directly, >because you've already got the RC on the output. The op amp output >does peak a little, which costs you a bit of headroom, but nothing awful. > >For most other uses, you'd need to follow it with a buffer stage, so you >could add a higher-Z RC lowpass in front of the buffer and have a >third-order filter. > >Cheers > >Phil Hobbs
This is driving a high-impedance load, the bias sections of a dual Mach-Zender modulator. The customer wants it to be flat and quiet and settle to PPMs in, say, 6 or 8 us. That's silly but they are the boss. The bias has to be pulsed per laser shot, because DC bias damages the lithium niobate somehow. I started with a 3rd order filter, a 2nd order S-K then the 3rd pole moved to the output, which attenuates the opamp HF noise. For some reason, people like to put the single pole first and then add peaky noise. Maybe that sequence improves pulse headroom? I'm writing the proposal now. Whatta pain. (Sloman hacked it back into 3rd order, and wrecked it pretty good. He doesn't seem to approve of new ideas. His comments on my dc/dc converter are hilarious too.) -- John Larkin Highland Technology, Inc The best designs are necessarily accidental.
Reply by Phil Hobbs June 13, 20212021-06-13
jlarkin@highlandsniptechnology.com wrote:
> > This is a new-to-me lowpass topology, roughly 2nd order Bessel. The > final RC stomps opamp high-frequency noise. >
<snip>
> >
Interesting idea--nice smooth symmetrical response with no overshoot. It might be pretty useful driving a slowish capacitive ADC directly, because you've already got the RC on the output. The op amp output does peak a little, which costs you a bit of headroom, but nothing awful. For most other uses, you'd need to follow it with a buffer stage, so you could add a higher-Z RC lowpass in front of the buffer and have a third-order filter. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics Briarcliff Manor NY 10510 http://electrooptical.net http://hobbs-eo.com
Reply by Bill Sloman June 13, 20212021-06-13
On Sunday, June 13, 2021 at 3:29:08 PM UTC+10, jla...@highlandsniptechnology.com wrote:
> This is a new-to-me lowpass topology, roughly 2nd order Bessel. The > final RC stomps opamp high-frequency noise.
This is indeed strange. If you want a 2nd order Bessel Sallen Key's style filter with equal capacitor values, a gain of 1.268 will do it. I've tweaked John's design to produce it. I've left the output pole in place. It makes it third order, and the gain is less than his "design", but since he hasn't told us what he is doing - or why - I haven't bothered going any more. Version 4 SHEET 1 880 680 WIRE 96 32 48 32 WIRE 432 32 160 32 WIRE 368 112 336 112 WIRE 336 144 336 112 WIRE -160 160 -224 160 WIRE -96 160 -160 160 WIRE 48 160 48 32 WIRE 48 160 -16 160 WIRE 96 160 48 160 WIRE 208 160 176 160 WIRE 304 160 208 160 WIRE 432 176 432 32 WIRE 432 176 368 176 WIRE 448 176 432 176 WIRE 480 176 448 176 WIRE 512 176 480 176 WIRE 656 176 592 176 WIRE 704 176 656 176 WIRE 736 176 704 176 WIRE 304 192 256 192 WIRE 656 208 656 176 WIRE -224 224 -224 160 WIRE 448 224 448 176 WIRE 336 240 336 208 WIRE 368 240 336 240 WIRE 208 304 208 160 WIRE 656 304 656 272 WIRE 256 336 256 192 WIRE 448 336 448 304 WIRE 448 336 256 336 WIRE -224 352 -224 304 WIRE 448 352 448 336 WIRE -176 432 -224 432 WIRE -160 432 -176 432 WIRE 0 432 -48 432 WIRE 16 432 0 432 WIRE 208 448 208 368 WIRE 448 448 448 432 WIRE 448 448 208 448 WIRE -224 464 -224 432 WIRE -48 464 -48 432 WIRE 448 464 448 448 WIRE -224 592 -224 544 WIRE -48 592 -48 544 FLAG 656 304 0 FLAG 448 464 0 FLAG 368 240 +12 FLAG 368 112 -5 FLAG -160 160 DAC FLAG 704 176 OUT FLAG -224 352 0 FLAG -224 592 0 FLAG -48 592 0 FLAG -176 432 +12 FLAG 0 432 -5 FLAG 480 176 A SYMBOL res 464 448 R180 WINDOW 0 -52 68 Left 2 WINDOW 3 -52 33 Left 2 SYMATTR InstName R2 SYMATTR Value 1K SYMBOL res 464 320 R180 WINDOW 0 -48 51 Left 2 WINDOW 3 -47 19 Left 2 SYMATTR InstName R3 SYMATTR Value 270 SYMBOL res 608 160 R90 WINDOW 0 -50 58 VBottom 2 WINDOW 3 -44 56 VTop 2 SYMATTR InstName R4 SYMATTR Value 300 SYMBOL Opamps\\UniversalOpamp2 336 176 M180 WINDOW 0 -82 87 Left 2 SYMATTR InstName U1 SYMATTR SpiceLine ilimit=50m rail=0 Vos=0 phimargin=45 SYMATTR Value2 Avol=1Meg GBW=10Meg Slew=20Meg SYMBOL cap 640 208 R0 WINDOW 0 53 17 Left 2 WINDOW 3 54 48 Left 2 SYMATTR InstName C1 SYMATTR Value 1n SYMBOL cap 160 16 R90 WINDOW 0 71 31 VBottom 2 WINDOW 3 76 27 VTop 2 SYMATTR InstName C3 SYMATTR Value 47p SYMBOL res 0 144 R90 WINDOW 0 72 54 VBottom 2 WINDOW 3 75 55 VTop 2 SYMATTR InstName R5 SYMATTR Value 1K SYMBOL voltage -224 208 R0 WINDOW 0 52 79 Left 2 WINDOW 3 36 119 Left 2 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value PULSE(0 5 1u 10n 10n 8u) SYMBOL voltage -224 448 R0 WINDOW 0 -85 49 Left 2 WINDOW 3 -84 82 Left 2 SYMATTR InstName V2 SYMATTR Value 12 SYMBOL voltage -48 448 R0 WINDOW 0 59 50 Left 2 WINDOW 3 60 79 Left 2 SYMATTR InstName V3 SYMATTR Value -5 SYMBOL res 192 144 R90 WINDOW 0 72 54 VBottom 2 WINDOW 3 75 55 VTop 2 SYMATTR InstName R1 SYMATTR Value 1K SYMBOL cap 224 368 R180 WINDOW 0 24 56 Left 2 WINDOW 3 24 8 Left 2 SYMATTR InstName C2 SYMATTR Value 47p TEXT 184 584 Left 2 !.tran 10u TEXT 136 480 Left 2 ;T500 BIAS DRIVER TEXT 144 528 Left 2 ;JL June 12 2021 TEXT 224 120 Left 2 ;OPA197 -- Bill Sloman, Sydney
Reply by June 13, 20212021-06-13
This is a new-to-me lowpass topology, roughly 2nd order Bessel. The
final RC stomps opamp high-frequency noise.

Version 4
SHEET 1 880 680
WIRE 96 32 48 32
WIRE 656 32 160 32
WIRE 368 112 336 112
WIRE 336 144 336 112
WIRE -160 160 -224 160
WIRE -96 160 -160 160
WIRE 48 160 48 32
WIRE 48 160 -16 160
WIRE 304 160 48 160
WIRE 448 176 368 176
WIRE 480 176 448 176
WIRE 512 176 480 176
WIRE 656 176 656 32
WIRE 656 176 592 176
WIRE 704 176 656 176
WIRE 736 176 704 176
WIRE 304 192 256 192
WIRE 656 208 656 176
WIRE -224 224 -224 160
WIRE 448 224 448 176
WIRE 336 240 336 208
WIRE 368 240 336 240
WIRE 656 304 656 272
WIRE 256 336 256 192
WIRE 448 336 448 304
WIRE 448 336 256 336
WIRE -224 352 -224 304
WIRE 448 352 448 336
WIRE -176 432 -224 432
WIRE -160 432 -176 432
WIRE 0 432 -48 432
WIRE 16 432 0 432
WIRE -224 464 -224 432
WIRE -48 464 -48 432
WIRE 448 464 448 432
WIRE -224 592 -224 544
WIRE -48 592 -48 544
FLAG 656 304 0
FLAG 448 464 0
FLAG 368 240 +12
FLAG 368 112 -5
FLAG -160 160 DAC
FLAG 704 176 OUT
FLAG -224 352 0
FLAG -224 592 0
FLAG -48 592 0
FLAG -176 432 +12
FLAG 0 432 -5
FLAG 480 176 A
SYMBOL res 464 448 R180
WINDOW 0 -52 68 Left 2
WINDOW 3 -52 33 Left 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 464 320 R180
WINDOW 0 -48 51 Left 2
WINDOW 3 -47 19 Left 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL res 608 160 R90
WINDOW 0 -50 58 VBottom 2
WINDOW 3 -44 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 300
SYMBOL Opamps\\UniversalOpamp2 336 176 M180
WINDOW 0 -82 87 Left 2
SYMATTR InstName U1
SYMATTR SpiceLine ilimit=50m rail=0 Vos=0 phimargin=45
SYMATTR Value2 Avol=1Meg GBW=10Meg Slew=20Meg
SYMBOL cap 640 208 R0
WINDOW 0 53 17 Left 2
WINDOW 3 54 48 Left 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL cap 160 16 R90
WINDOW 0 71 31 VBottom 2
WINDOW 3 76 27 VTop 2
SYMATTR InstName C3
SYMATTR Value 47p
SYMBOL res 0 144 R90
WINDOW 0 72 54 VBottom 2
WINDOW 3 75 55 VTop 2
SYMATTR InstName R5
SYMATTR Value 1K
SYMBOL voltage -224 208 R0
WINDOW 0 52 79 Left 2
WINDOW 3 36 119 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 1u 10n 10n 8u)
SYMBOL voltage -224 448 R0
WINDOW 0 -85 49 Left 2
WINDOW 3 -84 82 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL voltage -48 448 R0
WINDOW 0 59 50 Left 2
WINDOW 3 60 79 Left 2
SYMATTR InstName V3
SYMATTR Value -5
TEXT 200 528 Left 2 !.tran 10u
TEXT 152 424 Left 2 ;T500 BIAS DRIVER
TEXT 160 472 Left 2 ;JL  June 12  2021
TEXT 224 120 Left 2 ;OPA197


-- 

John Larkin      Highland Technology, Inc

The best designs are necessarily accidental.