Reply by Klaus Kragelund ●August 20, 20172017-08-20
On Sunday, August 20, 2017 at 3:10:17 AM UTC+2, Lasse Langwadt Christensen wrote:

> Den søndag den 20. august 2017 kl. 02.54.41 UTC+2 skrev Klaus Kragelund:
> > On Sunday, August 20, 2017 at 2:06:45 AM UTC+2, John Larkin wrote:
> > > On Sat, 19 Aug 2017 15:57:34 -0700 (PDT), Klaus Kragelund
> > > <klauskvik@hotmail.com> wrote:
> > > 
> > > >On Saturday, August 19, 2017 at 6:43:51 PM UTC+2, Jim Thompson wrote:
> > > >> On Sat, 19 Aug 2017 08:56:39 -0700, Jim Thompson
> > > >> <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:
> > > >> 
> > > >> >On Fri, 18 Aug 2017 06:13:59 -0700 (PDT), Klaus Kragelund
> > > >> ><klauskvik@hotmail.com> wrote:
> > > >> >
> > > >> >>Hi
> > > >> >>
> > > >> >>I need to introduce and error in a signal, both quantization and sample/hold
> > > >> >>
> > > >> >>Sofar I have done it by placing an opamp based sample/hold followed by a 8bit ADC (ADC8break) and a 8 bit DAC (DAC8break)
> > > >> >>
> > > >> >>But it doesn't feel right to use that much circuitry just to simulate an error in the system
> > > >> >>
> > > >> >>Anyone know if it can be done with ABM blocks? (sample and hold can be done with a zero order hold I think, but the quantisation is more difficult)
> > > >> >>
> > > >> >>Some sort of rounding function?
> > > >> >>
> > > >> >>Or I could use the C interface API, and write it in code, but that seems stupid also
> > > >> >>
> > > >> >>Cheers
> > > >> >>
> > > >> >>Klaus
> > > >> >
> > > >> >In PSpice....
> > > >> >
> > > >> ><http://www.analog-innovations.com/SED/QuantizerInPSpice.png>
> > > >> >
> > > >> >You can put slicing point "down the middle" by using both ceil() and
> > > >> >floor().
> > > >> >		
> > > >> >                                        ...Jim Thompson
> > > >> 
> > > >> As in...
> > > >> 
> > > >> <http://www.analog-innovations.com/SED/QuantizerInPSpiceBalanced.png>
> > > >
> > > >Very nice, thanks :-)
> > > >
> > > >I am looking into THD magnitude versus microcontroller PWM resolution in a PMSM drive. Higher PWM resolution equates into more accurate motor field vectors and more smooth control
> > > >
> > > >Very limited papers about that out there
> > > >
> > > >Cheers
> > > >
> > > >Klaus
> > > 
> > > You can delta-sigma or noise dither low-resolution DACs or PWMs to get
> > > more effective resolution.
> > > 
> > Yes, but in this case the problem is that the microcontroller is running at max speed, and the max clock frequency and the inverter stage frequency sets the number of effective dutycycles.
> > 
> > So, say a 30MHz timer clock, and a switching frequency of 20kHz, the number of different dutycycles possible is 1500
> > 
> 
> per cycle, but you might be able to average over multiple cycles


Yes, that might have an effect. I do not know if the FOC algoritm does that already, will check :-)

In any case, it is probably way lower than the effect of the non-ideal distribution of the windings

Cheers

Klaus
Reply by Lasse Langwadt Christensen ●August 19, 20172017-08-19
Den s&oslash;ndag den 20. august 2017 kl. 02.54.41 UTC+2 skrev Klaus Kragelund:

> On Sunday, August 20, 2017 at 2:06:45 AM UTC+2, John Larkin wrote:
> > On Sat, 19 Aug 2017 15:57:34 -0700 (PDT), Klaus Kragelund
> > <klauskvik@hotmail.com> wrote:
> > 
> > >On Saturday, August 19, 2017 at 6:43:51 PM UTC+2, Jim Thompson wrote:
> > >> On Sat, 19 Aug 2017 08:56:39 -0700, Jim Thompson
> > >> <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:
> > >> 
> > >> >On Fri, 18 Aug 2017 06:13:59 -0700 (PDT), Klaus Kragelund
> > >> ><klauskvik@hotmail.com> wrote:
> > >> >
> > >> >>Hi
> > >> >>
> > >> >>I need to introduce and error in a signal, both quantization and sample/hold
> > >> >>
> > >> >>Sofar I have done it by placing an opamp based sample/hold followed by a 8bit ADC (ADC8break) and a 8 bit DAC (DAC8break)
> > >> >>
> > >> >>But it doesn't feel right to use that much circuitry just to simulate an error in the system
> > >> >>
> > >> >>Anyone know if it can be done with ABM blocks? (sample and hold can be done with a zero order hold I think, but the quantisation is more difficult)
> > >> >>
> > >> >>Some sort of rounding function?
> > >> >>
> > >> >>Or I could use the C interface API, and write it in code, but that seems stupid also
> > >> >>
> > >> >>Cheers
> > >> >>
> > >> >>Klaus
> > >> >
> > >> >In PSpice....
> > >> >
> > >> ><http://www.analog-innovations.com/SED/QuantizerInPSpice.png>
> > >> >
> > >> >You can put slicing point "down the middle" by using both ceil() and
> > >> >floor().
> > >> >		
> > >> >                                        ...Jim Thompson
> > >> 
> > >> As in...
> > >> 
> > >> <http://www.analog-innovations.com/SED/QuantizerInPSpiceBalanced.png>
> > >
> > >Very nice, thanks :-)
> > >
> > >I am looking into THD magnitude versus microcontroller PWM resolution in a PMSM drive. Higher PWM resolution equates into more accurate motor field vectors and more smooth control
> > >
> > >Very limited papers about that out there
> > >
> > >Cheers
> > >
> > >Klaus
> > 
> > You can delta-sigma or noise dither low-resolution DACs or PWMs to get
> > more effective resolution.
> > 
> Yes, but in this case the problem is that the microcontroller is running at max speed, and the max clock frequency and the inverter stage frequency sets the number of effective dutycycles.
> 
> So, say a 30MHz timer clock, and a switching frequency of 20kHz, the number of different dutycycles possible is 1500
> 


per cycle, but you might be able to average over multiple cycles
Reply by Klaus Kragelund ●August 19, 20172017-08-19
On Sunday, August 20, 2017 at 2:06:45 AM UTC+2, John Larkin wrote:

> On Sat, 19 Aug 2017 15:57:34 -0700 (PDT), Klaus Kragelund
> <klauskvik@hotmail.com> wrote:
> 
> >On Saturday, August 19, 2017 at 6:43:51 PM UTC+2, Jim Thompson wrote:
> >> On Sat, 19 Aug 2017 08:56:39 -0700, Jim Thompson
> >> <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:
> >> 
> >> >On Fri, 18 Aug 2017 06:13:59 -0700 (PDT), Klaus Kragelund
> >> ><klauskvik@hotmail.com> wrote:
> >> >
> >> >>Hi
> >> >>
> >> >>I need to introduce and error in a signal, both quantization and sample/hold
> >> >>
> >> >>Sofar I have done it by placing an opamp based sample/hold followed by a 8bit ADC (ADC8break) and a 8 bit DAC (DAC8break)
> >> >>
> >> >>But it doesn't feel right to use that much circuitry just to simulate an error in the system
> >> >>
> >> >>Anyone know if it can be done with ABM blocks? (sample and hold can be done with a zero order hold I think, but the quantisation is more difficult)
> >> >>
> >> >>Some sort of rounding function?
> >> >>
> >> >>Or I could use the C interface API, and write it in code, but that seems stupid also
> >> >>
> >> >>Cheers
> >> >>
> >> >>Klaus
> >> >
> >> >In PSpice....
> >> >
> >> ><http://www.analog-innovations.com/SED/QuantizerInPSpice.png>
> >> >
> >> >You can put slicing point "down the middle" by using both ceil() and
> >> >floor().
> >> >		
> >> >                                        ...Jim Thompson
> >> 
> >> As in...
> >> 
> >> <http://www.analog-innovations.com/SED/QuantizerInPSpiceBalanced.png>
> >
> >Very nice, thanks :-)
> >
> >I am looking into THD magnitude versus microcontroller PWM resolution in a PMSM drive. Higher PWM resolution equates into more accurate motor field vectors and more smooth control
> >
> >Very limited papers about that out there
> >
> >Cheers
> >
> >Klaus
> 
> You can delta-sigma or noise dither low-resolution DACs or PWMs to get
> more effective resolution.
> 

Yes, but in this case the problem is that the microcontroller is running at max speed, and the max clock frequency and the inverter stage frequency sets the number of effective dutycycles.

So, say a 30MHz timer clock, and a switching frequency of 20kHz, the number of different dutycycles possible is 1500

Cheers

Klaus
Reply by John Larkin ●August 19, 20172017-08-19
On Sat, 19 Aug 2017 15:57:34 -0700 (PDT), Klaus Kragelund
<klauskvik@hotmail.com> wrote:


>On Saturday, August 19, 2017 at 6:43:51 PM UTC+2, Jim Thompson wrote:
>> On Sat, 19 Aug 2017 08:56:39 -0700, Jim Thompson
>> <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:
>> 
>> >On Fri, 18 Aug 2017 06:13:59 -0700 (PDT), Klaus Kragelund
>> ><klauskvik@hotmail.com> wrote:
>> >
>> >>Hi
>> >>
>> >>I need to introduce and error in a signal, both quantization and sample/hold
>> >>
>> >>Sofar I have done it by placing an opamp based sample/hold followed by a 8bit ADC (ADC8break) and a 8 bit DAC (DAC8break)
>> >>
>> >>But it doesn't feel right to use that much circuitry just to simulate an error in the system
>> >>
>> >>Anyone know if it can be done with ABM blocks? (sample and hold can be done with a zero order hold I think, but the quantisation is more difficult)
>> >>
>> >>Some sort of rounding function?
>> >>
>> >>Or I could use the C interface API, and write it in code, but that seems stupid also
>> >>
>> >>Cheers
>> >>
>> >>Klaus
>> >
>> >In PSpice....
>> >
>> ><http://www.analog-innovations.com/SED/QuantizerInPSpice.png>
>> >
>> >You can put slicing point "down the middle" by using both ceil() and
>> >floor().
>> >		
>> >                                        ...Jim Thompson
>> 
>> As in...
>> 
>> <http://www.analog-innovations.com/SED/QuantizerInPSpiceBalanced.png>
>
>Very nice, thanks :-)
>
>I am looking into THD magnitude versus microcontroller PWM resolution in a PMSM drive. Higher PWM resolution equates into more accurate motor field vectors and more smooth control
>
>Very limited papers about that out there
>
>Cheers
>
>Klaus


You can delta-sigma or noise dither low-resolution DACs or PWMs to get
more effective resolution.


-- 

John Larkin         Highland Technology, Inc

lunatic fringe electronics
Reply by Jim Thompson ●August 19, 20172017-08-19
On Sat, 19 Aug 2017 15:57:34 -0700 (PDT), Klaus Kragelund
<klauskvik@hotmail.com> wrote:


>On Saturday, August 19, 2017 at 6:43:51 PM UTC+2, Jim Thompson wrote:
>> On Sat, 19 Aug 2017 08:56:39 -0700, Jim Thompson
>> <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:
>> 
>> >On Fri, 18 Aug 2017 06:13:59 -0700 (PDT), Klaus Kragelund
>> ><klauskvik@hotmail.com> wrote:
>> >
>> >>Hi
>> >>
>> >>I need to introduce and error in a signal, both quantization and sample/hold
>> >>
>> >>Sofar I have done it by placing an opamp based sample/hold followed by a 8bit ADC (ADC8break) and a 8 bit DAC (DAC8break)
>> >>
>> >>But it doesn't feel right to use that much circuitry just to simulate an error in the system
>> >>
>> >>Anyone know if it can be done with ABM blocks? (sample and hold can be done with a zero order hold I think, but the quantisation is more difficult)
>> >>
>> >>Some sort of rounding function?
>> >>
>> >>Or I could use the C interface API, and write it in code, but that seems stupid also
>> >>
>> >>Cheers
>> >>
>> >>Klaus
>> >
>> >In PSpice....
>> >
>> ><http://www.analog-innovations.com/SED/QuantizerInPSpice.png>
>> >
>> >You can put slicing point "down the middle" by using both ceil() and
>> >floor().
>> >		
>> >                                        ...Jim Thompson
>> 
>> As in...
>> 
>> <http://www.analog-innovations.com/SED/QuantizerInPSpiceBalanced.png>
>
>Very nice, thanks :-)
>
>I am looking into THD magnitude versus microcontroller PWM resolution in a PMSM drive. Higher PWM resolution equates into more accurate motor field vectors and more smooth control
>
>Very limited papers about that out there
>
>Cheers
>
>Klaus


Happy to have been of help!
		
                                        ...Jim Thompson
-- 
| James E.Thompson                                 |    mens     |
| Analog Innovations                               |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| STV, Queen Creek, AZ 85142    Skype: skypeanalog |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

             I'm looking for work... see my website.

Thinking outside the box...producing elegant & economic solutions.
Reply by Klaus Kragelund ●August 19, 20172017-08-19
On Saturday, August 19, 2017 at 6:43:51 PM UTC+2, Jim Thompson wrote:

> On Sat, 19 Aug 2017 08:56:39 -0700, Jim Thompson
> <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:
> 
> >On Fri, 18 Aug 2017 06:13:59 -0700 (PDT), Klaus Kragelund
> ><klauskvik@hotmail.com> wrote:
> >
> >>Hi
> >>
> >>I need to introduce and error in a signal, both quantization and sample/hold
> >>
> >>Sofar I have done it by placing an opamp based sample/hold followed by a 8bit ADC (ADC8break) and a 8 bit DAC (DAC8break)
> >>
> >>But it doesn't feel right to use that much circuitry just to simulate an error in the system
> >>
> >>Anyone know if it can be done with ABM blocks? (sample and hold can be done with a zero order hold I think, but the quantisation is more difficult)
> >>
> >>Some sort of rounding function?
> >>
> >>Or I could use the C interface API, and write it in code, but that seems stupid also
> >>
> >>Cheers
> >>
> >>Klaus
> >
> >In PSpice....
> >
> ><http://www.analog-innovations.com/SED/QuantizerInPSpice.png>
> >
> >You can put slicing point "down the middle" by using both ceil() and
> >floor().
> >		
> >                                        ...Jim Thompson
> 
> As in...
> 
> <http://www.analog-innovations.com/SED/QuantizerInPSpiceBalanced.png>


Very nice, thanks :-)

I am looking into THD magnitude versus microcontroller PWM resolution in a PMSM drive. Higher PWM resolution equates into more accurate motor field vectors and more smooth control

Very limited papers about that out there

Cheers

Klaus
Reply by Jim Thompson ●August 19, 20172017-08-19
On Sat, 19 Aug 2017 08:56:39 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:


>On Fri, 18 Aug 2017 06:13:59 -0700 (PDT), Klaus Kragelund
><klauskvik@hotmail.com> wrote:
>
>>Hi
>>
>>I need to introduce and error in a signal, both quantization and sample/hold
>>
>>Sofar I have done it by placing an opamp based sample/hold followed by a 8bit ADC (ADC8break) and a 8 bit DAC (DAC8break)
>>
>>But it doesn't feel right to use that much circuitry just to simulate an error in the system
>>
>>Anyone know if it can be done with ABM blocks? (sample and hold can be done with a zero order hold I think, but the quantisation is more difficult)
>>
>>Some sort of rounding function?
>>
>>Or I could use the C interface API, and write it in code, but that seems stupid also
>>
>>Cheers
>>
>>Klaus
>
>In PSpice....
>
><http://www.analog-innovations.com/SED/QuantizerInPSpice.png>
>
>You can put slicing point "down the middle" by using both ceil() and
>floor().
>		
>                                        ...Jim Thompson


As in...

<http://www.analog-innovations.com/SED/QuantizerInPSpiceBalanced.png>
		
                                        ...Jim Thompson
-- 
| James E.Thompson                                 |    mens     |
| Analog Innovations                               |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| STV, Queen Creek, AZ 85142    Skype: skypeanalog |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

             I'm looking for work... see my website.

Thinking outside the box...producing elegant & economic solutions.
Reply by Jim Thompson ●August 19, 20172017-08-19
On Fri, 18 Aug 2017 06:13:59 -0700 (PDT), Klaus Kragelund
<klauskvik@hotmail.com> wrote:


>Hi
>
>I need to introduce and error in a signal, both quantization and sample/hold
>
>Sofar I have done it by placing an opamp based sample/hold followed by a 8bit ADC (ADC8break) and a 8 bit DAC (DAC8break)
>
>But it doesn't feel right to use that much circuitry just to simulate an error in the system
>
>Anyone know if it can be done with ABM blocks? (sample and hold can be done with a zero order hold I think, but the quantisation is more difficult)
>
>Some sort of rounding function?
>
>Or I could use the C interface API, and write it in code, but that seems stupid also
>
>Cheers
>
>Klaus


In PSpice....

<http://www.analog-innovations.com/SED/QuantizerInPSpice.png>

You can put slicing point "down the middle" by using both ceil() and
floor().
		
                                        ...Jim Thompson
-- 
| James E.Thompson                                 |    mens     |
| Analog Innovations                               |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| STV, Queen Creek, AZ 85142    Skype: skypeanalog |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

             I'm looking for work... see my website.

Thinking outside the box...producing elegant & economic solutions.
Reply by ●August 18, 20172017-08-18
Den fredag den 18. august 2017 kl. 20.24.48 UTC+2 skrev Jim Thompson:

> On Fri, 18 Aug 2017 11:10:22 -0700, John Larkin
> <jjlarkin@highland_snip_technology.com> wrote:
> 
> >On Fri, 18 Aug 2017 09:42:57 -0700 (PDT), Klaus Kragelund
> ><klauskvik@hotmail.com> wrote:
> >
> >>On Friday, August 18, 2017 at 4:14:29 PM UTC+2, John Larkin wrote:
> >>> On Fri, 18 Aug 2017 06:13:59 -0700 (PDT), Klaus Kragelund
> >>> <klauskvik@hotmail.com> wrote:
> >>> 
> >>> >Hi
> >>> >
> >>> >I need to introduce and error in a signal, both quantization and sample/hold
> >>> >
> >>> >Sofar I have done it by placing an opamp based sample/hold followed by a 8bit ADC (ADC8break) and a 8 bit DAC (DAC8break)
> >>> >
> >>> >But it doesn't feel right to use that much circuitry just to simulate an error in the system
> >>> >
> >>> >Anyone know if it can be done with ABM blocks? (sample and hold can be done with a zero order hold I think, but the quantisation is more difficult)
> >>> >
> >>> >Some sort of rounding function?
> >>> >
> >>> >Or I could use the C interface API, and write it in code, but that seems stupid also
> >>> >
> >>> >Cheers
> >>> >
> >>> >Klaus
> >>> 
> >>> Spice has an ideal sample/hold.
> >>> 
> >>> Here's a quantizer:
> >>> 
> >>> Version 4
> >>> SHEET 1 880 680
> >>> WIRE 48 48 0 48
> >>> WIRE 112 48 48 48
> >>> WIRE 384 48 320 48
> >>> WIRE 432 48 384 48
> >>> WIRE 0 96 0 48
> >>> WIRE 112 112 112 48
> >>> WIRE 320 112 320 48
> >>> WIRE 432 128 432 48
> >>> WIRE 0 224 0 176
> >>> WIRE 112 224 112 192
> >>> WIRE 320 240 320 192
> >>> WIRE 432 240 432 208
> >>> FLAG 0 224 0
> >>> FLAG 320 240 0
> >>> FLAG 112 224 0
> >>> FLAG 432 240 0
> >>> FLAG 48 48 X
> >>> FLAG 384 48 OUT
> >>> SYMBOL bv 320 96 R0
> >>> WINDOW 3 36 198 Left 2
> >>> SYMATTR Value V=int(5.1*V(X))*0.2
> >>> SYMATTR InstName B1
> >>> SYMBOL voltage 0 80 R0
> >>> WINDOW 3 16 199 Left 2
> >>> WINDOW 123 0 0 Left 2
> >>> WINDOW 39 0 0 Left 2
> >>> SYMATTR Value SINE(0 1 1k 0 0 0 3)
> >>> SYMATTR InstName V1
> >>> SYMBOL res 96 96 R0
> >>> SYMATTR InstName R1
> >>> SYMATTR Value 1k
> >>> SYMBOL res 416 112 R0
> >>> SYMATTR InstName R2
> >>> SYMATTR Value 1k
> >>> TEXT 144 40 Left 2 !.tran 0 .005 0 1u
> >>> 
> >>Great, I will try it out (although I have problems finding the INT() function in pspice and the ability to feed into the equation the voltage from a node name net directly)
> >>
> >>Cheers
> >>
> >>Klaus
> >
> >Well, use LT Spice!
> 
> Just proves my point that most simulator users don't actually know how
> to use their simulator.


I have never had the need for a "rounding" function before

These days I only do in average 1 hours per week simuation
Reply by ●August 18, 20172017-08-18
Den fredag den 18. august 2017 kl. 20.10.40 UTC+2 skrev John Larkin:

> On Fri, 18 Aug 2017 09:42:57 -0700 (PDT), Klaus Kragelund
> <klauskvik@hotmail.com> wrote:
> 
> >On Friday, August 18, 2017 at 4:14:29 PM UTC+2, John Larkin wrote:
> >> On Fri, 18 Aug 2017 06:13:59 -0700 (PDT), Klaus Kragelund
> >> <klauskvik@hotmail.com> wrote:
> >> 
> >> >Hi
> >> >
> >> >I need to introduce and error in a signal, both quantization and sample/hold
> >> >
> >> >Sofar I have done it by placing an opamp based sample/hold followed by a 8bit ADC (ADC8break) and a 8 bit DAC (DAC8break)
> >> >
> >> >But it doesn't feel right to use that much circuitry just to simulate an error in the system
> >> >
> >> >Anyone know if it can be done with ABM blocks? (sample and hold can be done with a zero order hold I think, but the quantisation is more difficult)
> >> >
> >> >Some sort of rounding function?
> >> >
> >> >Or I could use the C interface API, and write it in code, but that seems stupid also
> >> >
> >> >Cheers
> >> >
> >> >Klaus
> >> 
> >> Spice has an ideal sample/hold.
> >> 
> >> Here's a quantizer:
> >> 
> >> Version 4
> >> SHEET 1 880 680
> >> WIRE 48 48 0 48
> >> WIRE 112 48 48 48
> >> WIRE 384 48 320 48
> >> WIRE 432 48 384 48
> >> WIRE 0 96 0 48
> >> WIRE 112 112 112 48
> >> WIRE 320 112 320 48
> >> WIRE 432 128 432 48
> >> WIRE 0 224 0 176
> >> WIRE 112 224 112 192
> >> WIRE 320 240 320 192
> >> WIRE 432 240 432 208
> >> FLAG 0 224 0
> >> FLAG 320 240 0
> >> FLAG 112 224 0
> >> FLAG 432 240 0
> >> FLAG 48 48 X
> >> FLAG 384 48 OUT
> >> SYMBOL bv 320 96 R0
> >> WINDOW 3 36 198 Left 2
> >> SYMATTR Value V=int(5.1*V(X))*0.2
> >> SYMATTR InstName B1
> >> SYMBOL voltage 0 80 R0
> >> WINDOW 3 16 199 Left 2
> >> WINDOW 123 0 0 Left 2
> >> WINDOW 39 0 0 Left 2
> >> SYMATTR Value SINE(0 1 1k 0 0 0 3)
> >> SYMATTR InstName V1
> >> SYMBOL res 96 96 R0
> >> SYMATTR InstName R1
> >> SYMATTR Value 1k
> >> SYMBOL res 416 112 R0
> >> SYMATTR InstName R2
> >> SYMATTR Value 1k
> >> TEXT 144 40 Left 2 !.tran 0 .005 0 1u
> >> 
> >Great, I will try it out (although I have problems finding the INT() function in pspice and the ability to feed into the equation the voltage from a node name net directly)
> >
> >Cheers
> >
> >Klaus
> 
> Well, use LT Spice!
> 

I have 20 years of simulation blocks and earlier project in PSpice, so that is not an option. And Capture PSpice gives me some features not available in LTSpice

Cheers

Klaus