"Piotr Wyderski" <peter.pan@neverland.mil> wrote in message
news:o6nvrq$n5a$1@node2.news.atman.pl...
> The convention in Polish literature is that AL is expressed
> in nH/t^2, I thought that this is a worldwide habit. But yes,
> your assumption is correct.
I know better than to let A_L go unqualified... some use nH, some use uH,
some use t^2, some use "per 100 turns"!
A lot of ham resources have tables of powdered iron and ferrite cores (which
are actually designations of Micrometals, and Fair-rite, respectively) in
the latter format (and report the units about as often..!).
So thanks for confirming. :-)
> This is exactly the value the calculator suggests:
>
> http://schmidt-walter-schaltnetzteile.de/smps_e/spw_smps_e.html
>
> (for 10V/10V/4mA/500kHz => 584.1uH). At this energy level
> it should not matter whether the core is closed or has an air gap.
Oh.. so you actually are doing really teeny power. Because... thingy. Fair
enough.
The alternative interpretation is then that you're using way more core than
you should be -- but whatever. Hand-winding more turns, on a teeny core, is
worse than the cost of an oversize core. It's a valid engineering decision,
eh? :^)
> There is no part number, I have wound it myself. The core is from China,
> all I know are the dimensions and the material, which is PC40.
It's weird that PC40 is a TDK designation, but there's no part number or
drawing to go with it. (I suppose it could be that a no-name factory bought
TDK *powder*, and make their own final parts. In which case, who knows what
the part really is, or if they ever wrote a datasheet for it.)
Anyway, it's not hard to measure A_e and l_e of a toroid, so it's not really
a big deal...
> It is composed of 2 coils 16 turns each, both wound with 0.25mm triple
> insulated wire of different colors. Due to its thick insulation
> (the wire is rated for 7kV) a single coil occupies the entire
> circumference of the core and there are two coils, one at the
> top of the other, both single-layer.
Lovely stuff, I need to pick up a few spools some time.
Should be pretty good coupling then: overlapping single layer windings are
/approximately/ a twisted pair. (Consider if you wound them as a bifilar
twist, then untwisted them in-situ so you just had two layers, laying on top
of each other in a coincidentally parallel fashion.) That puts your
transmission line impedance in the ~150 ohm range, and the winding length
around..... half a meter maximum, I would guess?
(Normal twisted pair is more like 100-120 ohms, and for that matter, twisted
*enamel magnet wire* is as low as ~60 ohms. But I'm guessing the thin
center conductor and relatively thick insulation will push it up a bit
higher, plus the uneven winding not being perfectly parallel.)
What relevance is transmission line impedance? It handily gives the
(asymptotic LF approximation equivalent) inductance and capacitance. The L
manifests as leakage, while C manifests as P-S parasitic capacitance.
If Z_0 is about half Z_{free space} (377 ohms), then L is about half and C
about double that of their given values (i.e., L/len isn't 1.257 uH/m, but
more like 0.6 uH/m, and C/len isn't 8.84pF/m, but more like 20 -- but it
also gets extra because of dielectric constant, so maybe 30 instead).
Sanity check: sqrt( (0.6 uH/m) / (30 pF/m) ) = 141 ohms. Close enough for a
SWAG!
At max 0.5 m length, that's 0.3uH and 15pF.
If you recall my TLT time domain analysis, the 15pF manifests as coupling
between pins (which cancels out if the circuit is differential, and has
enough CMRR), and the 0.3uH manifests as leakage. Both are about at their
minimum impact, if you use it at a circuit impedance around Z_0. So, if
you're driving 8 volts, you'd want to draw 53mA at the same time. Or dampen
it with an R+C, where the R is around 150 ohms, and C is some times more pF,
maybe 50-100.
If you don't provide damping, then you'll get ringing -- which may not be a
[functional] problem at all, but is almost always a nuisance during testing
and EMC.
That also means, say you want to push around a gate, hard: you can't do it
any faster than the 0.3uH limits you to. A 10nF gate has a 1/4 wave time
constant of 43ns. (And an impedance of 5.5 ohms, so you'd use that much
gate resistance to dampen it.) And the peak current during that event would
be about 1.4A, for a 10V step.
(Which is not at all a bad GDT, really. That'd be fine for an isolated
inverter in the low 100s kHz!)
>> Hmm, 10.6V into 3.3k is 34mW, so at least it's plausible that you
>> weren't deeply into saturation -- 10.6V at 60% duty is more than enough
>> reset flux.
>
> But how? Where does the energy of the collapsing magnetic field go?
What little energy is stored in the core (which seems to be "most of it",
since the power is so low!), is clamped by the diode and ultimately
dissipated in the resistor.
The 0.3uH of leakage will store whatever's left. Worst case: core
saturates, and the driver draws short-circuit current, maybe 200mA. 200mA
into 0.3uH is 6nJ, is 3mW at 500kHz (still not a lot, really). If clamped
at 30V (37.5V - 8V, give or take), the overshoot pulse will only last for
2ns. I doubt that thing even switches that fast, so you should see very
little overshoot indeed in the flyback case.
So.......are you *suuuure* you checked the phase on these two conditions,
correctly? Because you'll see tons of overshoot in the forward converter
case -- because the reset pulse is completely unclamped, otherwise -- and
hardly a few volts of overshoot from the flyback arrangement, which is
nicely clamped by the diode.
Related question: what was the output voltage under the two conditions?
Forward should yield a bit less than the supply voltage, changing little
with duty cycle; flyback will vary ~proportionally (actually goes as D /
(1-D)).
>> The IC doesn't show any freewheeling structures, only clamp diodes.
>
> Fig. 4. of the NXP datasheet shows an anti-parallel diode between
> the source and the drain of the output MOSFET, which should be fine
> for a flyback. Measurements show it is 2x better than that of 2N7000
> (which quickly gets killed by the spikes :-)).
No, that's not a clamp diode, that's the intrinsic body diode. (It's
redundant to draw it outside the MOSFET, anyway: that's precisely what the
triangle in the middle of the MOSFET symbol is saying.)
The body diode actually serves the purpose of a "damper" or "efficiency"
diode, if anything. These are mostly-obsolete terms from CRT circuits.
What happens here is, the flyback pulse is overly strong (or overly slow),
and resembles, not so much a nice square clamped pulse, but a free ringdown
of the RLC circuit (which is the flyback transformer and deflection coil in
parallel, and their winding inductance and capacitance). If the ringdown is
linear, and not well damped, then if the positive overshoot was, say, 500%,
the subsequent negative undershoot will be, guess what, about 500% again.
To stop the ringing and begin a linear horizontal scan, the negative
ringdown is clamped with a diode. Which simply happens to be a diode from
GND to [switching node]. Or, anything on a secondary winding that yields
the same effect. (Back in the toob days, they used a secondary to generate
"B+ boost", around 550V, which was used for vertical deflection and some
other things.)
In your circuit, you might experience a similar effect, in the forward
configuration, because the flux reset pulse is quite tall: ~400% overshoot.
If it rings down and clamps to ~GND, then the body diode is doing exactly
this kind of job. :)
Anyway, back to clamping -- the S-D "diode" isn't designed to avalanche in
this case; rather, the G-D diode is made with a lower breakdown voltage, so
that the transistor is turned on, dissipating the clamp energy as
conduction, rather than spilling out into the semiconductor. (Avalanching a
MOSFET that's part of an IC, would probably scramble the rest of the IC's
internal functions. Similar reason why you want to avoid putting much bias
into the input protection diodes, or why ESD events often cause latchup or
reset.)
But what you really want, is a clamp diode that dumps the pulse into a
reservoir. Like what a ULN2003 has: a junction diode from [output pin] to
[clamp pin]. In this case, you'd load the [clamp pin] with, say, a 20V
zener diode, or an R || C.
In one-offs, you'd just use an RCD network. This is called the peak voltage
clamp snubber: C >> C_{switching junction}, so it acts as a boost converter,
rectifier and filter; and R is sized to bleed off the worst-case power flow.
Oh, and in this case, since the core is oversized, it's fine for flyback,
but the reset pulse in forward mode delivers precisely as much energy (to
the snubber) as the flyback does normally, so your efficiency will be almost
exactly half!
Typically you'd use a core with average permeability around 30 for flyback
(better for more energy storage), and around 3000+ for forward (better for
/least/ energy storage!). Since you don't have a choice here (it's the same
transformer :) ), your forward mode efficiency is the pits. :-/
> In flyback mode the clamping structure activates and hence defines Vmax.
> In forward mode the scope shows Vmax at the drain is ~24V, i.e. 72%
> of the worst case from Abs. Max., the reverse voltage across the
> rectifier diode is hair below 20V and there are no significant Gibbs
> effect overshots, 1Vpp maybe. I will not show the waveforms, as they
> are just perfect. Seems to be super-stable and safe, I just don't
> understand why. :-)
Perhaps the above will explain why. :-) Do double-check the polarity on
that one...
FYI, Gibbs effect is irrelevant: it is strictly a nonphysical effect, seen
when taking the Fourier transform of a nonphysical (unlimited bandwidth,
piecewise-discontinuous) signal. Real signals are always continuous (not
only that, but with continuous derivatives and finite bandwidth), so if you
ever see something that looks sort-of like it, it's either an instrument
error (DSO sinc interpolation, when implemented poorly, is an illustration
of it), or a part of the real signal -- most often a parasitic network (such
as here, the RLC properties of the switching loop), and therefore the
amplitude and frequency of that transient are representative of real
physical elements in the circuit (which means also that, we needn't throw up
our hands when we see them -- they are elements under the designer's
control!).
I know, it's pedantic -- I clearly understood what you meant by using the
term. But I think it is worth emphasizing the essence of the effect,
because of its beauty: a phenomenon with interesting theoretical properties,
which tests the limits of our analytical methods, and pushes us to think of
ever-more diabolical circuits in case it leads to even deeper understanding.
How is it that the Gibbs effect has finite overshoot, even after infinite
harmonics? Bwuh?!
A real signal cannot have a discontinuity... but what if we try, say,
launching a shock wave down a nonlinear transmission line! What then? How
sharp can we get?
Tim
--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Contract Design
Website: http://seventransistorlabs.com