>"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in
>message news:qphvnbtauar7vdqrs033qfgsshcbbauq79@4ax.com...
>> "Those are the old way... note the dates... I have better ways now...
>> I'm always improving my modeling >:-}
>>
>> (Don't use the FUNC_... versions; and set "TP" to a rational value.))"
>>
>>
>> Here is B_INPUT_INV run in both PSpice and LTspice...
>>
>> <http://www.analog-innovations.com/SED/B_INPUT_INV-PSpice-LTspice.png>
>>
>> PSpice runtime: 0.05sec
>>
>> LTspice runtime: 0.02sec
>>
>>
>> Let me know when you get it right >:-}
>
>Doi, the INV is only an example. INV doesn't do shit, I want NAND/NOR/etc.
>
>Let me know when you get those right.
>
>Tim
I do my best to assist amateurs in understanding Analog Circuit Design
and Spice Modeling, but when they're totally incompetent, and snarky
to boot, I am under no obligation to continue.
The parts exist....
<http://www.analog-innovations.com/DeviceModelsSubckts/JT'sLogicParts.pdf>
Tim Williams, You can't even simulate a simple inverter... so ESAD.
This thread is herewith abandoned.
Students and engineers wishing details, derivations, etc.,
should go to my website...
<http://www.analog-innovations.com/>
and utilize the envelope icon to request technical information.
All requests are cordially invited.
I also invite you to partake of the LTspice list, where true
technical discourse still exists.
...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
Reply by Tim Williams●July 8, 20162016-07-08
"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in
message news:qphvnbtauar7vdqrs033qfgsshcbbauq79@4ax.com...
> "Those are the old way... note the dates... I have better ways now...
> I'm always improving my modeling >:-}
>
> (Don't use the FUNC_... versions; and set "TP" to a rational value.))"
>
>
> Here is B_INPUT_INV run in both PSpice and LTspice...
>
> <http://www.analog-innovations.com/SED/B_INPUT_INV-PSpice-LTspice.png>
>
> PSpice runtime: 0.05sec
>
> LTspice runtime: 0.02sec
>
>
> Let me know when you get it right >:-}
Doi, the INV is only an example. INV doesn't do shit, I want NAND/NOR/etc.
Let me know when you get those right.
Tim
--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Contract Design
Website: http://seventransistorlabs.com
>"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in
>message news:doevnb5tohh0bd2isupvkd0a07fnlkf1b9@4ax.com...
>> Tells me nothing, post netlist, circuit (.CIR) files (as appropriate)
>> and library file you used for inverter.
>
>Here's the copypasta from Multisim:
>
>
>
>** Design1 **
>*
>* NI Multisim to SPICE Netlist Export
>* Generated by: williamstm
>* Fri, Jul 08, 2016 10:23:30
>*
>
>*## Multisim Instrument XSC1 ##*
>
>
>*## Multisim Component R1 ##*
>rR1 1 0 1000 vresR1
>.model vresR1 r( )
>
>*## Multisim Component V1 ##*
>vV1 2 0 ac 1 0
>+ distof1 0 0
>+ distof2 0 0
>+ pulse(-1 2 1e-006 1e-007 1e-007 1e-005 2e-005)
>
>*## Multisim Component IC1 ##*
>xIC1 2 1 0 FUNC_INV__DEFAULT__1
>
>
>*******************************************************************************************
>******** SPICE MODELING by JIM THOMPSON, http://www.analog-innovations.com/
>_uc1ffa9 2014 ********
>*********************************** ALL RIGHTS RESERVED
>***********************************
>*******************************************************************************************
>*******************************************************************************************
>.SUBCKT FUNC_INV__DEFAULT__1 A Y VN PARAMS: TP=1ns
>V_VDEL N_1 VN 1V
>G_G2 N_2 VN VALUE {V(A,VN)*10nA}
>G_G1 N_1 N_2 VALUE {(-V(A,VN)+1)*10nA}
>C_C1 N_2 VN {20u*TP}
>E_E1 Y VN VALUE {(1-TANH(2.944K*(V(N_2,VN)-0.5)))/2}
>RCON_TAG1 N_2 0 1G
>G_GLC1 N_1 N_2 VALUE
>{(V(A,VN))*(10uA)*(1+TANH(246.6644*(V(N_1,N_2)-15m)))/2}
>G_GLC2 N_2 VN VALUE
>{(-V(A,VN)+1)*(10uA)*(1+TANH(246.6644*(V(N_2,VN)-15m)))/2}
>.ENDS FUNC_INV
>*******************************************************************************************
>
>
>
>
In Message-ID: <5ctsnbt8ommqj3gksmi41cv9ofm9n338ji@4ax.com> I said....
"Those are the old way... note the dates... I have better ways now...
I'm always improving my modeling >:-}
(Don't use the FUNC_... versions; and set "TP" to a rational value.))"
Here is B_INPUT_INV run in both PSpice and LTspice...
<http://www.analog-innovations.com/SED/B_INPUT_INV-PSpice-LTspice.png>
PSpice runtime: 0.05sec
LTspice runtime: 0.02sec
Let me know when you get it right >:-}
...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85142 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I'm looking for work... see my website.
Reply by Tim Williams●July 8, 20162016-07-08
"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in
message news:doevnb5tohh0bd2isupvkd0a07fnlkf1b9@4ax.com...
> Tells me nothing, post netlist, circuit (.CIR) files (as appropriate)
> and library file you used for inverter.
Here's the copypasta from Multisim:
** Design1 **
*
* NI Multisim to SPICE Netlist Export
* Generated by: williamstm
* Fri, Jul 08, 2016 10:23:30
*
*## Multisim Instrument XSC1 ##*
*## Multisim Component R1 ##*
rR1 1 0 1000 vresR1
.model vresR1 r( )
*## Multisim Component V1 ##*
vV1 2 0 ac 1 0
+ distof1 0 0
+ distof2 0 0
+ pulse(-1 2 1e-006 1e-007 1e-007 1e-005 2e-005)
*## Multisim Component IC1 ##*
xIC1 2 1 0 FUNC_INV__DEFAULT__1
*******************************************************************************************
******** SPICE MODELING by JIM THOMPSON, http://www.analog-innovations.com/
_uc1ffa9 2014 ********
*********************************** ALL RIGHTS RESERVED
***********************************
*******************************************************************************************
*******************************************************************************************
.SUBCKT FUNC_INV__DEFAULT__1 A Y VN PARAMS: TP=1ns
V_VDEL N_1 VN 1V
G_G2 N_2 VN VALUE {V(A,VN)*10nA}
G_G1 N_1 N_2 VALUE {(-V(A,VN)+1)*10nA}
C_C1 N_2 VN {20u*TP}
E_E1 Y VN VALUE {(1-TANH(2.944K*(V(N_2,VN)-0.5)))/2}
RCON_TAG1 N_2 0 1G
G_GLC1 N_1 N_2 VALUE
{(V(A,VN))*(10uA)*(1+TANH(246.6644*(V(N_1,N_2)-15m)))/2}
G_GLC2 N_2 VN VALUE
{(-V(A,VN)+1)*(10uA)*(1+TANH(246.6644*(V(N_2,VN)-15m)))/2}
.ENDS FUNC_INV
*******************************************************************************************
Reply by Tim Williams●July 8, 20162016-07-08
"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in
message news:6gevnbtls2rv6bfbton4r8761f6dk6luls@4ax.com...
>>Expanding it out long hand gives this,
>>http://seventransistorlabs.com/Images/BehNOT1.png
>>for which I discovered they wrote the fucking TANH function wrong -- it
>>produces Inf for arguments over ~15k. Thanks, Altium...
>
> That's odd. TANH is well-behaved, asymptotic to +1 for large positive
> argument, -1 for large negative argument.
Well... it is when written properly. Example:
https://github.com/numpy/numpy/issues/2321
You'd think the guys writing numpy should've known, but... well, they do
now.
Even if I clamp the input to quite modest values (like +/-8), there's no
guarantee the derivative won't hit the same type of error. Indeed, I get
more random glitches (or significantly more slowdown) at MAXORD > 1.
Unfortunately, TRAP is not a viable solution for general simulations, not
the kind I'd use with this anyway.
I'm gonna yell at the support line a bit and see if they decide to fix it or
not. :-)
Tim
--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Contract Design
Website: http://seventransistorlabs.com
>"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in
>message news:mnstnb9au38hcl0ebe4496j7dabftevo7h@4ax.com...
>>>
>>>And like I said, the risetime is undefined, seemingly being as short as
>>>possible.
>>
>> You must be doing something terribly wrong.
>>
>
>Trying it again, in a vintage (yet more numerically accurate..) simulator, I
>get this:
>http://seventransistorlabs.com/Images/BehNOT2.png
>Now who did terrible wrongs? :-)
>
>Only thing special I'm doing is setting TRTOL=1 and RELTOL=0.1m.
>
>The delay is off *really* far, too. The input delay drivers seem
>suspiciously weak (input time 10nA?), but the capacitor is ridiculously
>small too (~fF!). Is there something about PSPICE scaling G VALUE
>statements???
>
>
>Tim
Tells me nothing, post netlist, circuit (.CIR) files (as appropriate)
and library file you used for inverter.
...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85142 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
Hillary criticizes Trump's business acumen... air tight contracts
where he can't lose money on the deal.
Yet Hillary (aka Judas Chappaqua) sells the US itself down the
river simply for contributions to the Clinton "Foundation".
>"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in
>message news:mnstnb9au38hcl0ebe4496j7dabftevo7h@4ax.com...
>> You must be doing something terribly wrong.
>
>The SUBCKT is verbatim, so it ain't me.
>
>I could post the project netlist....but you wouldn't look at it, because
>there's no need to, and it wouldn't do any good anyway.
>
>Expanding it out long hand gives this,
>http://seventransistorlabs.com/Images/BehNOT1.png
>for which I discovered they wrote the fucking TANH function wrong -- it
>produces Inf for arguments over ~15k. Thanks, Altium...
That's odd. TANH is well-behaved, asymptotic to +1 for large positive
argument, -1 for large negative argument.
Now I have run into issues with ATANH (arctanh)... it doesn't exist in
TopSpice, so I had to do it the old-fashioned way...
<http://www.analog-innovations.com/SED/ATANH.pdf>
ATANH is treacherous as Y -> 1, but I use it only to pre-calculate
.PARAM statement for set-up... no dynamic use.
>
>Putting a limit into the TANH functions fixed the error (and probably would
>fix the other errors I've seen, if suitably placed), but I've now broken the
>function, so I probably fucked up a sign or something...
>
>Tim
...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85142 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
Hillary criticizes Trump's business acumen... air tight contracts
where he can't lose money on the deal.
Yet Hillary (aka Judas Chappaqua) sells the US itself down the
river simply for contributions to the Clinton "Foundation".
Reply by Tim Williams●July 8, 20162016-07-08
"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in
message news:mnstnb9au38hcl0ebe4496j7dabftevo7h@4ax.com...
>>
>>And like I said, the risetime is undefined, seemingly being as short as
>>possible.
>
> You must be doing something terribly wrong.
>
Trying it again, in a vintage (yet more numerically accurate..) simulator, I
get this:
http://seventransistorlabs.com/Images/BehNOT2.png
Now who did terrible wrongs? :-)
Only thing special I'm doing is setting TRTOL=1 and RELTOL=0.1m.
The delay is off *really* far, too. The input delay drivers seem
suspiciously weak (input time 10nA?), but the capacitor is ridiculously
small too (~fF!). Is there something about PSPICE scaling G VALUE
statements???
Tim
--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Contract Design
Website: http://seventransistorlabs.com
>"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in
>message news:mnstnb9au38hcl0ebe4496j7dabftevo7h@4ax.com...
>> You must be doing something terribly wrong.
>
>The SUBCKT is verbatim, so it ain't me.
>
>I could post the project netlist....but you wouldn't look at it, because
>there's no need to, and it wouldn't do any good anyway.
>
>Expanding it out long hand gives this,
>http://seventransistorlabs.com/Images/BehNOT1.png
>for which I discovered they wrote the fucking TANH function wrong -- it
>produces Inf for arguments over ~15k. Thanks, Altium...
>
>Putting a limit into the TANH functions fixed the error (and probably would
>fix the other errors I've seen, if suitably placed), but I've now broken the
>function, so I probably fucked up a sign or something...
>
>Tim
Daily I find an improvement to bounding... I even have "diodes" that
current-limit ;-)
...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85142 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
Hillary criticizes Trump's business acumen... air tight contracts
where he can't lose money on the deal.
Yet Hillary (aka Judas Chappaqua) sells the US itself down the
river simply for contributions to the Clinton "Foundation".
Reply by Tim Williams●July 7, 20162016-07-07
"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote in
message news:mnstnb9au38hcl0ebe4496j7dabftevo7h@4ax.com...
> You must be doing something terribly wrong.
The SUBCKT is verbatim, so it ain't me.
I could post the project netlist....but you wouldn't look at it, because
there's no need to, and it wouldn't do any good anyway.
Expanding it out long hand gives this,
http://seventransistorlabs.com/Images/BehNOT1.png
for which I discovered they wrote the fucking TANH function wrong -- it
produces Inf for arguments over ~15k. Thanks, Altium...
Putting a limit into the TANH functions fixed the error (and probably would
fix the other errors I've seen, if suitably placed), but I've now broken the
function, so I probably fucked up a sign or something...
Tim
--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Contract Design
Website: http://seventransistorlabs.com