Frank Miles <fpm@u.washington.edu> Wrote in message:
> On Fri, 15 May 2015 11:45:45 -0400, bitrex wrote:
>
>> habib.bouaziz@gmail.com Wrote in message:
>>> Le mardi 12 mai 2015 02:44:02 UTC+2, bitrex a �crit :
>>>> Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com>
>>>> Wrote in message:
>>>> > On Mon, 11 May 2015 19:54:13 -0400 (EDT), bitrex
>>>> > <bitrex@de.lete.earthlink.net> wrote:
>>>> >
>>>> >>
>>>> >>Is it normal for the op amp inputs of the Howland pump to not be
>>>> >> at the same voltage? In all my experiments in LTSPICE with the
>>>> >> "improved" topology and grounded resistive loads, this seems to
>>>> >> have been the case. The circuit obviously has both positive and
>>>> >> negative feedback, but if the opamp output is not railed then I
>>>> >> assume the negative feedback must be "winning."
>>>> >>
>>>> >>But if this is normal, how can the analysis of the circuit's
>>>> >> operation proceed from the ideal negative feedback op amp
>>>> >> assumption that both inputs are at the same potential?
>>>> >
>>>> > If the OpAmp inputs are not within the OpAmp offset voltage then
>>>> > something is very wrong.
>>>> >
>>>> > ...Jim Thompson
>>>> > --
>>>> > | James E.Thompson | mens |
>>>> > | Analog Innovations | et |
>>>> > | Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
>>>> > | San Tan Valley, AZ 85142 Skype: skypeanalog | |
>>>> > | Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
>>>> > | E-mail Icon at http://www.analog-innovations.com | 1962 |
>>>> >
>>>> > I love to cook with wine. Sometimes I even put it in the food.
>>>> >
>>>>
>>>>
>>>> Version 4
>>>> SHEET 1 904 680
>>>> WIRE 576 -32 416 -32
>>>> WIRE 848 -32 656 -32
>>>> WIRE -128 -16 -128 -48
>>>> WIRE 0 -16 0 -48
>>>> WIRE 688 96 688 64
>>>> WIRE -128 112 -128 64
>>>> WIRE 0 112 0 64
>>>> WIRE 272 128 176 128
>>>> WIRE 416 128 416 -32
>>>> WIRE 416 128 352 128
>>>> WIRE 496 128 416 128
>>>> WIRE 624 144 560 144
>>>> WIRE 496 160 416 160
>>>> WIRE 176 176 176 128
>>>> WIRE 272 272 176 272
>>>> WIRE 416 272 416 160
>>>> WIRE 416 272 352 272
>>>> WIRE 496 272 416 272
>>>> WIRE 688 272 688 192
>>>> WIRE 688 272 576 272
>>>> WIRE 720 272 688 272
>>>> WIRE 848 272 848 -32
>>>> WIRE 848 272 800 272
>>>> WIRE 176 336 176 272
>>>> WIRE 848 336 848 272
>>>> WIRE 176 496 176 416
>>>> WIRE 848 496 848 416
>>>> FLAG 528 112 Vcc
>>>> FLAG 528 176 Vee
>>>> FLAG 176 176 0
>>>> FLAG 688 64 Vcc
>>>> FLAG 848 496 0
>>>> FLAG -128 112 0
>>>> FLAG 0 112 0
>>>> FLAG -128 -48 Vcc
>>>> FLAG 0 -48 Vee
>>>> FLAG 176 496 0
>>>> SYMBOL npn 624 96 R0
>>>> SYMATTR InstName Q1
>>>> SYMATTR Value 2N3904
>>>> SYMBOL res 816 256 R90
>>>> WINDOW 0 0 56 VBottom 2
>>>> WINDOW 3 32 56 VTop 2
>>>> SYMATTR InstName R5
>>>> SYMATTR Value 1k
>>>> SYMBOL res 832 320 R0
>>>> SYMATTR InstName R6
>>>> SYMATTR Value 1k
>>>> SYMBOL voltage -128 -32 R0
>>>> WINDOW 123 0 0 Left 2
>>>> WINDOW 39 0 0 Left 2
>>>> SYMATTR InstName V1
>>>> SYMATTR Value 12
>>>> SYMBOL voltage 0 -32 R0
>>>> WINDOW 123 0 0 Left 2
>>>> WINDOW 39 0 0 Left 2
>>>> SYMATTR InstName V2
>>>> SYMATTR Value -12
>>>> SYMBOL res 368 256 R90
>>>> WINDOW 0 0 56 VBottom 2
>>>> WINDOW 3 32 56 VTop 2
>>>> SYMATTR InstName R1
>>>> SYMATTR Value 47k
>>>> SYMBOL res 368 112 R90
>>>> WINDOW 0 0 56 VBottom 2
>>>> WINDOW 3 32 56 VTop 2
>>>> SYMATTR InstName R2
>>>> SYMATTR Value 47k
>>>> SYMBOL res 672 -48 R90
>>>> WINDOW 0 0 56 VBottom 2
>>>> WINDOW 3 32 56 VTop 2
>>>> SYMATTR InstName R3
>>>> SYMATTR Value 47k
>>>> SYMBOL res 592 256 R90
>>>> WINDOW 0 0 56 VBottom 2
>>>> WINDOW 3 32 56 VTop 2
>>>> SYMATTR InstName R4
>>>> SYMATTR Value 47k
>>>> SYMBOL voltage 176 320 R0
>>>> WINDOW 123 0 0 Left 2
>>>> WINDOW 39 0 0 Left 2
>>>> SYMATTR InstName V3
>>>> SYMATTR Value 5
>>>> SYMBOL Opamps\\LT1014 528 80 R0
>>>> SYMATTR InstName U1
>>>> TEXT -106 176 Left 2 !.tran 0.1
>>>> --
>>>>
>>>>
>>>> ----Android NewsGroup Reader----
>>>> http://usenet.sinaapp.com/
>>>
>>> Your opamp is going to saturation +12V ... :-(
>>>
>>> "Pas top" as we say in French.
>>>
>>> Hab.
>>>
>>
>> Thanks, sorry for the delay in my reply. Any idea how to fix
>> this? The circuit is copied directly from an application
>> example...
>
> Without checking your 'schematic' : if the device is saturated you may not have a low enough load impedance, and the positive feedback is 'winning'.
>
> HTH...
>
I think I found the problem. The non inverting input has to come
from the top of the output load, and the inverting has to come
from the other side of the sense resistor. I had things
reversed...doh!
--
----Android NewsGroup Reader----
http://usenet.sinaapp.com/
Reply by Frank Miles●May 15, 20152015-05-15
On Fri, 15 May 2015 11:45:45 -0400, bitrex wrote:
> habib.bouaziz@gmail.com Wrote in message:
>> Le mardi 12 mai 2015 02:44:02 UTC+2, bitrex a écrit :
>>> Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com>
>>> Wrote in message:
>>> > On Mon, 11 May 2015 19:54:13 -0400 (EDT), bitrex
>>> > <bitrex@de.lete.earthlink.net> wrote:
>>> >
>>> >>
>>> >>Is it normal for the op amp inputs of the Howland pump to not be
>>> >> at the same voltage? In all my experiments in LTSPICE with the
>>> >> "improved" topology and grounded resistive loads, this seems to
>>> >> have been the case. The circuit obviously has both positive and
>>> >> negative feedback, but if the opamp output is not railed then I
>>> >> assume the negative feedback must be "winning."
>>> >>
>>> >>But if this is normal, how can the analysis of the circuit's
>>> >> operation proceed from the ideal negative feedback op amp
>>> >> assumption that both inputs are at the same potential?
>>> >
>>> > If the OpAmp inputs are not within the OpAmp offset voltage then
>>> > something is very wrong.
>>> >
>>> > ...Jim Thompson
>>> > --
>>> > | James E.Thompson | mens |
>>> > | Analog Innovations | et |
>>> > | Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
>>> > | San Tan Valley, AZ 85142 Skype: skypeanalog | |
>>> > | Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
>>> > | E-mail Icon at http://www.analog-innovations.com | 1962 |
>>> >
>>> > I love to cook with wine. Sometimes I even put it in the food.
>>> >
>>>
>>>
>>> Version 4
>>> SHEET 1 904 680
>>> WIRE 576 -32 416 -32
>>> WIRE 848 -32 656 -32
>>> WIRE -128 -16 -128 -48
>>> WIRE 0 -16 0 -48
>>> WIRE 688 96 688 64
>>> WIRE -128 112 -128 64
>>> WIRE 0 112 0 64
>>> WIRE 272 128 176 128
>>> WIRE 416 128 416 -32
>>> WIRE 416 128 352 128
>>> WIRE 496 128 416 128
>>> WIRE 624 144 560 144
>>> WIRE 496 160 416 160
>>> WIRE 176 176 176 128
>>> WIRE 272 272 176 272
>>> WIRE 416 272 416 160
>>> WIRE 416 272 352 272
>>> WIRE 496 272 416 272
>>> WIRE 688 272 688 192
>>> WIRE 688 272 576 272
>>> WIRE 720 272 688 272
>>> WIRE 848 272 848 -32
>>> WIRE 848 272 800 272
>>> WIRE 176 336 176 272
>>> WIRE 848 336 848 272
>>> WIRE 176 496 176 416
>>> WIRE 848 496 848 416
>>> FLAG 528 112 Vcc
>>> FLAG 528 176 Vee
>>> FLAG 176 176 0
>>> FLAG 688 64 Vcc
>>> FLAG 848 496 0
>>> FLAG -128 112 0
>>> FLAG 0 112 0
>>> FLAG -128 -48 Vcc
>>> FLAG 0 -48 Vee
>>> FLAG 176 496 0
>>> SYMBOL npn 624 96 R0
>>> SYMATTR InstName Q1
>>> SYMATTR Value 2N3904
>>> SYMBOL res 816 256 R90
>>> WINDOW 0 0 56 VBottom 2
>>> WINDOW 3 32 56 VTop 2
>>> SYMATTR InstName R5
>>> SYMATTR Value 1k
>>> SYMBOL res 832 320 R0
>>> SYMATTR InstName R6
>>> SYMATTR Value 1k
>>> SYMBOL voltage -128 -32 R0
>>> WINDOW 123 0 0 Left 2
>>> WINDOW 39 0 0 Left 2
>>> SYMATTR InstName V1
>>> SYMATTR Value 12
>>> SYMBOL voltage 0 -32 R0
>>> WINDOW 123 0 0 Left 2
>>> WINDOW 39 0 0 Left 2
>>> SYMATTR InstName V2
>>> SYMATTR Value -12
>>> SYMBOL res 368 256 R90
>>> WINDOW 0 0 56 VBottom 2
>>> WINDOW 3 32 56 VTop 2
>>> SYMATTR InstName R1
>>> SYMATTR Value 47k
>>> SYMBOL res 368 112 R90
>>> WINDOW 0 0 56 VBottom 2
>>> WINDOW 3 32 56 VTop 2
>>> SYMATTR InstName R2
>>> SYMATTR Value 47k
>>> SYMBOL res 672 -48 R90
>>> WINDOW 0 0 56 VBottom 2
>>> WINDOW 3 32 56 VTop 2
>>> SYMATTR InstName R3
>>> SYMATTR Value 47k
>>> SYMBOL res 592 256 R90
>>> WINDOW 0 0 56 VBottom 2
>>> WINDOW 3 32 56 VTop 2
>>> SYMATTR InstName R4
>>> SYMATTR Value 47k
>>> SYMBOL voltage 176 320 R0
>>> WINDOW 123 0 0 Left 2
>>> WINDOW 39 0 0 Left 2
>>> SYMATTR InstName V3
>>> SYMATTR Value 5
>>> SYMBOL Opamps\\LT1014 528 80 R0
>>> SYMATTR InstName U1
>>> TEXT -106 176 Left 2 !.tran 0.1
>>> --
>>>
>>>
>>> ----Android NewsGroup Reader----
>>> http://usenet.sinaapp.com/
>>
>> Your opamp is going to saturation +12V ... :-(
>>
>> "Pas top" as we say in French.
>>
>> Hab.
>>
>
> Thanks, sorry for the delay in my reply. Any idea how to fix
> this? The circuit is copied directly from an application
> example...
Without checking your 'schematic' : if the device is saturated you may not have a low enough load impedance, and the positive feedback is 'winning'.
HTH...
Reply by bitrex●May 15, 20152015-05-15
habib.bouaziz@gmail.com Wrote in message:
> Le mardi 12 mai 2015 02:44:02 UTC+2, bitrex a �crit :
>> Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com>
>> Wrote in message:
>> > On Mon, 11 May 2015 19:54:13 -0400 (EDT), bitrex
>> > <bitrex@de.lete.earthlink.net> wrote:
>> >
>> >>
>> >>Is it normal for the op amp inputs of the Howland pump to not be
>> >> at the same voltage? In all my experiments in LTSPICE with the
>> >> "improved" topology and grounded resistive loads, this seems to
>> >> have been the case. The circuit obviously has both positive and
>> >> negative feedback, but if the opamp output is not railed then I
>> >> assume the negative feedback must be "winning."
>> >>
>> >>But if this is normal, how can the analysis of the circuit's
>> >> operation proceed from the ideal negative feedback op amp
>> >> assumption that both inputs are at the same potential?
>> >
>> > If the OpAmp inputs are not within the OpAmp offset voltage then
>> > something is very wrong.
>> >
>> > ...Jim Thompson
>> > --
>> > | James E.Thompson | mens |
>> > | Analog Innovations | et |
>> > | Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
>> > | San Tan Valley, AZ 85142 Skype: skypeanalog | |
>> > | Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
>> > | E-mail Icon at http://www.analog-innovations.com | 1962 |
>> >
>> > I love to cook with wine. Sometimes I even put it in the food.
>> >
>>
>>
>> Version 4
>> SHEET 1 904 680
>> WIRE 576 -32 416 -32
>> WIRE 848 -32 656 -32
>> WIRE -128 -16 -128 -48
>> WIRE 0 -16 0 -48
>> WIRE 688 96 688 64
>> WIRE -128 112 -128 64
>> WIRE 0 112 0 64
>> WIRE 272 128 176 128
>> WIRE 416 128 416 -32
>> WIRE 416 128 352 128
>> WIRE 496 128 416 128
>> WIRE 624 144 560 144
>> WIRE 496 160 416 160
>> WIRE 176 176 176 128
>> WIRE 272 272 176 272
>> WIRE 416 272 416 160
>> WIRE 416 272 352 272
>> WIRE 496 272 416 272
>> WIRE 688 272 688 192
>> WIRE 688 272 576 272
>> WIRE 720 272 688 272
>> WIRE 848 272 848 -32
>> WIRE 848 272 800 272
>> WIRE 176 336 176 272
>> WIRE 848 336 848 272
>> WIRE 176 496 176 416
>> WIRE 848 496 848 416
>> FLAG 528 112 Vcc
>> FLAG 528 176 Vee
>> FLAG 176 176 0
>> FLAG 688 64 Vcc
>> FLAG 848 496 0
>> FLAG -128 112 0
>> FLAG 0 112 0
>> FLAG -128 -48 Vcc
>> FLAG 0 -48 Vee
>> FLAG 176 496 0
>> SYMBOL npn 624 96 R0
>> SYMATTR InstName Q1
>> SYMATTR Value 2N3904
>> SYMBOL res 816 256 R90
>> WINDOW 0 0 56 VBottom 2
>> WINDOW 3 32 56 VTop 2
>> SYMATTR InstName R5
>> SYMATTR Value 1k
>> SYMBOL res 832 320 R0
>> SYMATTR InstName R6
>> SYMATTR Value 1k
>> SYMBOL voltage -128 -32 R0
>> WINDOW 123 0 0 Left 2
>> WINDOW 39 0 0 Left 2
>> SYMATTR InstName V1
>> SYMATTR Value 12
>> SYMBOL voltage 0 -32 R0
>> WINDOW 123 0 0 Left 2
>> WINDOW 39 0 0 Left 2
>> SYMATTR InstName V2
>> SYMATTR Value -12
>> SYMBOL res 368 256 R90
>> WINDOW 0 0 56 VBottom 2
>> WINDOW 3 32 56 VTop 2
>> SYMATTR InstName R1
>> SYMATTR Value 47k
>> SYMBOL res 368 112 R90
>> WINDOW 0 0 56 VBottom 2
>> WINDOW 3 32 56 VTop 2
>> SYMATTR InstName R2
>> SYMATTR Value 47k
>> SYMBOL res 672 -48 R90
>> WINDOW 0 0 56 VBottom 2
>> WINDOW 3 32 56 VTop 2
>> SYMATTR InstName R3
>> SYMATTR Value 47k
>> SYMBOL res 592 256 R90
>> WINDOW 0 0 56 VBottom 2
>> WINDOW 3 32 56 VTop 2
>> SYMATTR InstName R4
>> SYMATTR Value 47k
>> SYMBOL voltage 176 320 R0
>> WINDOW 123 0 0 Left 2
>> WINDOW 39 0 0 Left 2
>> SYMATTR InstName V3
>> SYMATTR Value 5
>> SYMBOL Opamps\\LT1014 528 80 R0
>> SYMATTR InstName U1
>> TEXT -106 176 Left 2 !.tran 0.1
>> --
>>
>>
>> ----Android NewsGroup Reader----
>> http://usenet.sinaapp.com/
>
> Your opamp is going to saturation +12V ... :-(
>
> "Pas top" as we say in French.
>
> Hab.
>
Thanks, sorry for the delay in my reply. Any idea how to fix
this? The circuit is copied directly from an application
example...
--
----Android NewsGroup Reader----
http://usenet.sinaapp.com/
Reply by Tim Williams●May 12, 20152015-05-12
"bitrex" <bitrex@de.lete.earthlink.net> wrote in message
news:55523084$0$8781$4c5ecfc7@frugalusenet.com...
> Two current source/sink that track each other well over
> temperature, and are also voltage controllable. And preferably a
> setup where I could mirror one set of source/sinks into others
> that are slaved to the first one to have multiple
> bridges.
>
> Figuring this out is kind of a pain in the ass.
Just use an op-amp and transistor per output, with supply side current
sense (emitter / source resistor). This makes a transconductance amp
(gain = Iout / Vin). Now all you need to do is supply equal voltages to
all the stages, and you get N accurate current sources.
To get a +V referenced voltage, hang a sense resistor from +V and drive it
with a sink from -V. The input and sense resistors all have to be
matched/trimmed within the desired accuracy to keep unity gain, as well as
the op-amp Vos's. Or mismatched to add offset or change the gain.
Tim
--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Contract Design
Website: http://seventransistorlabs.com
Reply by John Larkin●May 12, 20152015-05-12
On Tue, 12 May 2015 14:32:59 -0700 (PDT), whit3rd <whit3rd@gmail.com>
wrote:
>On Tuesday, May 12, 2015 at 12:36:55 PM UTC-7, John Larkin wrote:
>> On Tue, 12 May 2015 13:55:01 -0400, Phil Hobbs
>> <pcdhSpamMeSenseless@electrooptical.net> wrote:
>
>[about a mysterious problem of balancing current source/sink}
>
>> >Well, that's sort of how a sampling bridge works.
>
>> Sure, but one corner of the sampling bridge sees about 25 ohms to
>> ground, and the sampling pulses are really short. They're not really
>> current sources.
>>
>> https://dl.dropboxusercontent.com/u/53724080/Sampling/HP/HP1810a.jpg
>
>In this example, transformer T1 couples the sink/source pair of currents, which
>ensures (for short sample times) source and sink current equality. It effectively decouples
>the symmetry problem from the trim resistors and associated wiring.
T1 is a balun, but it does balance the short sampling pulses.
--
John Larkin Highland Technology, Inc
picosecond timing precision measurement
jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
Reply by whit3rd●May 12, 20152015-05-12
On Tuesday, May 12, 2015 at 12:36:55 PM UTC-7, John Larkin wrote:
> On Tue, 12 May 2015 13:55:01 -0400, Phil Hobbs
> <pcdhSpamMeSenseless@electrooptical.net> wrote:
[about a mysterious problem of balancing current source/sink}
> >Well, that's sort of how a sampling bridge works.
In this example, transformer T1 couples the sink/source pair of currents, which
ensures (for short sample times) source and sink current equality. It effectively decouples
the symmetry problem from the trim resistors and associated wiring.
That's an "update" of the 2008 NSC app note, and a
significant change was that TI removed Bob Pease's
name as the author.
--
Thanks,
- Win
Reply by John Larkin●May 12, 20152015-05-12
On Tue, 12 May 2015 13:55:01 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:
>On 05/12/2015 12:55 PM, bitrex wrote:
>> John Larkin <jlarkin@highlandtechnology.com> Wrote in message:
>>> On Tue, 12 May 2015 04:51:58 -0500, "Tim Williams"
>>> <tiwill@seventransistorlabs.com> wrote:
>>>
>>>> "whit3rd" <whit3rd@gmail.com> wrote in message
>>>> news:0863c364-fce6-4932-8306-9a7f546cb4bf@googlegroups.com...
>>>>> Topologies don't have stability. The Howland circuit achieves
>>>>> infinite output impedance (is a current source) because the output
>>>>> impedance is computed by dividing by a quantity that is a
>>>>> difference of two nearly-equal things. If they are nearly-equal
>>>>> and the quantity is positive, the output impedance is large. If they
>>>>> are nearly-equal and the quantity is negative, the output impedance
>>>>> is negative. That's an OOPS event.
>>>>
>>>> Well, no; a little bit of negative conductance* might even be beneficial.
>>>>
>>>> * "A little bit of negative resistance" would seem inaccurate, and "A
>>>> lotta bit of negative resistance" just doesn't sound right at all.
>>>>
>>>> FWIW, just as negative resistance wraps around to positive resistance
>>>> around zero, the same happens at infinity, going out to infinite
>>>> resistance (positive to zero conductance) then back negative (negative
>>>> nonzero conductance).
>>>>
>>>> Which is actually a really nice (physical) manifestation of some elegant
>>>> mathematics: analytical calculus often makes use of poles (singularities)
>>>> at infinity or zero, and executing loop integrals around them to make
>>>> certain solutions that wouldn't otherwise be possible (you can't integrate
>>>> 1/x, along the real number line, through 0). Those methods aren't really
>>>> important here, but the analytical nature of infinity as being a
>>>> wraparound point on a closed ring (when well-behaved) is quite nice.
>>>>
>>>> Tim
>>>
>>> I recall that the OP wants to connect two current sources to opposite
>>> corners of a bridge rectifier. That will have interesting dynamics.
>
>Well, that's sort of how a sampling bridge works.
>
> John Larkin <jlarkin@highlandtechnology.com> Wrote in message:
>> On Tue, 12 May 2015 04:51:58 -0500, "Tim Williams"
>> <tiwill@seventransistorlabs.com> wrote:
>>
>>> "whit3rd" <whit3rd@gmail.com> wrote in message
>>> news:0863c364-fce6-4932-8306-9a7f546cb4bf@googlegroups.com...
>>>> Topologies don't have stability. The Howland circuit achieves
>>>> infinite output impedance (is a current source) because the output
>>>> impedance is computed by dividing by a quantity that is a
>>>> difference of two nearly-equal things. If they are nearly-equal
>>>> and the quantity is positive, the output impedance is large. If they
>>>> are nearly-equal and the quantity is negative, the output impedance
>>>> is negative. That's an OOPS event.
>>>
>>> Well, no; a little bit of negative conductance* might even be beneficial.
>>>
>>> * "A little bit of negative resistance" would seem inaccurate, and "A
>>> lotta bit of negative resistance" just doesn't sound right at all.
>>>
>>> FWIW, just as negative resistance wraps around to positive resistance
>>> around zero, the same happens at infinity, going out to infinite
>>> resistance (positive to zero conductance) then back negative (negative
>>> nonzero conductance).
>>>
>>> Which is actually a really nice (physical) manifestation of some elegant
>>> mathematics: analytical calculus often makes use of poles (singularities)
>>> at infinity or zero, and executing loop integrals around them to make
>>> certain solutions that wouldn't otherwise be possible (you can't integrate
>>> 1/x, along the real number line, through 0). Those methods aren't really
>>> important here, but the analytical nature of infinity as being a
>>> wraparound point on a closed ring (when well-behaved) is quite nice.
>>>
>>> Tim
>>
>> I recall that the OP wants to connect two current sources to opposite
>> corners of a bridge rectifier. That will have interesting dynamics.
Well, that's sort of how a sampling bridge works.
>>
>>
>
> Two current source/sink that track each other well over
> temperature, and are also voltage controllable. And preferably a
> setup where I could mirror one set of source/sinks into others
> that are slaved to the first one to have multiple
> bridges.
>
> Figuring this out is kind of a pain in the ass.
Hopefully it'll repay the effort.
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics
160 North State Road #203
Briarcliff Manor NY 10510
hobbs at electrooptical dot net
http://electrooptical.net
Reply by John Larkin●May 12, 20152015-05-12
On Tue, 12 May 2015 12:55:06 -0400 (EDT), bitrex
<bitrex@de.lete.earthlink.net> wrote:
>John Larkin <jlarkin@highlandtechnology.com> Wrote in message:
>> On Tue, 12 May 2015 04:51:58 -0500, "Tim Williams"
>> <tiwill@seventransistorlabs.com> wrote:
>>
>>>"whit3rd" <whit3rd@gmail.com> wrote in message
>>>news:0863c364-fce6-4932-8306-9a7f546cb4bf@googlegroups.com...
>>>> Topologies don't have stability. The Howland circuit achieves
>>>> infinite output impedance (is a current source) because the output
>>>> impedance is computed by dividing by a quantity that is a
>>>> difference of two nearly-equal things. If they are nearly-equal
>>>> and the quantity is positive, the output impedance is large. If they
>>>> are nearly-equal and the quantity is negative, the output impedance
>>>> is negative. That's an OOPS event.
>>>
>>>Well, no; a little bit of negative conductance* might even be beneficial.
>>>
>>>* "A little bit of negative resistance" would seem inaccurate, and "A
>>>lotta bit of negative resistance" just doesn't sound right at all.
>>>
>>>FWIW, just as negative resistance wraps around to positive resistance
>>>around zero, the same happens at infinity, going out to infinite
>>>resistance (positive to zero conductance) then back negative (negative
>>>nonzero conductance).
>>>
>>>Which is actually a really nice (physical) manifestation of some elegant
>>>mathematics: analytical calculus often makes use of poles (singularities)
>>>at infinity or zero, and executing loop integrals around them to make
>>>certain solutions that wouldn't otherwise be possible (you can't integrate
>>>1/x, along the real number line, through 0). Those methods aren't really
>>>important here, but the analytical nature of infinity as being a
>>>wraparound point on a closed ring (when well-behaved) is quite nice.
>>>
>>>Tim
>>
>> I recall that the OP wants to connect two current sources to opposite
>> corners of a bridge rectifier. That will have interesting dynamics.
>>
>>
>
>Two current source/sink that track each other well over
> temperature, and are also voltage controllable. And preferably a
> setup where I could mirror one set of source/sinks into others
> that are slaved to the first one to have multiple
> bridges.
>
>Figuring this out is kind of a pain in the ass.
Dueling current sources are inherently unstable, but I don't know what
else the BR is connected to.
Why not just resistors to adjustable V+ and V-? With some junction
drop compensation maybe. That is easy and stable.
But I don't have the big picture of what you're trying to do.
--
John Larkin Highland Technology, Inc
picosecond timing precision measurement
jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com