Reply by Phil Hobbs May 9, 20142014-05-09
On 5/9/2014 8:51 AM, George Herold wrote:
> On Thursday, May 8, 2014 5:14:27 PM UTC-4, Phil Hobbs wrote: >> On 05/08/2014 04:02 PM, John Larkin wrote: >> > <snip> >>> Are you using the single amp with +-1 switched gain, or muxing between >>> sig+ and sig-, or something else? >> >> A quad SPST package, set up as two pairs that alternate between signal >> and ground, 180 degrees out of phase, with a diff amp on the output for >> extra room light rejection. That was simpler since the supplies are +5 >> and ground. Back in the day I'd have made +- copies using a >> >> The CPLD supplies the four switch signals, which use 10 states: four >> high, four low, and two with all switches off to let the amplifiers >> settle in between. After the switch-selected N cycles of that (2 <= N >> <= 255), it waits another cycle's worth for the track/hold to settle, >> then fires of the ADC and resets the lock-in caps for next time. > > Yumm, that may not be the secret sauce, but it still tastes good! > (thanks for sharing) > So why 10? I was thinking it would be nice to have both quadratures, > and if you did something dividable by 4 (8, 12, 16) that might be easier. > > George H.
I thought about that. In order to have true quadrature, the slew states of one phase have to coincide with the centre of the other phase's conduction periods, i.e. you need an odd number of cycles in the conduction periods. I could have gone to 8 states, S + + + S - - - S + + + + + S - - - S + + + S - but still didn't have enough macrocells for both channels to fit in this CPLD. It's easy to change the Verilog, but it would also need a different part. Since my most recent previous PLD was a 22V10, I wanted to stick with this one since I have a Dangerous Prototypes breakout board for it. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Reply by George Herold May 9, 20142014-05-09
On Thursday, May 8, 2014 5:14:27 PM UTC-4, Phil Hobbs wrote:
> On 05/08/2014 04:02 PM, John Larkin wrote: >
<snip>
> > Are you using the single amp with +-1 switched gain, or muxing between > > sig+ and sig-, or something else? > > A quad SPST package, set up as two pairs that alternate between signal > and ground, 180 degrees out of phase, with a diff amp on the output for > extra room light rejection. That was simpler since the supplies are +5 > and ground. Back in the day I'd have made +- copies using a > > The CPLD supplies the four switch signals, which use 10 states: four > high, four low, and two with all switches off to let the amplifiers > settle in between. After the switch-selected N cycles of that (2 <= N > <= 255), it waits another cycle's worth for the track/hold to settle, > then fires of the ADC and resets the lock-in caps for next time.
Yumm, that may not be the secret sauce, but it still tastes good! (thanks for sharing) So why 10? I was thinking it would be nice to have both quadratures, and if you did something dividable by 4 (8, 12, 16) that might be easier. George H.
> > I have a bunch of uses for it already. The clients are happy, because I > spread the design cost across three projects, and only minor > > customization is needed for the others. It's really a nice gizmo > > because all the ripple components are always in the same phase, so > > there's no jitter to speak of, and because waiting for the amps to > > settle on each half-cycle gets rid of the slew nonlinearity altogether. > > > > Cheers > > > > Phil Hobbs > > > > > > -- > > Dr Philip C D Hobbs > > Principal Consultant > > ElectroOptical Innovations LLC > > Optics, Electro-optics, Photonics, Analog Electronics > > > > 160 North State Road #203 > > Briarcliff Manor NY 10510 > > > > hobbs at electrooptical dot net > > http://electrooptical.net
Reply by George Herold May 9, 20142014-05-09
On Thursday, May 8, 2014 3:50:37 PM UTC-4, Phil Hobbs wrote:
> On 05/08/2014 03:40 PM, George Herold wrote:
<snip>
> > be OK.. Are there any newer lock-in chips besides the AD630? Or does > > everyone do this in software these days? (For now I can use my > > digital scope as a lockin.) > > Muxes have gotten so good that there isn't that much call for dedicated > lock-ins or (slow) sample/hold chips any more, at least if you can live > with a single 5V supply. My little boxcar lock-in board (that
So just roll my own... that's OK, certainly cheaper than the AD630.
> Beautiful Layout Hunchback just generated Gerbers for) uses DG2042s for > both. They look amazing in the datasheet, and hopefully are equally so > in real life. We'll see in a week's time.
Well just don't fire it up on friday afternoon, unless you want to spend the weekend thinking about it :^) I guess that doesn't apply to you, for whom every day is Saturday. George h.
> > > > Cheers > > > > Phil Hobbs > > > > -- > > Dr Philip C D Hobbs > > Principal Consultant > > ElectroOptical Innovations LLC > > Optics, Electro-optics, Photonics, Analog Electronics > > > > 160 North State Road #203 > > Briarcliff Manor NY 10510 > > > > hobbs at electrooptical dot net > > http://electrooptical.net
Reply by Phil Hobbs May 8, 20142014-05-08
On 05/08/2014 04:02 PM, John Larkin wrote:
> On Thu, 08 May 2014 15:50:37 -0400, Phil Hobbs > <pcdhSpamMeSenseless@electrooptical.net> wrote: > >> On 05/08/2014 03:40 PM, George Herold wrote: >>> On Thursday, May 8, 2014 3:01:04 PM UTC-4, John Larkin wrote: >>>> On Thu, 8 May 2014 10:54:50 -0700 (PDT), George Herold >>> >>>>> Hmm Maybe I should get one. >>>> >>>> Yes. They really rock. the low range is 1 pF full-scale. >>>> >>>> I like the analog-meter versions. >>> Yup. I like meters too. >>>> >>>> >>>> >>>> >>>> >>>> >>>>> But I was thinking of a circuit that might go into something we >>>>> sell. >>>> >>>>> >>>> >>>>> I notice the Boonton has synchronous detection. >>>> >>>>> >>>> >>>>> http://exodus.poly.edu/~kurt/manuals/manuals/Other/BOONTON%2072B%20Instruction.pdf >>>>> >>>>> >>>>> >> Is that how they take care of the phase angle? >>>>> (maybe I can just implement that in my labview software, ducking >>>>> :^) >>>> >>>> Yes. They use a low-level sinewave drive (20 or 100 mV, I think, >>>> on different versions, semiconductor-friendly), tuned circuit amp, >>>> and synchronous detector. >>> >>> Hmm, Yeah I'll have to keep the drive low, 100 mV might be a lot if >>> I'm looking at a diode near zero bias. A little lock-in thing might >>> be OK.. Are there any newer lock-in chips besides the AD630? Or does >>> everyone do this in software these days? (For now I can use my >>> digital scope as a lockin.) >> >> Muxes have gotten so good that there isn't that much call for dedicated >> lock-ins or (slow) sample/hold chips any more, at least if you can live >> with a single 5V supply. My little boxcar lock-in board (that >> Beautiful Layout Hunchback just generated Gerbers for) uses DG2042s for >> both. They look amazing in the datasheet, and hopefully are equally so >> in real life. We'll see in a week's time. >> >> Cheers >> >> Phil Hobbs > > The Brat has evolved a pre-gerber checklist, to catch the zillions of > things that can go wrong. I'll ask her if she'll share it.
That would help a good deal. This is only Magdalen's second client board. The first one was a 3 GHz difference amp that wound up needing a bunch of bandaids, but that was my fault not hers.
> > Are you using the single amp with +-1 switched gain, or muxing between > sig+ and sig-, or something else?
A quad SPST package, set up as two pairs that alternate between signal and ground, 180 degrees out of phase, with a diff amp on the output for extra room light rejection. That was simpler since the supplies are +5 and ground. Back in the day I'd have made +- copies using a The CPLD supplies the four switch signals, which use 10 states: four high, four low, and two with all switches off to let the amplifiers settle in between. After the switch-selected N cycles of that (2 <= N <= 255), it waits another cycle's worth for the track/hold to settle, then fires of the ADC and resets the lock-in caps for next time. I have a bunch of uses for it already. The clients are happy, because I spread the design cost across three projects, and only minor customization is needed for the others. It's really a nice gizmo because all the ripple components are always in the same phase, so there's no jitter to speak of, and because waiting for the amps to settle on each half-cycle gets rid of the slew nonlinearity altogether. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Reply by Tim Williams May 8, 20142014-05-08
"George Herold" <gherold@teachspin.com> wrote in message 
news:d88c274f-a315-4bbc-b097-2d7be0ffd13c@googlegroups.com...
> So you did a square pulse or some such of current and then measured the > final voltage? (after some known pulse time.) > That's not going to work for me > (I don't think.) There could be some series or parallel resistance. > I think they even take data with the diode slightly forward biased.. > like > 100mV or so.
Not pulsed, the CCS was constant and a switch reset it periodically (namely, the transistor itself). And yeah, the other thing that won't work, leakage... ESR wouldn't be a problem, so long as current is small enough. That's like with supercaps for memory backup... you can get farads and kohms, so it doesn't much look like a capacitor at much of any frequency.
> OK.. data looks a little noisy. (no offense intended.)
No offense taken. Consider it left in to emphasize the inherent variation in such a measurement (derivatives being what they are). A smoothed curve lies. Like a woman with makeup. :)
>> Curiously, the data best fit a two part piecewise exponential. The >> actual >> "best fit" function I used resembles JT's obsession with hyperbolic >> functions, though I believe I did this work before he started babbling >> about them here. Oh well, it's just functions, whatever works best. >> > For the diode's it goes as 1/V**2 or something like that. I can pull > out > the carrier density if I know the area.
This MOSFET doesn't fit into the usual junction abruptness scheme, because it's a superjunction type. The junction is thin and dense "up close" (below 20V or so), then just kind of snaps open as the barrier edge expands through a near-intrinsic region. The difference is, it's columns of p- and n-, not actually intrinsic. I forget how it's supposed to respond differently than a PIN junction, but it's always distinctive on datasheets: in particular, the reverse transfer capacitance is dramatically low (a few pF by 50V?), and almost always shown to rise slightly at higher voltages (a few pF more by 200-500V?). These are 600V+ class MOS devices (the structure apparently isn't as valuable below 200V or so). The huge low-voltage capacitance means turn-off Miller effect and all occurs at low voltages; it looks like a shottky diode (which is also pretty dramatic in capacitance, though more in magnitude than abruptness), which is to say it's like diode recovery, except occuring over higher voltages (say, 0-20V, rather than -2 to 0). If you graph the time series I attached, for instance, you can see this. They also tend to show full DC SOAs, in contrast to most VDMOS which do not (MOSFETs having no "second breakdown" was only true back in the days of ancient lateral DMOS and early VMOS). I wonder if the combination of low capacitance and DC SOA is at all attractive for RF purposes? Tim -- Seven Transistor Labs Electrical Engineering Consultation Website: http://seventransistorlabs.com
Reply by John Larkin May 8, 20142014-05-08
On Thu, 08 May 2014 15:50:37 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

>On 05/08/2014 03:40 PM, George Herold wrote: >> On Thursday, May 8, 2014 3:01:04 PM UTC-4, John Larkin wrote: >>> On Thu, 8 May 2014 10:54:50 -0700 (PDT), George Herold >> >>>> Hmm Maybe I should get one. >>> >>> Yes. They really rock. the low range is 1 pF full-scale. >>> >>> I like the analog-meter versions. >> Yup. I like meters too. >>> >>> >>> >>> >>> >>> >>>> But I was thinking of a circuit that might go into something we >>>> sell. >>> >>>> >>> >>>> I notice the Boonton has synchronous detection. >>> >>>> >>> >>>> http://exodus.poly.edu/~kurt/manuals/manuals/Other/BOONTON%2072B%20Instruction.pdf >>>> >>>> >>>> >Is that how they take care of the phase angle? >>>> (maybe I can just implement that in my labview software, ducking >>>> :^) >>> >>> Yes. They use a low-level sinewave drive (20 or 100 mV, I think, >>> on different versions, semiconductor-friendly), tuned circuit amp, >>> and synchronous detector. >> >> Hmm, Yeah I'll have to keep the drive low, 100 mV might be a lot if >> I'm looking at a diode near zero bias. A little lock-in thing might >> be OK.. Are there any newer lock-in chips besides the AD630? Or does >> everyone do this in software these days? (For now I can use my >> digital scope as a lockin.) > >Muxes have gotten so good that there isn't that much call for dedicated >lock-ins or (slow) sample/hold chips any more, at least if you can live >with a single 5V supply. My little boxcar lock-in board (that >Beautiful Layout Hunchback just generated Gerbers for) uses DG2042s for >both. They look amazing in the datasheet, and hopefully are equally so >in real life. We'll see in a week's time. > >Cheers > >Phil Hobbs
The Brat has evolved a pre-gerber checklist, to catch the zillions of things that can go wrong. I'll ask her if she'll share it. Are you using the single amp with +-1 switched gain, or muxing between sig+ and sig-, or something else? -- John Larkin Highland Technology, Inc jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
Reply by Phil Hobbs May 8, 20142014-05-08
On 05/08/2014 03:40 PM, George Herold wrote:
> On Thursday, May 8, 2014 3:01:04 PM UTC-4, John Larkin wrote: >> On Thu, 8 May 2014 10:54:50 -0700 (PDT), George Herold > >>> Hmm Maybe I should get one. >> >> Yes. They really rock. the low range is 1 pF full-scale. >> >> I like the analog-meter versions. > Yup. I like meters too. >> >> >> >> >> >> >>> But I was thinking of a circuit that might go into something we >>> sell. >> >>> >> >>> I notice the Boonton has synchronous detection. >> >>> >> >>> http://exodus.poly.edu/~kurt/manuals/manuals/Other/BOONTON%2072B%20Instruction.pdf >>> >>> >>>
Is that how they take care of the phase angle?
>>> (maybe I can just implement that in my labview software, ducking >>> :^) >> >> Yes. They use a low-level sinewave drive (20 or 100 mV, I think, >> on different versions, semiconductor-friendly), tuned circuit amp, >> and synchronous detector. > > Hmm, Yeah I'll have to keep the drive low, 100 mV might be a lot if > I'm looking at a diode near zero bias. A little lock-in thing might > be OK.. Are there any newer lock-in chips besides the AD630? Or does > everyone do this in software these days? (For now I can use my > digital scope as a lockin.)
Muxes have gotten so good that there isn't that much call for dedicated lock-ins or (slow) sample/hold chips any more, at least if you can live with a single 5V supply. My little boxcar lock-in board (that Beautiful Layout Hunchback just generated Gerbers for) uses DG2042s for both. They look amazing in the datasheet, and hopefully are equally so in real life. We'll see in a week's time. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Reply by George Herold May 8, 20142014-05-08
On Thursday, May 8, 2014 3:01:04 PM UTC-4, John Larkin wrote:
> On Thu, 8 May 2014 10:54:50 -0700 (PDT), George Herold
> >Hmm Maybe I should get one. > > Yes. They really rock. the low range is 1 pF full-scale. > > I like the analog-meter versions.
Yup. I like meters too.
> > > > > > > >But I was thinking of a circuit that might go into something we sell. > > > > > >I notice the Boonton has synchronous detection. > > > > > >http://exodus.poly.edu/~kurt/manuals/manuals/Other/BOONTON%2072B%20Instruction.pdf > > > >Is that how they take care of the phase angle? > >(maybe I can just implement that in my labview software, > >ducking :^) > > Yes. They use a low-level sinewave drive (20 or 100 mV, I think, on > different versions, semiconductor-friendly), tuned circuit amp, and > synchronous detector.
Hmm, Yeah I'll have to keep the drive low, 100 mV might be a lot if I'm looking at a diode near zero bias. A little lock-in thing might be OK.. Are there any newer lock-in chips besides the AD630? Or does everyone do this in software these days? (For now I can use my digital scope as a lockin.) George H.
> > > > > > -- > > > > John Larkin Highland Technology, Inc > > > > jlarkin att highlandtechnology dott com > > http://www.highlandtechnology.com
Reply by Phil Hobbs May 8, 20142014-05-08
On 05/08/2014 01:54 PM, George Herold wrote:
> On Thursday, May 8, 2014 12:48:29 PM UTC-4, Phil Hobbs wrote: >> On 05/08/2014 12:44 PM, George Herold wrote: >> >>> >> >>> Hi all, I want to do some CV (capacitance vs voltage) measurements >> >>> On some diodes and things. >> >>> I drew up this, >> >>> https://www.dropbox.com/s/tnn1mb4o41iqno9/DSCF0008.JPG >> >>> >> >>> Pretty much brute force. >> >>> (I sometimes get the feeling that opamps are the only tool I know.) >> >>> I don't really like putting the bias and modulation through the same opamp. >> >>> Any other ideas? >> >>> (I don't want to go the transformer route.) >> >>> >> >>> Thanks >> >>> George H. >> >>> >> >> >> >> Get a Boonton 72 off eBay for ~$100. They have external DC bias inputs, >> and work really really well. > > Hmm Maybe I should get one. > But I was thinking of a circuit that might go into something we sell. > > I notice the Boonton has synchronous detection. > > http://exodus.poly.edu/~kurt/manuals/manuals/Other/BOONTON%2072B%20Instruction.pdf > > Is that how they take care of the phase angle? > (maybe I can just implement that in my labview software, > ducking :^) >
Ducking won't help. Labview is like an explosion in a sewage treatment plant. There's no place to hide. ;) Synchronous detection helps a lot, because if you're just using amplitude, your resolution falls off quadratically as you go away from omega RC = 1. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Reply by George Herold May 8, 20142014-05-08
On Thursday, May 8, 2014 2:54:43 PM UTC-4, Tim Williams wrote:
> "George Herold" <gherold@teachspin.com> wrote in message > > news:5a9d7273-c971-42ba-8b79-623471898a6a@googlegroups.com... > > > > > > Hi all, I want to do some CV (capacitance vs voltage) measurements > > > On some diodes and things. > > > I drew up this, > > > https://www.dropbox.com/s/tnn1mb4o41iqno9/DSCF0008.JPG > > > > > > Pretty much brute force. > > > (I sometimes get the feeling that opamps are the only tool I know.) > > > I don't really like putting the bias and modulation through the same > > > opamp. > > > Any other ideas? > > > (I don't want to go the transformer route.) > > > > > > Thanks > > > George H. > > > > Last time I did that, I used a CCS and measured dV/dt. The CCS was > verified to have good compliance and stability, and the rig was tested for > intrinsic capacitance (over the voltage range, it was pretty stable in the > 60-70pF range).
So you did a square pulse or some such of current and then measured the final voltage? (after some known pulse time.) That's not going to work for me (I don't think.) There could be some series or parallel resistance. I think they even take data with the diode slightly forward biased.. like 100mV or so.
> It was also verified that switching was complete by the > time data collection began (base/gate voltage at zero, charge injection > died out), so that the data is not affected by Miller effect of the > switching device. > > > Here's a calculated result (jig capacitance not subtracted out), overlaid > with the datasheet graph, which I suspect contains a graphical error. > http://seventransistorlabs.com/Images/STP19NM50N_Cdss_Overlay.jpg
OK.. data looks a little noisy. (no offense intended.)
> > > Curiously, the data best fit a two part piecewise exponential. The actual > "best fit" function I used resembles JT's obsession with hyperbolic > functions, though I believe I did this work before he started babbling > about them here. Oh well, it's just functions, whatever works best. >
For the diode's it goes as 1/V**2 or something like that. I can pull out the carrier density if I know the area.
> > Raw data follows below as an example. > > > > This works nice for things with integrated switching capability (like > > MOSFETs..). A very low-C rig could be made, or bootstrapped in some way > > perhaps, for use with low capacitance transistors and diodes. > > > > Even then, the accuracy gets questionable down in the single digit pF. > It's probably not so great around hysteresis (ceramic caps) either. In > these cases, a more traditional "bias tee" approach would probably be > better. >
Thanks for the response. George H.
> > > Tim > > > > -- > > Seven Transistor Labs > > Electrical Engineering Consultation > > Website: http://seventransistorlabs.com > > > > > > STP19NM50N > > Current 0.883 mA > > Time (us) Volts (V) > > 0 0 > > 1 0.5 > > 2 0.5 > > 3 0.4 > > 4 0.3 > > 5 0.2 > > 6 0 > > 7 0.2 > > 8 0.3 > > 9 0.5 > > 10 0.6 > > 11 0.8 > > 12 1 > > 13 1.3 > > 14 1.5 > > 15 1.8 > > 16 2 > > 17 2.3 > > 18 2.5 > > 19 2.9 > > 20 3.2 > > 21 3.4 > > 22 3.7 > > 23 4.1 > > 24 4.6 > > 25 4.9 > > 26 5.3 > > 27 5.7 > > 28 6.1 > > 29 6.6 > > 30 6.9 > > 31 7.4 > > 32 7.8 > > 33 8.3 > > 34 8.8 > > 35 9.3 > > 36 9.8 > > 37 10.3 > > 38 10.8 > > 39 11.4 > > 40 11.9 > > 45 14.9 > > 50 18.6 > > 55 23.9 > > 60 31.8 > > 65 44 > > 70 69 > > 75 101.2 > > 80 0