On Sun, 9 Jun 2013 12:08:01 -0700 (PDT), Robert Macy
<robert.a.macy@gmail.com> wrote:
>On Jun 8, 4:35�pm, rickman <gnu...@gmail.com> wrote:
>>> ...big snip...
>> Robert wrote:
>> > is it possible to 'pull' those crystals 1kHz with only 8pF? probably
>> > not.
>> > What does LTspice show?
>>
>> Good luck on that. �I don't think there are any good LTspice models for
>> crystals... at least not the ones I wanted to simulate. �I think they
>> just tell you to construct a cap model using the crystal parameters
>> which most crystal makers don't provide. �A model is only as good as the
>> data.
>>
>> I'd say a test is worth a lot more than a simulation in this case.
>>
>> --
>>
>> Rick
>
>I once got 'bit' by cheap suppliers that produced poorly ground
>crystals. talk about spurious oscillation frequencies! more than 1
>1/2% off sometimes. If you could get them to oscillate at the 'right'
>freq they were fine, somewhat.
>
>I liked simulation to show what could happen during Production with
>full ranges of tolerances, and then redesign to be able to absorb
>anything the vendors sent, well almost.
>
>Always asked the Engineers, SAY what you're going to do, DO what you
>said you'd do, and then PROVE you did it. THEN designs woud smoothly
>transition into Production.
>
>found them!
>
>these models are based upon lower frequency crystal models included in
>the MicroSim's Library for Crystals representing AT cut
>
>with the inforrmative header:
>* Release date: September 1987
>
>* The parameters in this model library were derived from:
>*
>* Quartz-crystal timing accuracy
>* Electonic Design 2, January 19, 1976; pp. 74-79
>*
>* and:
>*
>* Electronics Designers' Handbook, Second Edition
>* edited by L.J. Giacoletto
>* McGraw-Hill Book Co., 1977, pp. 16-16 to 16-31
>
>* Example use: X3 3 4 QZ32768
>
>* Notes:
>* 1) Temperature variation of resonant frequency for properly cut
>* crystals is quadratic. The coefficient depends on the cut used
>* and is implemented in these subcircuits by giving the equivalent
>* inductor a temperature coefficient. The AT cut is an exception,
>* and has a cubic temperature dependence which is not included in
>* these models.
>* 2) The values of lqz, cs, and cp do not vary much from one crystal
>* to the next. The value of rqz, however, can vary as much as a
>* factor of 2 up or down. So the crystal's Q can vary over a
>* range of 4 to 1.
>* 3) Parallel resonant crystals can be tuned slightly by attaching an
>* external capacitor in parallel with the crystal. The crystal's
>* frequency is built assuming a value of the external capacitor,
>* called the "calibration capacitance". Its value is noted in
>* the comment at the head of each parallel resonant crystal model.
>and includes this one:
>* 10Mhz frequency standard, AT cut, parallel resonant, Q=25000
>* calibration capacitance = 50pf
>.subckt QZP10MEG 1 2
>*
> lqz 1 11 2.54647909e-003
> cs 11 12 9.96041181e-014
> rqz 12 2 6.4
> cp 1 2 2.49010295e-011
>.ends
>
>
>
>
>the following models I created based upon some samples sent to a
>friend of mine:
>
>* 20MHz Ethernet crystal for parallel operation
>* #1 Crystal
>*
>* 20Mhz frequency standard, unknown cut, parallel resonant, Q=??
>* calibration capacitance = ?? 50pf
>*
>.SUBCKT QZP20A 1 2
>*
> LQZ 1 11 3.33181E-03
> CS 11 12 19.0069E-15
> RQZ 12 2 6.45805
> CP 1 2 4.65668E-12
>.ENDS
>* #2 Crystal
>*
>* 20Mhz frequency standard, unknown cut, parallel resonant, Q=??
>* calibration capacitance = ?? 50pf
>*
>.SUBCKT QZP20B 1 2
>*
> LQZ 1 11 3.26998E-03
> CS 11 12 19.3664E-15
> RQZ 12 2 7.38786
> CP 1 2 4.59108E-12
>.ENDS
But that does not include the temperature variation.
PSpice allows a linear and a quadratic TC term in-line with the
instantiation, which I'd guess can be easily fit to AT-cut data.
My (un-TC'd) Spice crystal model...
******************************************************************
.SUBCKT MyXTAL 1 2 PARAMS: Fo=10Meg Cp=5pF Rs=100 Q=25K Series=0
.PARAM P1={6.283185*Fo}
.PARAM P2={Q*Rs}
R1 1 3 {Rs}
C1 1 2 {Cp}
L1 4 2 {P2/P1}
C2 3 4 {1/(P1*P2-(1-Series)/Cp)}
.ENDS MyXTAL
******************************************************************
...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85140 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
Reply by Robert Macy●June 9, 20132013-06-09
On Jun 8, 4:35=A0pm, rickman <gnu...@gmail.com> wrote:
>> ...big snip...
> Robert wrote:
> > is it possible to 'pull' those crystals 1kHz with only 8pF? probably
> > not.
> > What does LTspice show?
>
> Good luck on that. =A0I don't think there are any good LTspice models for
> crystals... at least not the ones I wanted to simulate. =A0I think they
> just tell you to construct a cap model using the crystal parameters
> which most crystal makers don't provide. =A0A model is only as good as th=
e
> data.
>
> I'd say a test is worth a lot more than a simulation in this case.
>
> --
>
> Rick
I once got 'bit' by cheap suppliers that produced poorly ground
crystals. talk about spurious oscillation frequencies! more than 1
1/2% off sometimes. If you could get them to oscillate at the 'right'
freq they were fine, somewhat.
I liked simulation to show what could happen during Production with
full ranges of tolerances, and then redesign to be able to absorb
anything the vendors sent, well almost.
Always asked the Engineers, SAY what you're going to do, DO what you
said you'd do, and then PROVE you did it. THEN designs woud smoothly
transition into Production.
found them!
these models are based upon lower frequency crystal models included in
the MicroSim's Library for Crystals representing AT cut
with the inforrmative header:
* Release date: September 1987
* The parameters in this model library were derived from:
*
* Quartz-crystal timing accuracy
* Electonic Design 2, January 19, 1976; pp. 74-79
*
* and:
*
* Electronics Designers' Handbook, Second Edition
* edited by L.J. Giacoletto
* McGraw-Hill Book Co., 1977, pp. 16-16 to 16-31
* Example use: X3 3 4 QZ32768
* Notes:
* 1) Temperature variation of resonant frequency for properly cut
* crystals is quadratic. The coefficient depends on the cut used
* and is implemented in these subcircuits by giving the equivalent
* inductor a temperature coefficient. The AT cut is an exception,
* and has a cubic temperature dependence which is not included in
* these models.
* 2) The values of lqz, cs, and cp do not vary much from one crystal
* to the next. The value of rqz, however, can vary as much as a
* factor of 2 up or down. So the crystal's Q can vary over a
* range of 4 to 1.
* 3) Parallel resonant crystals can be tuned slightly by attaching an
* external capacitor in parallel with the crystal. The crystal's
* frequency is built assuming a value of the external capacitor,
* called the "calibration capacitance". Its value is noted in
* the comment at the head of each parallel resonant crystal model.
and includes this one:
* 10Mhz frequency standard, AT cut, parallel resonant, Q=3D25000
* calibration capacitance =3D 50pf
.subckt QZP10MEG 1 2
*
lqz 1 11 2.54647909e-003
cs 11 12 9.96041181e-014
rqz 12 2 6.4
cp 1 2 2.49010295e-011
.ends
the following models I created based upon some samples sent to a
friend of mine:
* 20MHz Ethernet crystal for parallel operation
* #1 Crystal
*
* 20Mhz frequency standard, unknown cut, parallel resonant, Q=3D??
* calibration capacitance =3D ?? 50pf
*
.SUBCKT QZP20A 1 2
*
LQZ 1 11 3.33181E-03
CS 11 12 19.0069E-15
RQZ 12 2 6.45805
CP 1 2 4.65668E-12
.ENDS
* #2 Crystal
*
* 20Mhz frequency standard, unknown cut, parallel resonant, Q=3D??
* calibration capacitance =3D ?? 50pf
*
.SUBCKT QZP20B 1 2
*
LQZ 1 11 3.26998E-03
CS 11 12 19.3664E-15
RQZ 12 2 7.38786
CP 1 2 4.59108E-12
.ENDS
Reply by Fred Abse●June 9, 20132013-06-09
On Sat, 08 Jun 2013 19:35:33 -0400, rickman wrote:
> Good luck on that. I don't think there are any good LTspice models for
> crystals... at least not the ones I wanted to simulate. I think they
> just tell you to construct a cap model using the crystal parameters
> which most crystal makers don't provide. A model is only as good as the
> data.
Roll your own. A combination of capacitance, inductance, and resistance.
What else do you need?
If you have insufficient data - measure...
--
"For a successful technology, reality must take precedence
over public relations, for nature cannot be fooled."
(Richard Feynman)
Reply by rickman●June 8, 20132013-06-08
On 6/8/2013 8:54 AM, Robert Macy wrote:
> On Jun 6, 2:55 pm, "P E Schoen"<p...@peschoen.com> wrote:
>> For most of my projects I use either a 14.7456 MHz crystal (57600*256) or
>> 20.000 MHz (for USB 96 MHz 24*f/5). The 20 MHz crystal I am using specifies
>> a 20 pF parallel load, but my boards have 12 pF capacitors. I just noticed
>> this and I think the value had been selected for a previous brand of
>> crystal, but the oscillator frequencies measure pretty close to the ideal
>> value, as follows for five boards:
>>
>> Board 1: 20.00258 +0.013% 130PPM
>> Board 2: 20.00039 +0.002% 20PPM
>> Board 3: 20.00068 +0.003% 30PPM
>> Board 4: 20.00085 +0.004% 40PPM
>> Board 5: 20.00073 +0.004% 40PPM
>>
>> My specification is 0.02%, or 200 PPM, so all are within spec, but perhaps
>> with the 20 pF capacitors the frequency will be much closer and variation
>> will be positive and negative. But the application notes I found seem a bit
>> confusing as to the correct way to figure the load capacitance:
>>
>> http://www.statek.com/pdf/tn33.pdfhttp://www.foxonline.com/pdfs/xtaldesignnotes.pdfhttp://www.oscilent.com/spec_pages/PNDescrpt/Load_Cap.htm
>>
>> It seems that the capacitance is determined by:
>>
>> CL = (CL1*CL2)/(CL1+CL2)+CS
>>
>> Where CL1 and CL2 are the load capacitors and CS is the stray capacitance,
>> generally figured about 5 pF. So with my 12 pF capacitors the actual CL = 11
>> pF and with 20 pF capacitors CL = 15 pF and with 47 pF capacitors (as I
>> think I used at one time), CL = 28.5 pF. The ideal value appears to be 30
>> pF. I don't know the actual stray capacitance, but it is a double sided
>> board with 0805 SMT capacitors and a PIC18F4455 microcontroller in a TQFP-44
>> package. It has a value of 15 pF or the OSC2 pin but this is characterized
>> for external clock drive into OSC1.
>>
>> I think the 12 pF capacitors are OK but I think I will try changing to 20 pF
>> and see if the frequency comes in closer. The crystal itself is rated 30 PPM
>> and 100 PPM over the temperature range. Except for board #1, I'm just about
>> there.
>>
>> But the CL formula seems a bit strange. Usually, when I see product over
>> sum, its square root is taken, as for parallel resistors. And if one of the
>> capacitors is zero, the other apparently has no effect, and that just seems
>> wrong.
>>
>> Paul
>
> is it possible to 'pull' those crystals 1kHz with only 8pF? probably
> not.
> What does LTspice show?
Good luck on that. I don't think there are any good LTspice models for
crystals... at least not the ones I wanted to simulate. I think they
just tell you to construct a cap model using the crystal parameters
which most crystal makers don't provide. A model is only as good as the
data.
I'd say a test is worth a lot more than a simulation in this case.
--
Rick
Reply by rickman●June 8, 20132013-06-08
On 6/8/2013 2:06 AM, Jan Panteltje wrote:
> On a sunny day (Fri, 07 Jun 2013 20:59:27 +0100) it happened John Devereux
> <john@devereux.me.uk> wrote in<87ehcditeo.fsf@devereux.me.uk>:
>
>> Jan Panteltje<pNaonStpealmtje@yahoo.com> writes:
>>
>>> On a sunny day (Fri, 07 Jun 2013 19:55:42 +0100) it happened John Devereux
>>> <john@devereux.me.uk> wrote in<87ip1piwcx.fsf@devereux.me.uk>:
>>>
>>>> He said 0.02% for the final frequency, not the capacitance tolerance!
>>>
>>> I am missing a temperature spec in all this.
>>> When I tried to calibrate my little PIC frequency counter against a Rubidium standard by adding caps,
>>> I found that a few degrees Celsius temperature change makes a lot of difference.
>>> Zero tc caps may help, trimmers are useful as others pointed out.
>>
>> Caps that value are usually "zero TC" anyway aren't they?
>
> No no, the small disk ceramics of a few pF drift a lot.
That's like saying, cars go really slow, you know, the ones with wheels
on all four corners. Do you have any idea of the type of cap on the
inside?
--
Rick
Just remember that the various frequency errors are additive including
the aging spec which is often the worst one of the bunch considered over
a few years.
--
Rick
Reply by rickman●June 8, 20132013-06-08
On 6/7/2013 8:05 PM, bloggs.fredbloggs.fred@gmail.com wrote:
>
> Another consideration is the phase delay introduced by the gates internal to the PIC. If these are running at say 10ns, that is 10/50 x 360=72o in addition to the 180o inversion. The Pierce allows for 90o from the crystal and points forward, so with the additional 72o, that leaves just 18o shift from the crystal. As the PIC gate Tpd moves around with temperature ( a minuscule amount), so does the phase shift across the crystal, and so does the loop frequency. If you model the crystal as series LC , all paralleled with load C, with assumed Q and look at phase versus delta-f/fo, that is chnage in phase as a function of ratio of frequency perturbation to resonant frequency ( the most popular plot), that will give an idea of how the oscillator loop frequency pulls with its phase shift.
> I think Co in that manufacturer's pulling equation is also called header capacitance, or the net capacitance between the metalization of the crystal and the conductive housing.
They often claim C0 is due to the case, etc, but the source is
irrelevant. The values are part of a model that seems to work fairly
well regardless of exactly where it comes from.
I seem to recall that one of the two capacitances, the "motional"
capacitance IIRC, is very small, typically in the fF range. So that
might be C1. Assuming it is 27 pF is likely a major source of error.
Some crystal makers give all the data needed to verify that you are
designing the oscillator correctly, but many don't.
--
Rick
Reply by Jan Panteltje●June 8, 20132013-06-08
On a sunny day (Sat, 08 Jun 2013 20:27:30 +0100) it happened Mike Perkins
<spam@spam.com> wrote in <BeqdnWhjoo46GC7MnZ2dnUVZ8madnZ2d@bt.com>:
>>> I would have assumed that drift as function of temperature would
>>> be more likely be down to the PIC itself, where the speed, gain
>>> and threshold of the semiconductor would be far more sensitive on
>>> temperature, and far outweigh any change in capacitance or crystal
>>> frequency.
>>
>> Yes, possible. I noticed the drift when soldering different caps to
>> the combination crystal+PIC+caps:
>> http://panteltje.com/panteltje/pic/freq_pic/frequency_meter_before_closing_case_img_1536.jpg
>> http://panteltje.com/panteltje/pic/freq_pic/
>> Had to wait several minutes for it to stabilize. It is actually a
>> really nice frequency counter that takes up very little space, but
>> only calibrated at room temperature. IIRC have seen temperature
>> drift in other applications with these sort of caps too.
>>
>
>Neat - it is cheating to measure its own frequency!!
Interesting is why it does not measure 20.000... but one lower :-)
Yes, links change, this project is already a few years old.
I do not always keep up with those changes...
I think if you google dl4yhf (callsign) it will show up, lemme try:
http://www.qsl.net/dl4yhf/freq_counter/freq_counter.html
Moved to qsl.net...
Reply by Mike Perkins●June 8, 20132013-06-08
On 08/06/2013 18:56, Jan Panteltje wrote:
> On a sunny day (Sat, 08 Jun 2013 18:45:49 +0100) it happened Mike
> Perkins <spam@spam.com> wrote in
> <2eednSU9AtZP8C7MnZ2dnUVZ8kqdnZ2d@bt.com>:
>
>> On 08/06/2013 07:03, Jan Panteltje wrote:
>>> On a sunny day (Fri, 7 Jun 2013 17:19:06 -0400) it happened "P E
>>> Schoen" <paul@peschoen.com> wrote in
>>> <kotig8$l2a$1@dont-email.me>:
>>>
>>>> "Mike Perkins" wrote in message
>>>> news:etqdnZyoWrW73S_MnZ2dnUVZ7sWdnZ2d@bt.com...
>>>>
>>>>> If its a genuine AT cut crystal then I would have hoped for a
>>>>> quite =
>>>> good
>>>>> performance for just a small temperature change.
>>>>
>>>>> http://cfm.citizen.co.jp/english/product/cvo_character.html
>>>>
>>>> The ECS crystals I'm using are 100 PPM over -40 to +85 C, with
>>>> initial tolerance of 30 PPM. Not bad for less than a dollar:
>>>> http://www.mouser.com/ds/2/122/hc-49usx-dn-16344.pdf
>>>>
>>>> You can get them with as little as 10 PPM tolerance and
>>>> stability, for = about $3 each:
>>>> http://www.mouser.com/ds/2/122/ecx-32-6206.pdf
>>>
>>> I was actually referring to the temperature coefficient of the
>>> caps, not the crystal. And not sure how stable input capacitance
>>> of PIC is versus temperature. Try heating and lowering your
>>> setup 10 degrees and see if it still meets spec.
>>
>> NP0, or C0G specced capacitors should have a capacitance virtually
>> independent of temperature.
>>
>> I would have assumed that drift as function of temperature would
>> be more likely be down to the PIC itself, where the speed, gain
>> and threshold of the semiconductor would be far more sensitive on
>> temperature, and far outweigh any change in capacitance or crystal
>> frequency.
>
> Yes, possible. I noticed the drift when soldering different caps to
> the combination crystal+PIC+caps:
> http://panteltje.com/panteltje/pic/freq_pic/frequency_meter_before_closing_case_img_1536.jpg
> http://panteltje.com/panteltje/pic/freq_pic/
> Had to wait several minutes for it to stabilize. It is actually a
> really nice frequency counter that takes up very little space, but
> only calibrated at room temperature. IIRC have seen temperature
> drift in other applications with these sort of caps too.
>
On a sunny day (Sat, 08 Jun 2013 18:45:49 +0100) it happened Mike Perkins
<spam@spam.com> wrote in <2eednSU9AtZP8C7MnZ2dnUVZ8kqdnZ2d@bt.com>:
>On 08/06/2013 07:03, Jan Panteltje wrote:
>> On a sunny day (Fri, 7 Jun 2013 17:19:06 -0400) it happened "P E
>> Schoen" <paul@peschoen.com> wrote in <kotig8$l2a$1@dont-email.me>:
>>
>>> "Mike Perkins" wrote in message
>>> news:etqdnZyoWrW73S_MnZ2dnUVZ7sWdnZ2d@bt.com...
>>>
>>>> If its a genuine AT cut crystal then I would have hoped for a
>>>> quite =
>>> good
>>>> performance for just a small temperature change.
>>>
>>>> http://cfm.citizen.co.jp/english/product/cvo_character.html
>>>
>>> The ECS crystals I'm using are 100 PPM over -40 to +85 C, with
>>> initial tolerance of 30 PPM. Not bad for less than a dollar:
>>> http://www.mouser.com/ds/2/122/hc-49usx-dn-16344.pdf
>>>
>>> You can get them with as little as 10 PPM tolerance and stability,
>>> for = about $3 each:
>>> http://www.mouser.com/ds/2/122/ecx-32-6206.pdf
>>
>> I was actually referring to the temperature coefficient of the caps,
>> not the crystal. And not sure how stable input capacitance of PIC is
>> versus temperature. Try heating and lowering your setup 10 degrees
>> and see if it still meets spec.
>
>NP0, or C0G specced capacitors should have a capacitance virtually
>independent of temperature.
>
>I would have assumed that drift as function of temperature would be more
>likely be down to the PIC itself, where the speed, gain and threshold of
>the semiconductor would be far more sensitive on temperature, and far
>outweigh any change in capacitance or crystal frequency.