On Wed, 17 Oct 2012 09:13:13 +0200, Marco Trapanese wrote:
> I also got it at the first hit, if you're referring to this page:
>
> http://www.onsemi.com/pub_link/Collateral/TIP122.SP2
>
> but the code inside is quite different than the *.asy files available into
> the lib folder of LTSpice. Here my question.
>
> In fact I've already tried to put the file there calling it tip122.asy.
> But when I select it from LTSpice I got 'Unknown symbol syntax: ".SUBCKT
> Xtip122 1 2 3" '
The file referred is a *subcircuit* file.
.asy files are *symbols*, ie. the shape that shows on a schematic.
Put TIP122.sp2 in /lib/sub, and add the LTspice directive ".lib
TIP122.sp2" to your LTspice schematic.
Use the standard NPN symbol, but don't assign a device model. Instead,
control-right-click on it, which will open a dialog box where you can make
it into an "X" subcircuit device, and set the appropriate parameters.
A good read of the manual will make things clear.
If you use a lot of subcircuit devices, it's a good idea to make a
dedicated "subcircuit npn" symbol.
--
"For a successful technology, reality must take precedence
over public relations, for nature cannot be fooled."
(Richard Feynman)
Reply by Jim Thompson●October 19, 20122012-10-19
On Fri, 19 Oct 2012 00:00:13 -0700, josephkk
<joseph_barrett@sbcglobal.net> wrote:
>On Wed, 17 Oct 2012 11:57:34 -0700, Jim Thompson
><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:
>
>>On Wed, 17 Oct 2012 20:26:17 +0200, "Helmut Sennewald"
>><helmutsennewald@t-online.de> wrote:
>>
>>>
>>>"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> schrieb
>>>im Newsbeitrag news:2urt78tej33lhdhb4ho3dn59q79m8n8a53@4ax.com...
>>>> On Wed, 17 Oct 2012 19:24:35 +0200, "Helmut Sennewald"
>>>> <helmutsennewald@t-online.de> wrote:
>>>>
>>>>>
>>>>>"Jim Thompson" <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> schrieb
>>>>>im Newsbeitrag news:2eit78tt12n6odjq64dctu2a8qe9h7ft28@4ax.com...
>>>>>> On Wed, 17 Oct 2012 09:55:34 +0200, o pere o <me@somewhere.net> wrote:
>>>>>>
>>>>>>>On 10/17/2012 09:13 AM, Marco Trapanese wrote:
>>>>>>>> Il 17/10/2012 08:46, Vlad ha scritto:
>>>>>>>>
>>>>>>>>> For the TIP122, I did a search on Google and I got it within the
>>>>>>>>> first
>>>>>>>>> hit.
>>>>>>>>
>>>>>>>>
>>>>>>>> I also got it at the first hit, if you're referring to this page:
>>>>>>>>
>>>>>>>> http://www.onsemi.com/pub_link/Collateral/TIP122.SP2
>>>>>>>>
>>>>>>>> but the code inside is quite different than the *.asy files available
>>>>>>>> into the lib folder of LTSpice. Here my question.
>>>>>>>>
>>>>>>>> In fact I've already tried to put the file there calling it
>>>>>>>> tip122.asy.
>>>>>>>> But when I select it from LTSpice I got 'Unknown symbol syntax:
>>>>>>>> ".SUBCKT
>>>>>>>> Xtip122 1 2 3" '
>>>>>>>>
>>>>>>>>
>>>>>>>>> As for the worst-case setup, try this link, it has a good
>>>>>>>>> explanation:
>>>>>>>>> k6jca.blogspot.com/2012/07/monte-carlo-and-worst-case-circuit.html
>>>>>>>>
>>>>>>>>
>>>>>>>> Thanks a lot for the link. I'll give it a try.
>>>>>>>>
>>>>>>>> Marco
>>>>>>>>
>>>>>>>>
>>>>>>>
>>>>>>>The link Vlad provided is a Spice subcircuit file. Perhaps this
>>>>>>>http://www.simonbramble.co.uk/lt_spice/ltspice_lt_spice_tutorial_4.htm
>>>>>>>may help you inserting it into LTSpice.
>>>>>>>
>>>>>>>Pere
>>>>>>
>>>>>> Since I work primarily at the device level I literally have hundreds
>>>>>> of libraries. Is there a way in LTspice to call a library by its
>>>>>> PATH, rather than requiring it to be in the same folder as the
>>>>>> schematic?
>>>>>>
>>>>>> ...Jim Thompson
>>>>>> --
>>>>>> | James E.Thompson, CTO | mens |
>>>>>> | Analog Innovations, Inc. | et |
>>>>>> | Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
>>>>>> | Phoenix, Arizona 85048 Skype: Contacts Only | |
>>>>>> | Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
>>>>>> | E-mail Icon at http://www.analog-innovations.com | 1962 |
>>>>>>
>>>>>> I love to cook with wine. Sometimes I even put it in the food.
>>>>>
>>>>>Hello Jim,
>>>>>
>>>>>You can specify a full path.
>>>>>
>>>>>Example:
>>>>>
>>>>>.lib C:\mylib1\mosfet\abc.lib
>>>>>
>>>>>Best regards,
>>>>>Helmut
>>>>>
>>>>
>>>> Is that put in via the so-called "Spice directive"?
>>>>
>>>> ...Jim Thompson
>>>
>>>Hello Jim,
>>>
>>>A SPICE-directive is simply a SPICE-line.
>>>You can either use a SPICE-directive in the schematic or you specify the
>>>full path in the symbol.
>>>
>>>I personally never use a full path name, because I mostly work on chematics
>>>for other users. It's then much more convenient to have all files the folder
>>>of the schemtaic.
>>>
>>>Best regards,
>>>Helmut
>>>
>>
>>Yep. Understood.
>>
>>I work with so many different clients and device libraries that I
>>extensively use a utility "Clip Path"...
>>
>> http://download.cnet.com/ClipPath/3000-2094_4-10050927.html
>>
>>which helps me manage hierarchical schematics (sub-schematics are
>>often in their own folder, due to pre-testing before incorporation),
>>and device libraries (I have 93 different foundries/manufacturers, and
>>49,726 different folders totaling 5.2GB :-)
>>
>> ...Jim Thompson
>
>Poxy hell. I might buy that off you if i could. For obvious reasons it
>is not (reasonably) available for sale by you.
No, I can't sell or disseminate. Though any qualified engineer can
request an account from virtually all of those foundries... just sign
an NDA.
>
>
>BTW is PSpice still available for sale? Is the price not too
>unreasonable?
>
>?-)
PSpice is for sale, but you're pretty much forced into OrCAD
Capture...
In the patent infringement case, I am the designer, so the lawyers
hire "experts" (from universities (UTex Arlington and UColorado) to
verify my work. Since I did this design with PSpice Simulator and
schematic entry using PSpice Schematics, the "experts" had to buy
same.
Turns out that PSpice v16.1+ has Schematics neutered, you can't print,
you have to import into Capture to print.
After my raising holy hell, Cadence deigned to sell them v15.7, which
still prints :-)
Cadence is a prime example of what is wrong in the US. Can't compete?
BUY the competition and destroy them.
Sell a worthless POS called Virtuoso, with the GUI from hell, probably
for $100K a seat, and kill a $8K product that can do the same thing,
with the world's most pleasant schematic entry.
...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
Reply by josephkk●October 19, 20122012-10-19
On Wed, 17 Oct 2012 16:30:07 +0200, Marco Trapanese
<marcotrapaneseNOSPAM@gmail.com> wrote:
>Il 17/10/2012 08:46, Vlad ha scritto:
>
>> As for the worst-case setup, try this link, it has a good explanation:
> > k6jca.blogspot.com/2012/07/monte-carlo-and-worst-case-circuit.html
>
>
>It does the dirty job but in a weird way. I'm going to improve it.
>Do you know a way to obtain the tolerance value already put in the=20
>related field (e.g. a resistor) ?
>
>Marco
You might look at sensitivity analysis. A .sens card with all the
components you want analyzed listed. Then you could easily pick the ones
you need to sweep. Myself, i can do most of that in my head without any
"heavy lifting" analytically.
?-)
Reply by josephkk●October 19, 20122012-10-19
On Wed, 17 Oct 2012 11:57:34 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:
>>>>im Newsbeitrag news:2eit78tt12n6odjq64dctu2a8qe9h7ft28@4ax.com...
>>>>> On Wed, 17 Oct 2012 09:55:34 +0200, o pere o <me@somewhere.net> =
wrote:
>>>>>
>>>>>>On 10/17/2012 09:13 AM, Marco Trapanese wrote:
>>>>>>> Il 17/10/2012 08:46, Vlad ha scritto:
>>>>>>>
>>>>>>>> For the TIP122, I did a search on Google and I got it within the=
=20
>>>>>>>> first
>>>>>>>> hit.
>>>>>>>
>>>>>>>
>>>>>>> I also got it at the first hit, if you're referring to this page:
>>>>>>>
>>>>>>> http://www.onsemi.com/pub_link/Collateral/TIP122.SP2
>>>>>>>
>>>>>>> but the code inside is quite different than the *.asy files =
available
>>>>>>> into the lib folder of LTSpice. Here my question.
>>>>>>>
>>>>>>> In fact I've already tried to put the file there calling it=20
>>>>>>> tip122.asy.
>>>>>>> But when I select it from LTSpice I got 'Unknown symbol syntax:=20
>>>>>>> ".SUBCKT
>>>>>>> Xtip122 1 2 3" '
>>>>>>>
>>>>>>>
>>>>>>>> As for the worst-case setup, try this link, it has a good=20
>>>>>>>> explanation:
>>>>>>>> =
>>>>>>may help you inserting it into LTSpice.
>>>>>>
>>>>>>Pere
>>>>>
>>>>> Since I work primarily at the device level I literally have =
hundreds
>>>>> of libraries. Is there a way in LTspice to call a library by its
>>>>> PATH, rather than requiring it to be in the same folder as the
>>>>> schematic?
>>>>>
>>>>> ...Jim Thompson
>>>>> --=20
>>>>> | James E.Thompson, CTO | mens |
>>>>> | Analog Innovations, Inc. | et |
>>>>> | Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
>>>>> | Phoenix, Arizona 85048 Skype: Contacts Only | |
>>>>> | Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
>>>>> | E-mail Icon at http://www.analog-innovations.com | 1962 |
>>>>>
>>>>> I love to cook with wine. Sometimes I even put it in the food.
>>>>
>>>>Hello Jim,
>>>>
>>>>You can specify a full path.
>>>>
>>>>Example:
>>>>
>>>>.lib C:\mylib1\mosfet\abc.lib
>>>>
>>>>Best regards,
>>>>Helmut
>>>>
>>>
>>> Is that put in via the so-called "Spice directive"?
>>>
>>> ...Jim Thompson
>>
>>Hello Jim,
>>
>>A SPICE-directive is simply a SPICE-line.
>>You can either use a SPICE-directive in the schematic or you specify =
the=20
>>full path in the symbol.
>>
>>I personally never use a full path name, because I mostly work on =
chematics=20
>>for other users. It's then much more convenient to have all files the =
folder=20
>>of the schemtaic.
>>
>>Best regards,
>>Helmut=20
>>
>
>Yep. Understood.
>
>I work with so many different clients and device libraries that I
>extensively use a utility "Clip Path"...
>
> http://download.cnet.com/ClipPath/3000-2094_4-10050927.html
>
>which helps me manage hierarchical schematics (sub-schematics are
>often in their own folder, due to pre-testing before incorporation),
>and device libraries (I have 93 different foundries/manufacturers, and
>49,726 different folders totaling 5.2GB :-)
> =09
> ...Jim Thompson
Poxy hell. I might buy that off you if i could. For obvious reasons it
is not (reasonably) available for sale by you.
BTW is PSpice still available for sale? Is the price not too
unreasonable?
?-)
Reply by Robert Macy●October 18, 20122012-10-18
On Oct 18, 1:30=A0am, Marco Trapanese <marcotrapaneseNOS...@gmail.com>
wrote:
> Il 17/10/2012 21:13, Robert Macy ha scritto:
>
> > So question goes back to the OP...why do you need to design to milspec
> > style? Unless your customer is milspec, you have overdesigned for
> > instrumentation volumes and probably underdesigned for consumer
> > volumes [10,000,000 per year]
>
> No milspec at all.
> For example, if you followed the thread about the current limiter, I
> want know how much will change the limited current in function of the
> tolerance of the resistor. It's a protection, so I do need to know if it
> will safe with any value I may expect.
>
> It's just an example, but I hope you understand what I'm saying.
>
> Marco
Yes, being conservative is good. I used the term 'milspec' merely as a
descriptor to make it easy to refer to using the worst case box of
tolerance values. Don't forget to add the tolerances of all the
measuring intrumentation, too.
Reply by Marco Trapanese●October 18, 20122012-10-18
Il 17/10/2012 21:13, Robert Macy ha scritto:
> So question goes back to the OP...why do you need to design to milspec
> style? Unless your customer is milspec, you have overdesigned for
> instrumentation volumes and probably underdesigned for consumer
> volumes [10,000,000 per year]
No milspec at all.
For example, if you followed the thread about the current limiter, I
want know how much will change the limited current in function of the
tolerance of the resistor. It's a protection, so I do need to know if it
will safe with any value I may expect.
It's just an example, but I hope you understand what I'm saying.
Marco
Reply by Marco Trapanese●October 18, 20122012-10-18
Il 17/10/2012 23:57, Charlie E. ha scritto:
> Not sure in LTSpice, but in PSpice the worst case sim does this.
> First, it does a base run, and gets your 'output' value. Then, it
> goes to each toleranced part, changes the value a small bit, and runs
> a new sim. It notes whether that output value changes plus, or minus.
> After testing the sensitivity on all the parts, it takes each part,
> adjusts its value in the direction indicated by the sensitivity to its
> limit, and runs a final, worst case simulation.
This is the behavior I was expecting. I'm afraid the DIY solution seen
in the link is not so accurate.
> Note that this is not necessarily the absolute worst case. In some
> circuits, especially filters, the actual worst case may be a some
> point within the tolerances where resonance effects are worse. Also,
> if you were not careful in setting your distribution types and values,
> you can get wild values for the sim, especially if you have gaussian
> distibution parts (PSpice sets the tolerance as the one sigma point,
> so worst case is three sigmas...)
You're right.
> Usual practice is to do the worst case high, worst case low, and then
> some Monte Carlo runs. Display them all in the same probe window, and
> you can see what the distribution of results tends to be.
Ok, I got it.
Thanks
Marco
Reply by Charlie E.●October 17, 20122012-10-17
On Wed, 17 Oct 2012 16:27:25 +0200, Marco Trapanese
<marcotrapaneseNOSPAM@gmail.com> wrote:
>Il 17/10/2012 16:04, Robert Macy ha scritto:
>
>> Are you certain you want ALL the worst case values at the SAME time?
>> The statistical likelihood of that is supposed to be extremely small.
>
>
>Small is not zero, and Murphy's watching me :)
>
>
>> More likely scenario was for cmmecial designs where we used a Guassian
>> distribution for the component tolerances, like 'square root of the
>> sum of the squares' tolerances which was quite a bit more lenient to
>> design. But even in Production that wasn't realistic - sometimes. We
>> found the resistor manufacturers made runs of resistors measured what
>> thy made, which created a flat distribution, but then they culled out
>> special values which put 'holes' in that distribution! Usually we got
>> distributions with the centers cut out. In other words likely to get +
>> values and like to get - values, and rarely got exactly what the label
>> said.
>
>
>I'm agree, but sometimes is useful to know where are the bounding
>limits, hoping you'll never reach them.
>
>Marco
>
Not sure in LTSpice, but in PSpice the worst case sim does this.
First, it does a base run, and gets your 'output' value. Then, it
goes to each toleranced part, changes the value a small bit, and runs
a new sim. It notes whether that output value changes plus, or minus.
After testing the sensitivity on all the parts, it takes each part,
adjusts its value in the direction indicated by the sensitivity to its
limit, and runs a final, worst case simulation.
Note that this is not necessarily the absolute worst case. In some
circuits, especially filters, the actual worst case may be a some
point within the tolerances where resonance effects are worse. Also,
if you were not careful in setting your distribution types and values,
you can get wild values for the sim, especially if you have gaussian
distibution parts (PSpice sets the tolerance as the one sigma point,
so worst case is three sigmas...)
Usual practice is to do the worst case high, worst case low, and then
some Monte Carlo runs. Display them all in the same probe window, and
you can see what the distribution of results tends to be.
Reply by Jim Thompson●October 17, 20122012-10-17
On Wed, 17 Oct 2012 12:13:41 -0700 (PDT), Robert Macy
<robert.a.macy@gmail.com> wrote:
>On Oct 17, 7:27�am, Marco Trapanese <marcotrapaneseNOS...@gmail.com>
>wrote:
>> Il 17/10/2012 16:04, Robert Macy ha scritto:
>>
>> > Are you certain you want ALL the worst case values at the SAME time?
>> > The statistical likelihood of that is supposed to be extremely small.
>>
>> Small is not zero, and Murphy's watching me :)
>>
>> > More likely scenario was for cmmecial designs where we used a Guassian
>> > distribution for the component tolerances, like 'square root of the
>> > sum of the squares' tolerances which was quite a bit more lenient to
>> > design. But even in Production that wasn't realistic - sometimes. We
>> > found the resistor manufacturers made runs of resistors measured what
>> > thy made, which created a flat distribution, but then they culled out
>> > special values which put 'holes' in that distribution! Usually we got
>> > distributions with the centers cut out. In other words likely to get +
>> > values and like to get - values, and rarely got exactly what the label
>> > said.
>>
>> I'm agree, but sometimes is useful to know where are the bounding
>> limits, hoping you'll never reach them.
>>
>> Marco
>
>Then there are the 'just get by' values. Where you have them in stock,
>they're almost the right value, but not quite, but it's 12 weeks to
>get the right ones, so you NEED to use these.
>
>Once when designing an IC, after being told to expect beta of 3:1 and
>not trusting; I designed the circuit to take a beta range of 5:1
>Brother! did THAT pay off!
>
>Once when designing CCD cameras, and being told to expect a
>'sensitivity' of such and such and again not trusting; I designed to
>accept 50% of the minimum sensitivity. Boy, did THAT pay off.
>Especially when you get a lot in that doesn't meet spec, and there are
>NO others and you're supposed to be shipping 2,000 units/mo and you
>have a room full of workers who will have NOTHING to do if you reject
>that lot.
>
>
>So question goes back to the OP...why do you need to design to milspec
>style? Unless your customer is milspec, you have overdesigned for
>instrumentation volumes and probably underdesigned for consumer
>volumes [10,000,000 per year]
I used to sell MIL-grade TC'd zeners. I was allowed 3 failures per
1000 units. I packed them that way ;-)
...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
Reply by Robert Macy●October 17, 20122012-10-17
On Oct 17, 7:27=A0am, Marco Trapanese <marcotrapaneseNOS...@gmail.com>
wrote:
> Il 17/10/2012 16:04, Robert Macy ha scritto:
>
> > Are you certain you want ALL the worst case values at the SAME time?
> > The statistical likelihood of that is supposed to be extremely small.
>
> Small is not zero, and Murphy's watching me :)
>
> > More likely scenario was for cmmecial designs where we used a Guassian
> > distribution for the component tolerances, like 'square root of the
> > sum of the squares' tolerances which was quite a bit more lenient to
> > design. But even in Production that wasn't realistic - sometimes. We
> > found the resistor manufacturers made runs of resistors measured what
> > thy made, which created a flat distribution, but then they culled out
> > special values which put 'holes' in that distribution! Usually we got
> > distributions with the centers cut out. In other words likely to get +
> > values and like to get - values, and rarely got exactly what the label
> > said.
>
> I'm agree, but sometimes is useful to know where are the bounding
> limits, hoping you'll never reach them.
>
> Marco
Then there are the 'just get by' values. Where you have them in stock,
they're almost the right value, but not quite, but it's 12 weeks to
get the right ones, so you NEED to use these.
Once when designing an IC, after being told to expect beta of 3:1 and
not trusting; I designed the circuit to take a beta range of 5:1
Brother! did THAT pay off!
Once when designing CCD cameras, and being told to expect a
'sensitivity' of such and such and again not trusting; I designed to
accept 50% of the minimum sensitivity. Boy, did THAT pay off.
Especially when you get a lot in that doesn't meet spec, and there are
NO others and you're supposed to be shipping 2,000 units/mo and you
have a room full of workers who will have NOTHING to do if you reject
that lot.
So question goes back to the OP...why do you need to design to milspec
style? Unless your customer is milspec, you have overdesigned for
instrumentation volumes and probably underdesigned for consumer
volumes [10,000,000 per year]