Reply by MUHAMMAD FAHAD BHUTTA●August 3, 20152015-08-03
BTw, one more thing i need to know is that how do i get the whole circuit of quantizer (All those bunch of gates, capacitors,resistors etc we use )? I mean the way you told me to get waveforms just gives a simple input output circuit and its waveforms. I , and my groupmates, need to understand more about that quantizer circuit and that little input output circuit isnt much helping ....Thanks again :)
Reply by MUHAMMAD FAHAD BHUTTA●August 3, 20152015-08-03
Wow, that was easy...thanks you very much, sir !
And we are having a monsoon here, so a really lot of clouds coming from every where. Also, there are floods in every river of Pakistan (due to heavy rain) and they are causing some serious damage to the whole economy. Please keep praying for us and for me as well ( because i am having a very bad throat ache :@)
Again, thank you very much !
Reply by John Larkin●August 2, 20152015-08-02
On Sun, 2 Aug 2015 04:47:05 -0700 (PDT), 111619124@umt.edu.pk wrote:
>Hi and greetings from pakistan.
>
>I need to understand a little bit about how to implement this code in LTspice since i am relatively new and have no previous experience in spice environment (except for a LAB), i would like to know how to implement this quantizer netlist in LTspice. Because whenever i try to run the code (by saving it as .cir file) , it gives some error like Multiple flag syntex error. Kindly guide me as this is very important for my final year engineering project.
>
>Thanks !
Hi and greetings from San Francisco. It's chilly and foggy here right
now. What's the weather like in Pakistan? Are you having that heat
wave?
Here's a quantizer:
Version 4
SHEET 1 880 680
WIRE 48 48 0 48
WIRE 112 48 48 48
WIRE 384 48 320 48
WIRE 432 48 384 48
WIRE 0 96 0 48
WIRE 112 112 112 48
WIRE 320 112 320 48
WIRE 432 128 432 48
WIRE 0 224 0 176
WIRE 112 224 112 192
WIRE 320 240 320 192
WIRE 432 240 432 208
FLAG 0 224 0
FLAG 320 240 0
FLAG 112 224 0
FLAG 432 240 0
FLAG 48 48 X
FLAG 384 48 OUT
SYMBOL bv 320 96 R0
WINDOW 3 -51 189 Left 2
WINDOW 0 -53 6 Left 2
SYMATTR Value V=int(5.1*V(X))*0.2
SYMATTR InstName B1
SYMBOL voltage 0 80 R0
WINDOW 3 -60 206 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -59 7 Left 2
SYMATTR Value SINE(0 1 1k 0 0 0 3)
SYMATTR InstName V1
SYMBOL res 96 96 R0
WINDOW 0 52 41 Left 2
WINDOW 3 52 71 Left 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 416 112 R0
WINDOW 0 47 31 Left 2
WINDOW 3 47 68 Left 2
SYMATTR InstName R2
SYMATTR Value 1k
TEXT 536 200 Left 2 !.tran 0 .005 0 1u
TEXT 552 72 Left 2 ;QUANTIZER
TEXT 576 120 Left 2 ;J Larkin
Copy that into a text editor and save as QUANT.ASC. Then LT Spice
should open it. Click the "runing man" symbol, then probe around.
--
John Larkin Highland Technology, Inc
lunatic fringe electronics
jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
Reply by ●August 2, 20152015-08-02
Hi and greetings from pakistan.
I need to understand a little bit about how to implement this code in LTspice since i am relatively new and have no previous experience in spice environment (except for a LAB), i would like to know how to implement this quantizer netlist in LTspice. Because whenever i try to run the code (by saving it as .cir file) , it gives some error like Multiple flag syntex error. Kindly guide me as this is very important for my final year engineering project.
Thanks !
Reply by John Larkin●April 19, 20102010-04-19
On Mon, 19 Apr 2010 11:03:51 -0700, Tim Wescott <tim@seemywebsite.now>
wrote:
>Jim Thompson wrote:
>> On Mon, 19 Apr 2010 17:28:39 GMT, nico@puntnl.niks (Nico Coesel)
>> wrote:
>>
>>> John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:
>>>
>> [snip]
>>>> The quantizer works fine. But when I poke a couple of quantizers into
>>>> my control loop model, to simulate ADC quantization, it runs for hours
>>>> instead of a fraction of a second. I don't know if it will ever
>>>> finish.
>>>>
>>>> There's a message at the bottom of the screen:
>>>>
>>>> Damped Pseudo-Transient Analysis: 0.xxxxx time constants; blah blah
>>>> press ESC to quit.
>>>>
>>>> where xxx is increasing like an RC exponential, ie slower and slower.
>>>>
>>>> What does all that mean?
>>>>
>>> Which simulator are you using? Perhaps the infinite steepness of the
>>> steps are causing problems. Maybe try to use an RC filter on the
>>> output.
>>
>> Most home-brew behavioral modeling fails because the inexperienced
>> modeler makes the function ideal, failing to understand what
>> arbitrarily fast edges do to simulators.
>>
>> Ideal diodes can do that :-)
>>
>> That's why much of the behavioral stuff I've posted uses the TANH
>> function... smooth, with ALL derivatives existing and finite.
>>
>> ...Jim Thompson
>
>Good mixed-mode simulators (like what you find in Matlab or Scilab)
>"understand" sampled-time, and can naturally shift from continuous-time
>to sampled time. This is one of the things that I was "asking" for when
>I expressed an interest in mixing processor behavior with analog.
>
>The simulator I pine for neither needs nor wants to simulate all the
>electrical states of the processor or controller -- it wants to do all
>of that numerically, and on a strictly sampled-time basis. But to do
>that it needs a clean break between continuous-time simulation and
>sampled time simulation.
>
>(note too that when you're 'behind' the sampled-time firewall you can do
>things like quantization without causing problems with infinite slopes,
>as long as you don't have any algebraic loops).
The nice thing about using Spice to simulate a mostly-digital control
system (I'm using LT Spice here) is that I can drop in models of
mosfets and opamps and zeners and such, the actual analog parts that
will be outside the uP. And all the schematic/sim/graphing tools are
familiar. The more general system sim programs probably don't do a
very good, or at least very easy, model of electronic components. And
LT Spice is free!
I'd do it in PowerBasic except that I think the sampling and
quantizations are unlikely to have much practical effect on my control
loop, and we can tweak the ARM code as needed to make it work. I was
interested to see if/how the loop would self-dither itself, but I'll
just wait to see the real thing.
John
Reply by Jim Thompson●April 19, 20102010-04-19
On Mon, 19 Apr 2010 11:03:51 -0700, Tim Wescott <tim@seemywebsite.now>
wrote:
>Jim Thompson wrote:
>> On Mon, 19 Apr 2010 17:28:39 GMT, nico@puntnl.niks (Nico Coesel)
>> wrote:
>>
>>> John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:
>>>
>> [snip]
>>>> The quantizer works fine. But when I poke a couple of quantizers into
>>>> my control loop model, to simulate ADC quantization, it runs for hours
>>>> instead of a fraction of a second. I don't know if it will ever
>>>> finish.
>>>>
>>>> There's a message at the bottom of the screen:
>>>>
>>>> Damped Pseudo-Transient Analysis: 0.xxxxx time constants; blah blah
>>>> press ESC to quit.
>>>>
>>>> where xxx is increasing like an RC exponential, ie slower and slower.
>>>>
>>>> What does all that mean?
>>>>
>>> Which simulator are you using? Perhaps the infinite steepness of the
>>> steps are causing problems. Maybe try to use an RC filter on the
>>> output.
>>
>> Most home-brew behavioral modeling fails because the inexperienced
>> modeler makes the function ideal, failing to understand what
>> arbitrarily fast edges do to simulators.
>>
>> Ideal diodes can do that :-)
>>
>> That's why much of the behavioral stuff I've posted uses the TANH
>> function... smooth, with ALL derivatives existing and finite.
>>
>> ...Jim Thompson
>
>Good mixed-mode simulators (like what you find in Matlab or Scilab)
>"understand" sampled-time, and can naturally shift from continuous-time
>to sampled time. This is one of the things that I was "asking" for when
>I expressed an interest in mixing processor behavior with analog.
>
>The simulator I pine for neither needs nor wants to simulate all the
>electrical states of the processor or controller -- it wants to do all
>of that numerically, and on a strictly sampled-time basis. But to do
>that it needs a clean break between continuous-time simulation and
>sampled time simulation.
>
>(note too that when you're 'behind' the sampled-time firewall you can do
>things like quantization without causing problems with infinite slopes,
>as long as you don't have any algebraic loops).
I have the "fancy" mixed-mode version of PSpice A/D+, handling mixed
analog/digital circuitry.
Plus I've made a number of personalized D2A and A2D "tools" to keep
digital separated from analog... keeping the screaming speed.
My behavioral 10-bit A-to-D runs in minutes, while the fully
device-level version takes all night :-)
...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
The only thing bipartisan in this country is hypocrisy
Reply by Tim Wescott●April 19, 20102010-04-19
Jim Thompson wrote:
> On Mon, 19 Apr 2010 17:28:39 GMT, nico@puntnl.niks (Nico Coesel)
> wrote:
>
>> John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:
>>
> [snip]
>>> The quantizer works fine. But when I poke a couple of quantizers into
>>> my control loop model, to simulate ADC quantization, it runs for hours
>>> instead of a fraction of a second. I don't know if it will ever
>>> finish.
>>>
>>> There's a message at the bottom of the screen:
>>>
>>> Damped Pseudo-Transient Analysis: 0.xxxxx time constants; blah blah
>>> press ESC to quit.
>>>
>>> where xxx is increasing like an RC exponential, ie slower and slower.
>>>
>>> What does all that mean?
>>>
>> Which simulator are you using? Perhaps the infinite steepness of the
>> steps are causing problems. Maybe try to use an RC filter on the
>> output.
>
> Most home-brew behavioral modeling fails because the inexperienced
> modeler makes the function ideal, failing to understand what
> arbitrarily fast edges do to simulators.
>
> Ideal diodes can do that :-)
>
> That's why much of the behavioral stuff I've posted uses the TANH
> function... smooth, with ALL derivatives existing and finite.
>
> ...Jim Thompson
Good mixed-mode simulators (like what you find in Matlab or Scilab)
"understand" sampled-time, and can naturally shift from continuous-time
to sampled time. This is one of the things that I was "asking" for when
I expressed an interest in mixing processor behavior with analog.
The simulator I pine for neither needs nor wants to simulate all the
electrical states of the processor or controller -- it wants to do all
of that numerically, and on a strictly sampled-time basis. But to do
that it needs a clean break between continuous-time simulation and
sampled time simulation.
(note too that when you're 'behind' the sampled-time firewall you can do
things like quantization without causing problems with infinite slopes,
as long as you don't have any algebraic loops).
--
Tim Wescott
Control system and signal processing consulting
www.wescottdesign.com
>>
>>The quantizer works fine. But when I poke a couple of quantizers into
>>my control loop model, to simulate ADC quantization, it runs for hours
>>instead of a fraction of a second. I don't know if it will ever
>>finish.
>>
>>There's a message at the bottom of the screen:
>>
>>Damped Pseudo-Transient Analysis: 0.xxxxx time constants; blah blah
>>press ESC to quit.
>>
>>where xxx is increasing like an RC exponential, ie slower and slower.
>>
>>What does all that mean?
>>
>
>Which simulator are you using? Perhaps the infinite steepness of the
>steps are causing problems. Maybe try to use an RC filter on the
>output.
Most home-brew behavioral modeling fails because the inexperienced
modeler makes the function ideal, failing to understand what
arbitrarily fast edges do to simulators.
Ideal diodes can do that :-)
That's why much of the behavioral stuff I've posted uses the TANH
function... smooth, with ALL derivatives existing and finite.
...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
The only thing bipartisan in this country is hypocrisy
Reply by Nico Coesel●April 19, 20102010-04-19
John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:
>On Sat, 17 Apr 2010 22:10:09 -0700, John Larkin
><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:
>
>>
>>Here's a quantizer in LT Spice:
>>
>>ftp://jjlarkin.lmi.net/Quantizer.jpg
>>
>>It wasn't hard, but the HELP is really obscure about syntax, and there
>>is no example of a schematic with a b-source that I could find.
>>
>>There is a sample-and-hold schematic symbol, so one can simulate the
>>effects of a clocked ADC or a DAC on a control loop.
>>
>>John
>>
>>TEXT 144 40 Left 0 !.tran 0 .005 0 1u
>>
>>
>
>The quantizer works fine. But when I poke a couple of quantizers into
>my control loop model, to simulate ADC quantization, it runs for hours
>instead of a fraction of a second. I don't know if it will ever
>finish.
>
>There's a message at the bottom of the screen:
>
>Damped Pseudo-Transient Analysis: 0.xxxxx time constants; blah blah
>press ESC to quit.
>
>where xxx is increasing like an RC exponential, ie slower and slower.
>
>What does all that mean?
>
Which simulator are you using? Perhaps the infinite steepness of the
steps are causing problems. Maybe try to use an RC filter on the
output.
--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
--------------------------------------------------------------
Reply by John Larkin●April 19, 20102010-04-19
On Sat, 17 Apr 2010 22:10:09 -0700, John Larkin
<jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:
>
>Here's a quantizer in LT Spice:
>
>ftp://jjlarkin.lmi.net/Quantizer.jpg
>
>It wasn't hard, but the HELP is really obscure about syntax, and there
>is no example of a schematic with a b-source that I could find.
>
>There is a sample-and-hold schematic symbol, so one can simulate the
>effects of a clocked ADC or a DAC on a control loop.
>
>John
>
>
>
>Version 4
>SHEET 1 880 680
>WIRE 48 48 0 48
>WIRE 112 48 48 48
>WIRE 384 48 320 48
>WIRE 432 48 384 48
>WIRE 0 96 0 48
>WIRE 112 112 112 48
>WIRE 320 112 320 48
>WIRE 432 128 432 48
>WIRE 0 224 0 176
>WIRE 112 224 112 192
>WIRE 320 240 320 192
>WIRE 432 240 432 208
>FLAG 0 224 0
>FLAG 320 240 0
>FLAG 112 224 0
>FLAG 432 240 0
>FLAG 48 48 X
>FLAG 384 48 OUT
>SYMBOL bv 320 96 R0
>WINDOW 3 36 198 Left 0
>SYMATTR InstName B1
>SYMATTR Value V=int(5.1*V(X))*0.2
>SYMBOL voltage 0 80 R0
>WINDOW 3 16 199 Left 0
>WINDOW 123 0 0 Left 0
>WINDOW 39 0 0 Left 0
>SYMATTR InstName V1
>SYMATTR Value SINE(0 1 1k 0 0 0 3)
>SYMBOL res 96 96 R0
>SYMATTR InstName R1
>SYMATTR Value 1k
>SYMBOL res 416 112 R0
>SYMATTR InstName R2
>SYMATTR Value 1k
>TEXT 144 40 Left 0 !.tran 0 .005 0 1u
>
>
The quantizer works fine. But when I poke a couple of quantizers into
my control loop model, to simulate ADC quantization, it runs for hours
instead of a fraction of a second. I don't know if it will ever
finish.
There's a message at the bottom of the screen:
Damped Pseudo-Transient Analysis: 0.xxxxx time constants; blah blah
press ESC to quit.
where xxx is increasing like an RC exponential, ie slower and slower.
What does all that mean?
I could program this system, quantization and all, in PowerBasic and I
know it would run fast. But I may as well just build the board and see
what happens, the best model being the thing itself. We can always
tweak the code (or the specs!) as required.
John