Reply by Clifford Heath●February 25, 20192019-02-25
On 25/2/19 10:35 pm, Uwe Bonnes wrote:
> John Larkin <jjlarkin@highlandtechnology.com> wrote:
>> On Sun, 24 Feb 2019 19:08:10 -0800 (PST),
>> muhammadiftikhar467@gmail.com wrote:
>>
>>> Parallel was faster than serial, why isn't there an UPB - "Universal
>>> Parallel Bus"?
>>
>> There was: ISA, and later PCI.
>>
>> Given N wires or twisted pairs, each can carry a self-clocking data
>> stream, and that's generally faster than using those same wires for
>> parallel data.
>>
>> That's why a PCI Express link with N pairs uses each lane for serial
>> data.
>>
>>
> How many cable pair uses USB3-x?
Billions, and they're shipping more all the time. :)
Oh, did you want to know how many cable pairs in one USB3 cable? :P
Reply by ●February 25, 20192019-02-25
I just realized how old this thread is...
But now that I think of it, what about firewire ? It was supposed to be "all that" but seems to have gone the way of the betamax.
Reply by ●February 25, 20192019-02-25
>"A common fast parallel bus was the SCSI port for HDDs"
I got a 50 pin SCSI CD CHANGER that fits in a standard bay. How'd you like to have to design that ? (especially the LASER which obviously has to pass through all the holes in the disks under the one being read, shit, usually they can't focus if the spindle height is only about 1mm from where it belongs, usually caused by someone putting more than one disk in at the same time)
Reply by Lasse Langwadt Christensen●February 25, 20192019-02-25
mandag den 25. februar 2019 kl. 16.07.54 UTC+1 skrev John Larkin:
> On Mon, 25 Feb 2019 05:36:44 -0800 (PST), tabbypurr@gmail.com wrote:
>
> >On Monday, 25 February 2019 05:15:17 UTC, John Larkin wrote:
> >> On Sun, 24 Feb 2019 19:08:10 -0800 (PST),
> >> muhammadiftikhar467@gmail.com wrote:
> >>
> >> >Parallel was faster than serial, why isn't there an UPB - "Universal Parallel Bus"?
> >>
> >> There was: ISA, and later PCI.
> >>
> >> Given N wires or twisted pairs, each can carry a self-clocking data
> >> stream, and that's generally faster than using those same wires for
> >> parallel data.
> >>
> >> That's why a PCI Express link with N pairs uses each lane for serial
> >> data.
> >
> >It also means, if suitably implemented, the link can keep working when not all the wires are connecting.
> >
> >
> >NT
>
> Yes. PCIe is (somewhat) adaptive to the number of functional pairs.
> And any board from 1 to 16 lanes will work in a 1-lane socket.
and afaiu many motherboard also support splitting the pairs between boards
so you can have two 8 lane cards in a 16 lane socket
Reply by John Larkin●February 25, 20192019-02-25
On Mon, 25 Feb 2019 05:36:44 -0800 (PST), tabbypurr@gmail.com wrote:
>On Monday, 25 February 2019 05:15:17 UTC, John Larkin wrote:
>> On Sun, 24 Feb 2019 19:08:10 -0800 (PST),
>> muhammadiftikhar467@gmail.com wrote:
>>
>> >Parallel was faster than serial, why isn't there an UPB - "Universal Parallel Bus"?
>>
>> There was: ISA, and later PCI.
>>
>> Given N wires or twisted pairs, each can carry a self-clocking data
>> stream, and that's generally faster than using those same wires for
>> parallel data.
>>
>> That's why a PCI Express link with N pairs uses each lane for serial
>> data.
>
>It also means, if suitably implemented, the link can keep working when not all the wires are connecting.
>
>
>NT
Yes. PCIe is (somewhat) adaptive to the number of functional pairs.
And any board from 1 to 16 lanes will work in a 1-lane socket.
--
John Larkin Highland Technology, Inc
lunatic fringe electronics
Reply by ●February 25, 20192019-02-25
On Monday, 25 February 2019 05:15:17 UTC, John Larkin wrote:
> On Sun, 24 Feb 2019 19:08:10 -0800 (PST),
> muhammadiftikhar467@gmail.com wrote:
>
> >Parallel was faster than serial, why isn't there an UPB - "Universal Parallel Bus"?
>
> There was: ISA, and later PCI.
>
> Given N wires or twisted pairs, each can carry a self-clocking data
> stream, and that's generally faster than using those same wires for
> parallel data.
>
> That's why a PCI Express link with N pairs uses each lane for serial
> data.
It also means, if suitably implemented, the link can keep working when not all the wires are connecting.
NT
Reply by Uwe Bonnes●February 25, 20192019-02-25
John Larkin <jjlarkin@highlandtechnology.com> wrote:
> On Sun, 24 Feb 2019 19:08:10 -0800 (PST),
> muhammadiftikhar467@gmail.com wrote:
>
>>Parallel was faster than serial, why isn't there an UPB - "Universal
>>Parallel Bus"?
>
> There was: ISA, and later PCI.
>
> Given N wires or twisted pairs, each can carry a self-clocking data
> stream, and that's generally faster than using those same wires for
> parallel data.
>
> That's why a PCI Express link with N pairs uses each lane for serial
> data.
>
>
On Sun, 24 Feb 2019 19:08:10 -0800 (PST),
muhammadiftikhar467@gmail.com wrote:
>Parallel was faster than serial, why isn't there an UPB - "Universal Parallel Bus"?
There was: ISA, and later PCI.
Given N wires or twisted pairs, each can carry a self-clocking data
stream, and that's generally faster than using those same wires for
parallel data.
That's why a PCI Express link with N pairs uses each lane for serial
data.
--
John Larkin Highland Technology, Inc
lunatic fringe electronics
Reply by ●February 24, 20192019-02-24
On Sun, 24 Feb 2019 19:08:10 -0800 (PST),
muhammadiftikhar467@gmail.com wrote:
>Parallel was faster than serial, why isn't there an UPB - "Universal Parallel Bus"?
Because jitter, skew, and cost are bigger problems than bandwidth.