Cadence (@Cadence) 2 hours ago

At the Publitek pre-Electronica Conference on Lake Tegernsee, Lazaar Louis showcases Cadence's new Tensilica DNA 10…


        

Cadence (@Cadence) 4 hours ago

In this week’s Whiteboard Wednesdays video, Megha Daga describes how the Tensilica Neural Network Compiler works…


        

Cadence (@Cadence) 23 hours ago

This year’s CDNLive Taiwan has successfully attracted a record-breaking participation with over 1,000 visitors incl…


        

Cadence (@Cadence) 1 day ago

In this blog, Meera Collier discusses the future of the trucking industry and autonomous trucks…


        

Cadence (@Cadence) 2 days ago

ESD Alliance Workshop on Digital Marketing: Agility


        

Cadence (@Cadence) 2 days ago

Want to learn how to design, implement, and verify a photonics IC? Attend the Cadence Photonics Summit November 7-8…


        

Cadence (@Cadence) 3 days ago

Facebook is officially adding partner support for its Glow Compiler used for hardware acceleration in machine learn…


        

Cadence (@Cadence) 5 days ago

How To Maintain Connectivity in a Multiboard PCB System


        

Cadence (@Cadence) 5 days ago

Design Systems, has announced that it has received four TSMC Partner of the Year awards at this year’s TSM…


        

Cadence (@Cadence) 5 days ago

expands its portfolio with delivery of TSMC OIP Virtual Design Environment


        

Cadence (@Cadence) 6 days ago

Did the Chinese Really Attach Rogue Chips to Apple and Amazon's Motherboards?


        

Cadence (@Cadence) 6 days ago

Once a neural network has been pruned for increased sparsity, Cadence’s Tensilica DNA 100 Processor IP can take adv…


        

Cadence (@Cadence) 6 days ago

Register now for the 2018 Photonics Summit and Workshop! Join Cadence and Lumerical November 7-8 to hear presentati…


        

Cadence (@Cadence) 1 week ago

RF Design with Cadence Virtuoso and National Instrument's AXIEM


        

Cadence (@Cadence) 1 week ago

Virtuoso - The Next Overture: Introducing Simulation Driven Routing (SDR)


        

Cadence (@Cadence) 1 week ago

In this week’s Whiteboard Wednesdays video, Megha Daga discusses how handling sparsity positively affects bandwidth…


        

Cadence (@Cadence) 1 week ago

Prabhakaran Palaniappan of Mobiveil Technologies discusses how the Cadence® Allegro® solution helped solve their ch…


        

Cadence (@Cadence) 1 week ago

HD maps: The smart way to never get lost


        

Cadence (@Cadence) 1 week ago

In the field of electronic design automation (EDA), with the tools that has developed, where does the chip…


        

Cadence (@Cadence) 1 week ago

Printed Circuit Boards are expensive. The value that a Designer can add is to reduce the overall cost of boards. Pu…


        

Cadence (@Cadence) 1 week ago

DNA 100 Processor IP: Paul McLellan previews this week's upcoming Breakfast Bytes blogs


        

Cadence (@Cadence) 1 week ago

Join the HiSilicon talk October 17 at on Power Optimization for High-Performance Design at Advanced Nod…


        

Cadence (@Cadence) 1 week ago

If you missed CDNLive India 2018 which took place on Sep 6 & 7, here are two fun videos that cover all the highligh…


        

Cadence (@Cadence) 1 week ago

DNA 100 Processor IP: Paul McLellan previews this week's upcoming Breakfast Bytes blogs


        

Cadence (@Cadence) 1 week ago

EDPS: Design Process in Milpitas


        

Cadence (@Cadence) 2 weeks ago

The Day a PCB Was Born.




        

Cadence (@Cadence) 2 weeks ago

CEO Lip-Bu Tan was invited as special guest to the IC 60th Anniversary Forum to deliver congratulatory rem…


        

Cadence (@Cadence) 2 weeks ago

What’s For Breakfast? Paul McLellan serves up blogs for the week from TSMC 2018


        

Cadence (@Cadence) 2 weeks ago

GlobalFoundries Executive Team Explain the Pivot.


        

Cadence (@Cadence) 2 weeks ago

Virtuoso® custom IC design platform was recently used to design a Star Trek-inspired diagnostic device cap…


        

Cadence (@Cadence) 2 weeks ago

Explore how to make cars safer and more reliable using Cadence automotive design and verification solutions in the…


        

Cadence (@Cadence) 2 weeks ago

At the recent EDPS, Cadence's Patrick Groeneveld presented a course to undergraduate students about the complexity…


        

Cadence (@Cadence) 2 weeks ago

Design Systems announced its continued collaboration with TSMC to certify its design solutions for TSMC 5n…


        

Cadence (@Cadence) 2 weeks ago

Big announcements are being made at TSMC's 2018 Open Innovation Platform (OIP) Ecosystem Forum in the Santa Clara C…


        

Cadence (@Cadence) 2 weeks ago

In this week's Whiteboard Wednesdays episode, Megha Daga describes the new Tensilica DNA 100 Processor IP for on-de…


        

Cadence (@Cadence) 2 weeks ago

Need help with an Arm® design? Talk to Cadence® staff at in Booth 733 and get a ticket for an hourly p…


        

Cadence (@Cadence) 2 weeks ago

Read Facebook’s blog about their partnership with Cadence to build a hardware ecosystem for machine learning for th…


        

Cadence (@Cadence) 2 weeks ago

Join Cadence talks with Arm, HiSilicon, HPE, and Marvell at and get a ticket for an hourly prize drawin…


        

Cadence (@Cadence) 2 weeks ago

helps build the next generation of innovative products that people use everyday. Behind this newly connect…


        

Cadence (@Cadence) 3 weeks ago

EMEA 2018 Keynote summary by Prof Philipp Slusallek, Scientific Director at the German Research Center for…


        

Cadence (@Cadence) 3 weeks ago

The new Cadence Tensilica DNA 100 IP core leverages the inherent sparsity in neural networks to up deliver up to 12…


        

Cadence (@Cadence) 3 weeks ago

In this video, Crystle Bruno explains how Cloud boosts efficiency by rapidly responding to peak computing…


        

Cadence (@Cadence) 3 weeks ago

The Joules™ RTL Power Solution and Joules Power Calculator course closes this gap by delivering time-based…


        

Cadence (@Cadence) 3 weeks ago

First day of Grace Hopper Celebration! Busy!




        

Cadence (@Cadence) 3 weeks ago

Cadence: Bullish on AI, an interview with David White


        

Cadence (@Cadence) 3 weeks ago

Join Cadence at the Grace Hopper Celebration in Houston, Sept. 26 – 28 – booth 7804. We are conducting onsite inte…


        

Cadence (@Cadence) 3 weeks ago

Virtuoso - The Next Overture: Introducing Simulation Driven Routing


        

Cadence (@Cadence) 3 weeks ago

The Tensilica® DNA 100 Processor IP is the first deep neural-network accelerator (DNA) AI processor IP to deliver b…


        

Cadence (@Cadence) 3 weeks ago

Want to find, fix, and avoid DFM errors earlier in your design cycle? Join the Cadence® DesignTrue DFM Partner Prog…


        

Cadence (@Cadence) 3 weeks ago

Cadence sponsors Grace Hopper Celebration , the world’s largest gathering of women technologists. Join Cadenc…