Calculate PSS of CMOS inverter

Started by Martin Gruber in sci.electronics.design8 years ago 1 reply

How to calculate the PSS (power supply sensitivity) for a CMOS inverter? I'm struggling a bit because I do not get meaningful result values....

How to calculate the PSS (power supply sensitivity) for a CMOS inverter? I'm struggling a bit because I do not get meaningful result values. Let explain what I have. I have the following transistor parameters from a simulation result. High-side PMOS: rds2 = 11.67k gm2 = 879.4 uS Low-side NMOS: rds1= 20.35k gm1 = 1.659 mS With that I want to calculate the PSS. I created th...


Ramp Type Oscillator with Bottom Release

Started by Jim Thompson in sci.electronics.design4 years ago 43 replies

Ramp Type Oscillator with Bottom Release In the past I did this (in bipolar), so that I got a near-zero release of the "dump" function by...

Ramp Type Oscillator with Bottom Release In the past I did this (in bipolar), so that I got a near-zero release of the "dump" function by sensing saturation... ... easy with bipolar devices. Any ideas on how to do it similarly with CMOS? (Comparators sensing near zero are risky with CMOS due to crappy offse


Opto-CMOS

Started by bitrex in sci.electronics.design6 years ago 6 replies

Can anyone recommend one of those optically isolated normally open analog switches, with a 250 volt breakdown voltage on the switch, that I...

Can anyone recommend one of those optically isolated normally open analog switches, with a 250 volt breakdown voltage on the switch, that I can get my hands on real quick like? DIP package would be preferred if possible.


Re: CMOS Data FlipFlop wierdness.

Started by Phil Hobbs in sci.electronics.design8 years ago 9 replies

On 2/3/2014 8:14 PM, Maynard A. Philbrook Jr. wrote: > > On a 4013 D-FF, when you tie both the SET and RESET > together to the same logic...

On 2/3/2014 8:14 PM, Maynard A. Philbrook Jr. wrote: > > On a 4013 D-FF, when you tie both the SET and RESET > together to the same logic state, I see that it > forces both Q and !Q to go high when a POS edge is > triggered on these paired lines. > > Looking at the Fairchild PDF, it does not say what > happens to the outputs when both R and S are pulled low > at the same time, but in


CMOS logic directly powered from mains

Started by Tom Del Rosso in sci.electronics.design5 years ago 55 replies

I've seen this done in a few appliances. What's the cheapest way? Is there a reliable way? Is it possible to get a little charge from a...

I've seen this done in a few appliances. What's the cheapest way? Is there a reliable way? Is it possible to get a little charge from a pickup of some kind positioned near a large voltage source, like an electrostatic charge, and give it some kind of crude voltage regulation? --


DG419L

Started by ozzy in sci.electronics.design9 years ago 4 replies

Hi all, The DG419L is a low voltage CMOS analog switch made by Vishay siliconix. Ca= n V+ and V- be connected to VL and GND respectively, as...

Hi all, The DG419L is a low voltage CMOS analog switch made by Vishay siliconix. Ca= n V+ and V- be connected to VL and GND respectively, as from the data sheet= it doesn't look immediately obvious....none of the app note circuits show = them as connected. Hoping someone has already used the part, and come acros= s this. =20 Cheers, ozzy.


Failing 4051s

Started by bitrex in sci.electronics.design3 years ago 22 replies

The past couple months I've been asked to diagnose three ~25-35 year old pieces of audio equipment/test gear that were malfunctioning and the...

The past couple months I've been asked to diagnose three ~25-35 year old pieces of audio equipment/test gear that were malfunctioning and the problem has traced back to the same fault - dead or dying 25-35 year old CMOS 4051 analog multiplexer. Two were from the same mfgr and one not. What gives? Just random chance or is something killing these things now?


Driving PECL

Started by Phil Hobbs in sci.electronics.design7 years ago 10 replies

Hi, all, So I've been trying to exhume my long-disused, and never very extensive, ECL skills. It seems like there's nothing you can do in...

Hi, all, So I've been trying to exhume my long-disused, and never very extensive, ECL skills. It seems like there's nothing you can do in ECL for less than about $5. Dedicated CMOS-> PECL translators (10EP20) are $7, and those nice differential-output ADCMP567s are only $6ish. The application is that nulling phase digitizer from the "DDS wisdom" thread. So for a small system,


cmos delay vs temperature

Started by John Larkin in sci.electronics.design5 years ago 9 replies

I found one old Fairchild appnote that has some numbers https://dl.dropboxusercontent.com/u/53724080/Parts/Logic/CMOS_Delay_Temp.pdf which...

I found one old Fairchild appnote that has some numbers https://dl.dropboxusercontent.com/u/53724080/Parts/Logic/CMOS_Delay_Temp.pdf which averages to around +3000 ppm/degC, or about +3 ps per ns of prop delay per degree C. That's with 50 pF loading, sorta high. This is HC, pretty old technology. I have a vague impression that the innards of a typical FPGA may be better. Here's a ri...


Jim T

Started by John Larkin in sci.electronics.design4 years ago 12 replies

Hey, Jim, Have you worked with any high voltage analog IC processes? Like, say, 300 volts swing? I know that APEX used to have a horrible...

Hey, Jim, Have you worked with any high voltage analog IC processes? Like, say, 300 volts swing? I know that APEX used to have a horrible HV cmos process, maybe fabbed by AT&T or IBM or somebody improbable, but they use discretes now mostly. -- John Larkin Highland Technology, Inc picosecond timing precision measurement jlarkin att highlandtechnology dott com http...


Op amp recommendation

Started by bitrex in sci.electronics.design7 years ago 21 replies

Can anyone recommend a low quiescent power, low cost, CMOS op amp suitable for use from a single supply, that can really pump out current...

Can anyone recommend a low quiescent power, low cost, CMOS op amp suitable for use from a single supply, that can really pump out current when required (50 - 100 mA)? GBW and slew rate requirements are modest and most anything above 1 MHz and 1 volt/us would do. -- ----Android NewsGroup Reader---- http://usenet.sinaapp.com/


How to double PCI clock?

Started by Johann Klammer in sci.electronics.design6 years ago 9 replies

Classical 5V PCI, that is. Is there a small IC for this? I need a 66 Mhz clock generated from the 33Mhz of the PCI bus, but can not seem to...

Classical 5V PCI, that is. Is there a small IC for this? I need a 66 Mhz clock generated from the 33Mhz of the PCI bus, but can not seem to find an IC that is specified for the PCI input spikes of 11V. Also, most seem to be cmos parts that have the input thresholds at vcc/2 instead of the lower TTL levels.


Comparison table for capacitance per um^2 for IC processes?

Started by Joerg in sci.electronics.design8 years ago 38 replies

Folks, Might have an IC design coming up, depends on whether we can squeeze it all in, and on other external parameters. Anyhow, is there a...

Folks, Might have an IC design coming up, depends on whether we can squeeze it all in, and on other external parameters. Anyhow, is there a table that compares capacitance per square micrometer between the various CMOS processes out there? Like a top 10 chart? I am not an IC guy and only (somewhat) familiar with the XH-035 XFab process which clocks in at just under 4fF/um^2 for poly-diff...


OT. Firing up an old computer

Started by amdx in sci.electronics.design7 years ago 35 replies

I'm firing up an old computer and it starts me with push F1 to continue. From there I'm in the bios setup and can't get out. I have four...

I'm firing up an old computer and it starts me with push F1 to continue. From there I'm in the bios setup and can't get out. I have four boxes , Setup, Security, Utility, Default. Each box has several options, but I don't want to change anything, I just want to get to windows to see a specific program. How do I get out of bios? Thanks, Mikek It does have a message, CMOS ba...


OT: manual for laptop

Started by Robert Baer in sci.electronics.design8 years ago 18 replies

I just got an AST Ascentia A41 need i need to (1) replace the CMOS battery, and (2) put a hard drive in it. I found 5 screws on the...

I just got an AST Ascentia A41 need i need to (1) replace the CMOS battery, and (2) put a hard drive in it. I found 5 screws on the bottom that hold it together, and pried/released the latches in the front at the keyboard. Two of those screws are in the back, left and right side; i can pry it apart in those areas, but the middle does not budge for squat. Keeping the front prie...


resetting a filter

Started by John Larkin in sci.electronics.design9 years ago 499 replies

I have a cmos logic signal that I want to delay a few ns. So I figure I'll just run it through a 2 or 3-pole Bessel lowpass filter into...

I have a cmos logic signal that I want to delay a few ns. So I figure I'll just run it through a 2 or 3-pole Bessel lowpass filter into the next gate. I'd like it to recover quickly, so I figure I could discharge the cap/caps in the filter. I could do that with schottky diodes, but a transistor would discharge them better. How about this? https://dl.dropbox.com/u/53724080/Circuits/Fi...


CMOS input protection

Started by Pimpom in sci.electronics.design9 years ago 21 replies

I'm designing a project based mainly on CD4000 series logic devices. The finished product will consist of two different sections linked by a...

I'm designing a project based mainly on CD4000 series logic devices. The finished product will consist of two different sections linked by a long (~40m) 2-core shielded cable. The signals are very low frequency pulses (a few Hz at most) and transition times are not critical. It's not practicable to let the two sections share a common power supply. Neither is it possible to ensure that...


On-board Oscillator with CMOS 4046

Started by Miguel Cardoso in sci.electronics.design8 years ago 8 replies

Hello, I need help to determine the value of VR2 and C12 (pin 6 and 7). For my project I need a base frequency of 400 rpm and a running speed of...

Hello, I need help to determine the value of VR2 and C12 (pin 6 and 7). For my project I need a base frequency of 400 rpm and a running speed of 4000 rpm. I also determine a R26 (pin 11) at 10k for a 100k VR1. With these values, what is the value for C12? Thank you, Miguel


Video DC Restorer

Started by Jim Thompson in sci.electronics.design7 years ago 34 replies

Just did a video DC restorer function (in CMOS) for a UTC camera chip, and realized that it would be trivial to do the same function...

Just did a video DC restorer function (in CMOS) for a UTC camera chip, and realized that it would be trivial to do the same function with bipolar discrete devices. On the S.E.D/Schematics page of my website check out... Video_Restorer_Discrete_NPNs.png ...Jim Thompson -- | James E.Thompson | mens | ...


GreenPAK cookbook

Started by bitrex in sci.electronics.design1 year ago 3 replies

There was the CMOS cookbook, now there's the GreenPAK cookbook: An interesting feature is mentioned at the start of chapter 5. To...

There was the CMOS cookbook, now there's the GreenPAK cookbook: An interesting feature is mentioned at the start of chapter 5. To maintain a given mixed-signal array configuration after power-loss the devices are the equivalent of OTP and will boot into that state. But if the particular de