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Hi, I am using the voltage error * gain to set dutycycle for regulating the voltage output of a power supply, under load we are getting a couple volts lower output voltage than the desired output voltage, but other than that overall the regulation seems to be working well. What is a good way to regulate up to the last couple of volts? I was thinking adding an intergral term to the dutycycle calculation (summed voltage error over time * gain) to make it a PI loop, but is there other techniques that work well or better than the standard PID loop technique for power supply regulation? cheers, Jamie
Jamie Morken wrote: > Hi, > > I am using the voltage error * gain to set dutycycle for regulating the > voltage output of a power supply, under load we are getting a couple > volts lower output voltage than the desired output voltage, but other > than that overall the regulation seems to be working well. What is a > good way to regulate up to the last couple of volts? I was thinking > adding an intergral term to the dutycycle calculation (summed voltage > error over time * gain) to make it a PI loop, but is there other > techniques that work well or better than the standard PID loop technique > for power supply regulation? Sounds to me like you've got the voltage error wrong or the gain isn't enough. What's the voltage off-load / low load vs full load ? Graham
On Dec 15, 12:40=A0am, Jamie Morken <jmor...@shaw.ca> wrote:
> Hi,
>
> I am using the voltage error * gain to set dutycycle for regulating the
> voltage output of a power supply, under load we are getting a couple
> volts lower output voltage than the desired output voltage, but other
> than that overall the regulation seems to be working well. =A0What is a
> good way to regulate up to the last couple of volts? =A0I was thinking
> adding an intergral term to the dutycycle calculation (summed voltage
> error over time * gain) to make it a PI loop, but is there other
> techniques that work well or better than the standard PID loop technique
> for power supply regulation?
A PI control is fairly simple to do and works very well for this sort
of situation. You may want to do something like this:
+-!<--+
! !
+-->!-+
! !
---/\/\-------+----/\/\-+-!!--+-
! !
---!-\ !
! >----------+----
GND-----!+/
The diodes restrict the range over which the "I" part of things can
swing.
On Mon, 15 Dec 2008 00:40:38 -0800, Jamie Morken <j...@shaw.ca> wrote: >Hi, > >I am using the voltage error * gain to set dutycycle for regulating the >voltage output of a power supply, under load we are getting a couple >volts lower output voltage than the desired output voltage, but other >than that overall the regulation seems to be working well. What is a >good way to regulate up to the last couple of volts? I was thinking >adding an intergral term to the dutycycle calculation (summed voltage >error over time * gain) to make it a PI loop, but is there other >techniques that work well or better than the standard PID loop technique >for power supply regulation? > >cheers, >Jamie PI is good. You can also feed-forward a correction based on load current and/or unregulated input voltage. John
MooseFET wrote: > On Dec 15, 12:40 am, Jamie Morken <jmor...@shaw.ca> wrote: >> Hi, >> >> I am using the voltage error * gain to set dutycycle for regulating the >> voltage output of a power supply, under load we are getting a couple >> volts lower output voltage than the desired output voltage, but other >> than that overall the regulation seems to be working well. What is a >> good way to regulate up to the last couple of volts? I was thinking >> adding an intergral term to the dutycycle calculation (summed voltage >> error over time * gain) to make it a PI loop, but is there other >> techniques that work well or better than the standard PID loop technique >> for power supply regulation? > > A PI control is fairly simple to do and works very well for this sort > of situation. You may want to do something like this: > > +-!<--+ > ! ! > +-->!-+ > ! ! > ---/\/\-------+----/\/\-+-!!--+- > ! ! > ---!-\ ! > ! >----------+---- > GND-----!+/ > > The diodes restrict the range over which the "I" part of things can > swing. > Those diodes for anti-windup are a good idea, but you have to design the loop carefully. The wave-a-dead-chicken school of anti-windup design will often cause nonlinear oscillations during transients, and so make things worse rather than better. Back around 1981 I was building PLLs for satcom frequency references, and when I put in anti-windup diodes I had some pretty amusing looking settling transients until I figured out what was going on. Cheers, Phil Hobbs
On Mon, 15 Dec 2008 12:23:46 -0500, Phil Hobbs <p...@electrooptical.net> wrote: >MooseFET wrote: >> On Dec 15, 12:40 am, Jamie Morken <jmor...@shaw.ca> wrote: >>> Hi, >>> >>> I am using the voltage error * gain to set dutycycle for regulating the >>> voltage output of a power supply, under load we are getting a couple >>> volts lower output voltage than the desired output voltage, but other >>> than that overall the regulation seems to be working well. What is a >>> good way to regulate up to the last couple of volts? I was thinking >>> adding an intergral term to the dutycycle calculation (summed voltage >>> error over time * gain) to make it a PI loop, but is there other >>> techniques that work well or better than the standard PID loop technique >>> for power supply regulation? >> >> A PI control is fairly simple to do and works very well for this sort >> of situation. You may want to do something like this: >> >> +-!<--+ >> ! ! >> +-->!-+ >> ! ! >> ---/\/\-------+----/\/\-+-!!--+- >> ! ! >> ---!-\ ! >> ! >----------+---- >> GND-----!+/ >> >> The diodes restrict the range over which the "I" part of things can >> swing. >> > >Those diodes for anti-windup are a good idea, but you have to design the >loop carefully. The wave-a-dead-chicken school of anti-windup design >will often cause nonlinear oscillations during transients, and so make >things worse rather than better. Back around 1981 I was building PLLs >for satcom frequency references, and when I put in anti-windup diodes I >had some pretty amusing looking settling transients until I figured out >what was going on. > >Cheers, > >Phil Hobbs When I used to design control loops for steamship throttle controls, I'd use a nonlinear function generator to minimize open-loop error, and a P+I correction with carefully restricted range, so the the thing wouldn't run away too far if the tach failed or something. I once almost ripped a 900' LASH ship off the dock at Avondale Shipyards, turning a pot too far. I did "lights out" a tanker that was off-loading in Binecia. John
On Mon, 15 Dec 2008 00:40:38 -0800, Jamie Morken <j...@shaw.ca> wrote: >Hi, > >I am using the voltage error * gain to set dutycycle for regulating the >voltage output of a power supply, under load we are getting a couple >volts lower output voltage than the desired output voltage, but other >than that overall the regulation seems to be working well. What is a >good way to regulate up to the last couple of volts? I was thinking >adding an intergral term to the dutycycle calculation (summed voltage >error over time * gain) to make it a PI loop, but is there other >techniques that work well or better than the standard PID loop technique >for power supply regulation? > If the DC regulation doesn't meet designed values, look for noise influences or sources of leakage. DC regulation is highly predictable and repeatable, unit-to-unit. It is often tailored for controlled droop in parallel situations. Stating 'a couple of volts' and not a percentage, masks the degree of regulation currently achieved. RL
John Larkin wrote: > On Mon, 15 Dec 2008 12:23:46 -0500, Phil Hobbs > <p...@electrooptical.net> wrote: > >> MooseFET wrote: >>> On Dec 15, 12:40 am, Jamie Morken <jmor...@shaw.ca> wrote: >>>> Hi, >>>> >>>> I am using the voltage error * gain to set dutycycle for regulating the >>>> voltage output of a power supply, under load we are getting a couple >>>> volts lower output voltage than the desired output voltage, but other >>>> than that overall the regulation seems to be working well. What is a >>>> good way to regulate up to the last couple of volts? I was thinking >>>> adding an intergral term to the dutycycle calculation (summed voltage >>>> error over time * gain) to make it a PI loop, but is there other >>>> techniques that work well or better than the standard PID loop technique >>>> for power supply regulation? >>> A PI control is fairly simple to do and works very well for this sort >>> of situation. You may want to do something like this: >>> >>> +-!<--+ >>> ! ! >>> +-->!-+ >>> ! ! >>> ---/\/\-------+----/\/\-+-!!--+- >>> ! ! >>> ---!-\ ! >>> ! >----------+---- >>> GND-----!+/ >>> >>> The diodes restrict the range over which the "I" part of things can >>> swing. >>> >> Those diodes for anti-windup are a good idea, but you have to design the >> loop carefully. The wave-a-dead-chicken school of anti-windup design >> will often cause nonlinear oscillations during transients, and so make >> things worse rather than better. Back around 1981 I was building PLLs >> for satcom frequency references, and when I put in anti-windup diodes I >> had some pretty amusing looking settling transients until I figured out >> what was going on. >> >> Cheers, >> >> Phil Hobbs > > When I used to design control loops for steamship throttle controls, > I'd use a nonlinear function generator to minimize open-loop error, > and a P+I correction with carefully restricted range, so the the thing > wouldn't run away too far if the tach failed or something. > > I once almost ripped a 900' LASH ship off the dock at Avondale > Shipyards, turning a pot too far. I did "lights out" a tanker that was > off-loading in Binecia. > > John > > Brr. If I have the space, I usually like to use another op amp for the I term and let it saturate to limit the swing, using resistor ratios to set the gains. That way you either have a well-behaved PI loop or a well-behaved P loop with an offset--none of the weirdness you can get with partially-turned-on diodes. Cheers, Phil Hobbs
John Larkin wrote: > On Mon, 15 Dec 2008 12:23:46 -0500, Phil Hobbs > <p...@electrooptical.net> wrote: > >> MooseFET wrote: >>> On Dec 15, 12:40 am, Jamie Morken <jmor...@shaw.ca> wrote: >>>> Hi, >>>> >>>> I am using the voltage error * gain to set dutycycle for regulating the >>>> voltage output of a power supply, under load we are getting a couple >>>> volts lower output voltage than the desired output voltage, but other >>>> than that overall the regulation seems to be working well. What is a >>>> good way to regulate up to the last couple of volts? I was thinking >>>> adding an intergral term to the dutycycle calculation (summed voltage >>>> error over time * gain) to make it a PI loop, but is there other >>>> techniques that work well or better than the standard PID loop technique >>>> for power supply regulation? >>> A PI control is fairly simple to do and works very well for this sort >>> of situation. You may want to do something like this: >>> >>> +-!<--+ >>> ! ! >>> +-->!-+ >>> ! ! >>> ---/\/\-------+----/\/\-+-!!--+- >>> ! ! >>> ---!-\ ! >>> ! >----------+---- >>> GND-----!+/ >>> >>> The diodes restrict the range over which the "I" part of things can >>> swing. >>> >> Those diodes for anti-windup are a good idea, but you have to design the >> loop carefully. The wave-a-dead-chicken school of anti-windup design >> will often cause nonlinear oscillations during transients, and so make >> things worse rather than better. Back around 1981 I was building PLLs >> for satcom frequency references, and when I put in anti-windup diodes I >> had some pretty amusing looking settling transients until I figured out >> what was going on. >> >> Cheers, >> >> Phil Hobbs > > When I used to design control loops for steamship throttle controls, > I'd use a nonlinear function generator to minimize open-loop error, > and a P+I correction with carefully restricted range, so the the thing > wouldn't run away too far if the tach failed or something. I still like to do that when possible. Putting control loops on things that are already nearly linear tends to make their behaviour much more benign in unusual conditions or when there's a fault like your tach going south. Thermoelectric cooler control loops spring to mind. Cheers, Phil Hobbs
On Dec 15, 9:23=A0am, Phil Hobbs <pcdhSpamMeSensel...@electrooptical.net> wrote: > MooseFET wrote: > > On Dec 15, 12:40 am, Jamie Morken <jmor...@shaw.ca> wrote: > >> Hi, > > >> I am using the voltage error * gain to set dutycycle for regulating th= e > >> voltage output of a power supply, under load we are getting a couple > >> volts lower output voltage than the desired output voltage, but other > >> than that overall the regulation seems to be working well. =A0What is = a > >> good way to regulate up to the last couple of volts? =A0I was thinking > >> adding an intergral term to the dutycycle calculation (summed voltage > >> error over time * gain) to make it a PI loop, but is there other > >> techniques that work well or better than the standard PID loop techniq= ue > >> for power supply regulation? > > > A PI control is fairly simple to do and works very well for this sort > > of situation. =A0You may want to do something like this: > > > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0+-!<--+ > > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0! =A0 =A0 ! > > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0+-->!-+ > > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0! =A0 =A0 ! > > =A0---/\/\-------+----/\/\-+-!!--+- > > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0! =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ! > > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ---!-\ =A0 =A0 =A0 =A0 =A0 ! > > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0! =A0>----------+---- > > =A0 =A0 =A0 =A0 =A0 =A0GND-----!+/ > > > The diodes restrict the range over which the "I" part of things can > > swing. > > Those diodes for anti-windup are a good idea, but you have to design the > loop carefully. =A0The wave-a-dead-chicken school of anti-windup design > will often cause nonlinear oscillations during transients, and so make > things worse rather than better. =A0Back around 1981 I was building PLLs > for satcom frequency references, and when I put in anti-windup diodes I > had some pretty amusing looking settling transients until I figured out > what was going on. As with many thing, if you do it wrong the results aren't very good. The advantage of the diodes over other simple methods of doing the antiwindup is that you don't cause large difference voltages to appear on the input of the op-amp. You never want to do just an integrator and then let it clip at the rails unless the op-amp has nose to tail diodes on its input. Hitting the rail builds up a large difference voltage on that op-amp that can lead to all manner of strangeness and long recovery times.