I want to make a behavioral model of a power supply controller (a vastly 
simplified UCC28060).  I want to do things like trigger a one-shot 
whenever a voltage drops below zero.

Does anyone have a favorite way to do this?

I'm thinking voltage -> comparator 1 -> 'S' on SR flip-flop -> Q* to 
gate of FET -> that shorts a current source -> that charges a cap -> 
comparator 2 -> reset the SR.

This has weaknesses -- not least of which is that the original 
triggering voltage will be zero as a consequence of the timer being 
active, which means I need to cook up an edge triggered flip flop (maybe 
they have a clocked D flip flop I can use).

At any rate, I don't often get to this depth with LTSpice, so if anyone 
has cleverness to share I'll listen.

-- 
Tim Wescott
Control system and signal processing consulting
www.wescottdesign.com

On Fri, 12 Mar 2010 10:49:45 -0800, Tim Wescott <t...@seemywebsite.now>
wrote:

>I want to make a behavioral model of a power supply controller (a vastly 
>simplified UCC28060).  I want to do things like trigger a one-shot 
>whenever a voltage drops below zero.
>
>Does anyone have a favorite way to do this?
>
>I'm thinking voltage -> comparator 1 -> 'S' on SR flip-flop -> Q* to 
>gate of FET -> that shorts a current source -> that charges a cap -> 
>comparator 2 -> reset the SR.
>
>This has weaknesses -- not least of which is that the original 
>triggering voltage will be zero as a consequence of the timer being 
>active, which means I need to cook up an edge triggered flip flop (maybe 
>they have a clocked D flip flop I can use).
>
>At any rate, I don't often get to this depth with LTSpice, so if anyone 
>has cleverness to share I'll listen.

---
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JF 

On Mar 12, 10:49=A0am, Tim Wescott <t...@seemywebsite.now> wrote:
> I want to make a behavioral model of a power supply controller (a vastly
> simplified UCC28060). =A0I want to do things like trigger a one-shot
> whenever a voltage drops below zero.
>
> Does anyone have a favorite way to do this?
>
> I'm thinking voltage -> comparator 1 -> 'S' on SR flip-flop -> Q* to
> gate of FET -> that shorts a current source -> that charges a cap ->
> comparator 2 -> reset the SR.
>
> This has weaknesses -- not least of which is that the original
> triggering voltage will be zero as a consequence of the timer being
> active, which means I need to cook up an edge triggered flip flop (maybe
> they have a clocked D flip flop I can use).
>
> At any rate, I don't often get to this depth with LTSpice, so if anyone
> has cleverness to share I'll listen.
>
> --
> Tim Wescott
> Control system and signal processing consultingwww.wescottdesign.com

Linear does provide a D-flip-flop.  You can take advantage of the fact
that the logic all uses a 0 to 1.0 output and a 0.5 threshold to make
oneshots etc.  You need to make the parts a little slower than they
naturally are using something like a "tau=3D20n".  If not they try to be
infinitely fast.  This can lead to troubles.

Hidden deep in the working of LTSpice is the ability to make a gated
oscillator.  They use it for their switcher chips.  Unfortunately I
don't
think mere mortals can get to it.