On Fri, 06 Nov 2009 17:28:03 +0000, ChrisQ <m...@devnull.com> wrote:

>krw wrote:
>
>> 
>> IOW, pretty trivial stuff.  I'd likely use an 8051 for that too (and
>> pass the crap job off to the firmware group ;-).
>
>In my small company, I *am* the firmware group, and think software 
>design far more than hardware these days :-).

Obviously.  ...even when the solution should be in hardware.
 
>> Nonsense.  I have two solutions (one Actel FPGA and the other an
>> Altera CPLD) for another pretty trivial problem, both under $2.50, no
>> EPROM/flash required.
>
>Not so cheap in the uk in small quantities and more expensive than an 
>silabs 8051. Using a gate array, would still have needed the eprom, as 
>the sine tables wouldn't fit, whereas they just go in code space using 
>an mcu.

Why wouldn't they fit?  Xilinx stuff has piles of RAM/ROM/dual-port
stuff.  The Actel and Altera stuff I'm using is just small enough that
there is no block-RAM.  I'd like to have it but for this application
don't really need it.  

>I get other benefits like self test, an a-d for soft start, 
>voltage regulation, current limiting etc and a serial port for status 
>messaging. There's even a temp sensor on chip !. Makes a far more 
>capable product for a couple of weeks of software effort, which you 
>would need anyway using vhdl.

There is no reason all that stuff couldn't be done in hardware.

>As an aside and have no commercial interest, the Silicon Labs fast 8051 
>series are quite amazing. They are typically 50 mips risc cored updates 
>of the 8051 architecture and the dev kits range from ~$100 down, with 
>all the hardware and dev tools. You can get started building and running 
>the simple demos out of the box within 30 minutes or so. I don't really 
>rate the 8051 architecture that highly, but the latest versions do a 
>good job even with everything written in C.

C.  Ick!

>>> So what complex problems are you solving with gate arrays and what 
>>> speeds ?...
>> 
>> My current "problem" is also pretty trivial[*], yet an FPGA (or CPLD,
>> not sure which) still makes a lot more sense than yet another micro
>> and piles more software complexity.
>>
>
>I guess everything's software now, even hardware design, so if there's 
>not much difference in cost, it probably comes down to what you are most 
>familiar with in the end...

Spoken like a true software weenie.  There is a *tremendous*
difference.  You really should add another arrow to your quiver.

On Fri, 06 Nov 2009 17:28:03 +0000, ChrisQ <m...@devnull.com> wrote:

>krw wrote:
>
>>=20
>> IOW, pretty trivial stuff.  I'd likely use an 8051 for that too (and
>> pass the crap job off to the firmware group ;-).
>
>In my small company, I *am* the firmware group, and think software=20
>design far more than hardware these days :-).
>
>>=20
>> Nonsense.  I have two solutions (one Actel FPGA and the other an
>> Altera CPLD) for another pretty trivial problem, both under $2.50, no
>> EPROM/flash required.
>
>Not so cheap in the uk in small quantities and more expensive than an=20
>silabs 8051. Using a gate array, would still have needed the eprom, as=20
>the sine tables wouldn't fit, whereas they just go in code space using=20
>an mcu. I get other benefits like self test, an a-d for soft start,=20
>voltage regulation, current limiting etc and a serial port for status=20
>messaging. There's even a temp sensor on chip !. Makes a far more=20
>capable product for a couple of weeks of software effort, which you=20
>would need anyway using vhdl.
>
>As an aside and have no commercial interest, the Silicon Labs fast 8051=20
>series are quite amazing. They are typically 50 mips risc cored updates=20
>of the 8051 architecture and the dev kits range from ~$100 down, with=20
>all the hardware and dev tools. You can get started building and running=
=20
>the simple demos out of the box within 30 minutes or so. I don't really=20
>rate the 8051 architecture that highly, but the latest versions do a=20
>good job even with everything written in C.
>
>> =20
>>> So what complex problems are you solving with gate arrays and what=20
>>> speeds ?...
>>=20
>> My current "problem" is also pretty trivial[*], yet an FPGA (or CPLD,
>> not sure which) still makes a lot more sense than yet another micro
>> and piles more software complexity.
>>
>
>I guess everything's software now, even hardware design, so if there's=20
>not much difference in cost, it probably comes down to what you are most=
=20
>familiar with in the end...
>
>Regards,
>
>Chris

Part of the whole idea.  The more tools in your toolbox (all
reasonably well understood) the more and better tradeoffs you can make
between different approaches.
But then again i tend to be a specializing generalist.