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FPGA
Sci.Electronics.Design is a worldwide Usenet news group that is used to discuss various aspects of Electronic Circuit Design.
We found 519 threads matching "fpga"
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The most relevant threads are listed first
FPGA basics
Kodfk Dleepd - 2009-08-22 16:23:00
What is necessary for implemented a basic working FPGA circuit? For a
microchip pic one just needs a stable power supply. I have not found
any basic FPGA circuit's nor how to program them. There is mention in
the manuals about programming but very little. I've bought some FPGA's
but unsure about...
Cons of FPGA
2009-04-16 01:57:00
I don't know so much about FPGA, so: what are tha cons of use it?When
fpga is avoided and an asic is used?
thanks
...Single ended LVDS into FPGA
Nico Coesel - 2009-08-01 13:27:00
Some food fo thought:
I'm working on a new design in which I need to bring 64 LVDS (250Mbps
each/ 125MHz fmax) lines into a Spartan3 FPGA. The distance between
the source and the FPGA is less than 2" / 5cm. Ofcourse there is a
solid ground plane underneath the signals (the board will have at
...Unified FPGA Development Suite
Jon Slaughter - 2009-10-09 22:18:00
Is there a development suite that is good but can target multiple fpga
manufactures? I don't really want to install a bunch of 1GB+ light versions
for each manufacture just to see which one is best. In fact I can't even get
libero to run because it crashes on startup.
Also, know of any links f...Re: 1Gb ethernet design
Slavisa Zigic - 2008-08-11 14:35:00
We need consultant/company to help us design board with two 1Gb ethernet
ports. Generator/receiver should be Xilinx Virtex 4 FPGA. We will take into
consideration all possible solutions: using RocketIO, FPGA + PHY, FPGA +
PowerPC + PHY, etc.
Contact:
zigic@cfrsi.com
+ 1 703 385 7718 ...FPGA/DSP system design problem
2009-05-13 17:13:00
Dear All:
I am thinking about my system, the picture is here:
http://www.flickr.com/photos/26914086@N05/3528643109/sizes/l/
I want to transfer the raw/processed image sensor data to USB 2.0 or
dpram.
Two choices:
1. ADC -> DSP, this means parallel ADC, then DSP processed data ->
U...Ground plane slit?
kmaryan@gmail.com - 2009-02-13 12:28:00
I have an analog circuit (A-D and filter) that has to get placed
relatively close to an FPGA (0.3" between the nearest points on the
FPGA to the closest component of the filter, generally about 1" for
most parts). I'm concerned about picking up any noise from the digital
stuff. My intuition tell...how to choose the FPGA/DSP coprocessor system architecture
2009-05-13 16:54:00
Dear All:
I am thinking about my system, the picture is here:
http://www.flickr.com/photos/26914086@N05/3528643109/sizes/l/
I want to transfer the raw/processed image sensor data to USB 2.0 or
dpram.
Two choices:
1. ADC -> DSP, this means parallel ADC, then DSP processed data ->
U...effect of xray on fpga electronic circuits
recoder - 2008-01-17 03:03:00
Dear All,
As an assignment I have to design a CCD Sensor based FPGA digital
Camera. However, the Camera will be exposed to XRAY (It will be placed
behind an Imaging Intensifier). Does anybody know how XRAY affects the
electronic circuits (The CCD Sensor and the FPGA ). What type of noise
shoul...Programmable clock pulses from FPGA
2008-02-09 23:04:00
Hi,
I am currently working on my final year project and a part of it is
generating programmable clock pulses using an FPGA. I have Xilinx
Spartan 3A development kit and i am working on it. I am also trying to
download my codes to flash memory which is inside the board but I
can't do it. Can a...Re: Looking for VHDL home study course
hrh1818 - 2009-03-01 20:20:00
On Mar 1, 4:22=A0pm, Richard Henry wrote:
> I want to get better at VHDL. =A0I am looking an on-line or CD-based
> training course.
>
> Any suggestions?
This is not a CD but the book "FPGA Prototyping by VHDL Examples" by
Pong P. Chu is a very good book for learning how to use VHDL. ...Optocoupler and probing
john - 2008-03-19 12:44:00
Hello,
I am trying to interface my FPGA board to the DAC board. The DAC needs
four lines from the FPGA to work properly . I optocially isolated the
four lines using four HCPL 2400. I powered up the FPGA board and DAC
board separately using two different DC Lead acid battery (+5volts)
inorder ...Optocoupler and probing
john - 2008-03-19 12:44:00
Hello,
I am trying to interface my FPGA board to the DAC board. The DAC needs
four lines from the FPGA to work properly . I optocially isolated the
four lines using four HCPL 2400. I powered up the FPGA board and DAC
board separately using two different DC Lead acid battery (+5volts)
inorder ...FPGA Camp is 2 days away - 11/11 - silicon valley & Dinner
Vikram - 2009-11-09 17:48:00
To register visit http://www.fpgacentral.com/fpgacamp & yes DINNER
will be provided so bring a friend !!
There are two distinct phases in bringing an FPGA system to market:
the design phase and the debug and verification phase. The primary
tasks in the design phase are entry, simulation, and i...PLL and clock in altera cyclone 2 fpga
Jamie Morken - 2008-12-20 00:13:00
Hi,
I am using a cyclone 2 FPGA, and have a propagation delay warning in one
of the megafunction's, lpm_divide. If we use a slower clock to this
block it will work properly, but the system clock is 27MHz which is too
fast for the bit width's of the numerator and denominator even with
pip...How to connect an ASIC board with the FPGA board
2008-02-27 12:18:00
Hello All,
I would like to know various methods by which one may connect (like
connectors, parallel cable etc.) an ASIC board with an off the shelf
FPGA (may be a Spartan #E starter kit).
Please suggest me ways to do it.
Regards
Hari.
...power supply control
Jamie Morken - 2008-09-14 17:28:00
Hi,
I am using an FPGA to control a SMPS, and was thinking that instead of
the "standard" PID loop type control, maybe it would be useful to
control the power supply using a smarter algorithm. For example if the
components in the power supply are known (ie. inductance, capacitance,
turns...DIY PCIe Card interfacing older PCI based IC's
g.m.k. - 2008-04-18 21:27:00
Hi.
I am interested in building a unmux'd multi-channel PCIe Video Capture card.
While two channel cards are commercially available, I really need a 8 to 16
port card for the research I am looking into. I have considered using
Bt848, Bt849, Bt878 or Bt879 based video capture IC's which are PC...FPGA Recommendation
Abby Brown - 2010-01-29 10:08:00
Hi,
Could you give some FPGA recommendations? Requirements ...
About 2000 cells
Free design software with quick learning curve, data paths
Peripheral voltages compatible with a standard logic family
and RAMs
Easy programming (ICSP) or self loading from EEPROM
Minimal...Graphical User Interface project on Spartan-3 FPGA
Simon Piekert - 2010-06-01 03:46:00
I am a student of Electronics and I am going to do semester work on the
topic "Implementation of Graphical User Interfaces on an Embedded Platform".
We are allowed to choose a project of our own so this is why I am currently
looking for suitable project ideas. The work shall be implemented on ...Source of stackthrough headers for open source FPGA design.
jack.gassett - 2009-06-19 11:51:00
Hello,
I was wondering if anyone had any sources for affordable stackthrough
headers? An example of what I am looking for is the PlugaPods at
http://www.newmicros.com/cgi-bin/store/order.cgi?form=prod_detail&part=PlugaPodS.
I'm trying to accomplish a similar thing for my Open Source FPGA
de...Altera ByteBlaster II Fully Compatible cable. Only $36.95 USD
vhdlguy@gmail.com - 2008-01-22 11:30:00
FPGA Downloader ByteBlaster II for Altera FPGA/EPLD - ONLY $36.95
Works with any voltage from target board 1.8 V - 5.5 V
Replaces Altera ByteBlaster , ByteBlaster MV downloader and
ByteBlaster II
You will never need another downloader
Please visit us at: http://fpgaguy.110mb.com
Sincer...Re: A good digital oscilloscope?
krw - 2009-12-31 14:20:00
On Thu, 31 Dec 2009 10:55:25 -0800, John Larkin
wrote:
> On Thu, 31 Dec 2009 12:47:13 -0600, krw wrote:
>
> > On Thu, 31 Dec 2009 09:42:53 -0800, John Larkin
> > wrote:
> >
> > > On Wed, 30 Dec 2009 20:23:23 -0600, krw wrote:
> > > >
> > > > Where I am now, I'm not "allowed...Re: Board Design
Terry Given - 2008-03-01 20:39:00
sky465nm@trline5.org wrote:
> > a long time ago, in a galaxy far, far away, I started out as a digital
> > guy, but then saw the light. so nowadays I do all the analogue stuff,
> > and drool at the awesome FPGAs the digital guys get to play with (but
> > dislike the PSU ramp requirements of t...Looking for a connector
uforians - 2008-12-27 19:49:00
Hello,
I am trying to use a LCD panel from a old Dell laptop. I dismantled
the panel. I have a FPGA kit and found a LCD controller from opencores
site. I need to find a way to interface the FPGA to the panel. On the
kit side, it is basic 40-pin IDE connector. But I am unable to
identify the c...LVTTL to RS-232 adaptor
2008-05-29 06:16:00
Hello,
I am looking for a LVTTL to RS-232 adaptor.
I found a similar adaptor http://www.hvwtech.com/products_view.asp?ProductID=289
But this adoptor does TTL to RS-232.
Since I plan to convert the LVTTL output from a Virtex-4 FPGA to
RS-232 signal, I need LVTTL to RS-232 adaptor.
Virtex-...FGPA for deseralization?
Jon Slaughter - 2009-10-01 18:43:00
I imagine an FPGA could make a pretty simple task of deserializing a bit
stream to multiple targets? Basically I want to encode a serial data stream
for multiple IC's to reduce the data rate. The idea is that each ic has a
"state" and I want to modify that state when needed. The state must be ...delta sigma dac
2009-01-05 18:36:00
Hi,
I am trying to build a delta-sigma dac using the outputs of an
fpga. I need about 30mhz bandwidth and 8-10 bits. I was going to use
an 8-bit r-2r ladder, but the i/o requirements are huge since i need
16 channels. The maximum output rate of the fpga pins is about 300mhz
which is far ...Re: Nanoboard
Nial Stewart - 2010-02-26 08:17:00
> While I don't feel everything on it is in any way great since everything can be done individually
> what is nice about it is the cost and the convience... assuming it is well put together and not a
> chore to dev on.
Not a comment on the Nanoboard as a hardware platform but...
How wou...Re: Disobeying jet engines - why?
Jan Panteltje - 2008-01-30 15:15:00
On a sunny day (Wed, 30 Jan 2008 10:28:23 -0800 (PST)) it happened Didi
wrote in
:
> I do not take seriously any embedded thing written in C or any HLL for
> that.
eh, using C, with the modern compilers highly optimising,
they 'know' the processor', may actually improve performance,...Re: Help on picking a part to use
John Larkin - 2009-01-17 18:53:00
On Sat, 17 Jan 2009 15:31:44 -0800 (PST), bulegoge@columbus.rr.com
wrote:
> I have outputs from 4 A/D's. Each output is 8 bits ( // output ) and
> will likely be sampled at 40MHz.
>
> I need to manipulate that data in some kind of device. This includes
> level shifting, multiplying the d...Re: Looking for a LT1765 pin-compatible buck regulator with Iout>=3.5A
MM - 2008-11-13 18:40:00
Well, the regulator is supplying core voltage for an FPGA. Since I'd posted
the question I managed to drop the current to about 2.4A by changing the
FPGA design . The heat problem still remains, but a quick experiment with
adding a heatsink showed that this solution will work.
/MM
"M...Re: Backplanes and daughter boards. Connecting the same signal lines to a large number of boards/chips
Nial Stewart - 2010-08-12 08:33:00
> It's a serial bus (CLK+DATA) plus some other control signals that are
> relatively constant. Communication is bidirectional. would the VME bus
> be still relevant in this case?
If I had to design something that was guaranteed to work I'd have a 'master'
FPGA driving point to point LVDS/...Re: Terminate or not?
John Larkin - 2010-03-17 13:06:00
On Wed, 17 Mar 2010 12:59:30 -0000, "Mr.G"
wrote:
> Is there any rule of thumb which says whether digital traces need to be
> terminated or not?
> Specifically with QDRII and DDR2 memory interfaces where the trace length is
> likely to be max 50mm, and a clock speed of 250MHz.
> Thanks....Re: MsPacMan
krw@att.bizzzzzzzzzzzz - 2010-07-18 20:18:00
On Sun, 18 Jul 2010 16:24:03 -0700, John Larkin
wrote:
> On Sun, 18 Jul 2010 17:55:09 -0500, "krw@att.bizzzzzzzzzzzz"
> wrote:
>
> > On Sun, 18 Jul 2010 15:51:54 -0700, John Larkin
> > wrote:
> >
> > > On Sun, 18 Jul 2010 14:26:45 -0700, "Joel Koltner"
> > > wrote:
> > >
...Optimizations for Inrush current
M. Hamed - 2008-05-19 14:27:00
I have a USB-powered board which draws a lot of inrush current (close
to 1A) on startup. This leads to problems with the USB interface with
the computer and also the voltage level droop seen by the devices on
the board. Now I am faced with the task of figuring out a way to solve
this problem but...fpga memory issues
Jon Slaughter - 2009-10-07 23:01:00
http://www.actel.com/documents/PA3_nano_DS.pdf
I'm trying to determine if the A3PN010 can do what I need. It's relatively
cheap and will probably handle almost everything I need for my application
except I need some memory.
The fgpa will simply act as a translator/deserializer/"hub". Sever...Re: Power supply protection networks
krw - 2009-06-20 08:15:00
On Sat, 20 Jun 2009 03:12:18 -0500, "Tim Williams"
wrote:
> "krw" wrote in message
> news:309o35t3fda1n6oo3v75k17r2n125757n2@4ax.com...
> > > So? I don't give a shit what's in the black box. ;-)
> >
> > You would if the guy that did the stuff inside the black box,
> > couldn't.
...Re: PCB Encapsulants to Annoy Copy Pirates
MooseFET - 2009-11-02 21:35:00
On Nov 2, 1:16=A0pm, D from BC wrote:
> I'd like to pot my smt pcb with the nastiest sh*t possible to make it
> hell for copy cats..
>
> So far I've found:
>
> http://www.mgchemicals.com/products/832ht.html
> 'Extremely difficult to remove - grants incredible technology
> protecti...LVPECL to PECL to LVPECL
Rene Tschaggelar - 2010-05-16 09:00:00
The supply variety on ECL parts in general has ever
been diminishing over the years, the variety is not
even continuous. I should now connect an FPGA to a
bunch of ECLs. The LVDS to LVPECL translation can be
done with a 65LVDS100. Further I can only find a few
ECL parts and finally I should con...