On Mon, 8 Dec 2008 17:53:44 -0800 (PST), MooseFET <k...@rahul.net>
wrote:

>On Dec 8, 8:55 am, John Fields <jfie...@austininstruments.com> wrote:
>> On Sun, 7 Dec 2008 17:02:55 -0800 (PST), MooseFET <kensm...@rahul.net>
>> wrote:
>>
>>
>>
>> >On Dec 7, 10:31 am, John Fields <jfie...@austininstruments.com> wrote:
>> >> On Sun, 07 Dec 2008 14:33:09 GMT, N0S...@daqarta.com (Bob Masta) wrote:
>> >> >On Sat, 06 Dec 2008 08:20:51 -0600, John Fields
>> >> ><jfie...@austininstruments.com> wrote:
>> >> >>I think the trick is to get rid of the up-counter and to load the
>> >> >>numerical output from the peak detector into the down-counter, then to
>> >> >>count it down after the next zero crossing.
>>
>> >> >The problem is that the peak detector as shown
>> >> >only detects the peak *time* (as a count), which
>> >> >contains no information about amplitude... only
>> >> >*when* the peak arrived.
>>
>> >> ---
>> >> Right.
>> >> What I had in mind was a digital peak detector using an ADC, a couple of
>> >> latches and a magnitude comparator.
>>
>> >> I'm working on the schematic of the whole thing right now and I'll post
>> >> it to abse when I'm done, which will probably be late this afternoon or
>> >> early tomorrow.
>>
>> >How about this:
>>
>> >If you integrate (sum) the ADC output over a half cycle, the total
>> >will give the length of time to hold the output high on the next half
>> >cycle.  This makes your amplitude the average rectified instead of the
>> >peak but that seems just as good.
>>
>> ---
>> Maybe even better, since it gets rid of the peak detector!
>>
>> The down side I see, in hardware, is the need for 16 bit adders to do
>> the integration for an 8 bit input.
>
>You don't need real 16 bit adders because the ADC is much slower than
>HC logic.  You can use a serial adder.
>
>Another idea would be to have a 20MHz clock and a 20KHz saw tooth.
>Any time the voltage is greater than the sawtooth, the counter is
>enabled.  By using a somewhat perverted sort of ADC, you get the
>summing action with just counting.  It is only good to about 10 bits
>on the ADC but perhaps that is enough.
>
>>
>> Here's what I've got so far:
>>
>> news:b...@4ax.com
>
>Unfortunately I can't deal with the URL.  Perhaps if I wasn't so lazy
>I would have a real news reader, but if a sled had wheels it would be
>a wagon too.
>
>>
>> I did it in 4 bits instead of 8 because I thought that would make it
>> simpler but, in actuality, doing it in 8 ( using an HC688 for the
>> magnitude comparator, a couple of HC273's for the input latches, an
>> HC40103 for the counter and a single HC175 instead of the HC74's) would
>> have resulted in one less chip.
>>
>> If I get ambitious I'll redraw it... :-)
>
>Did someone already say "use a PIC" yet?.  This sort of thing would be
>falling off a log simple with something like Cygnal F120 processor.
>You could sample the ADC at 40KHz and use one of the DACs to make the
>output pulses.  With just some lightning protection and a 3.3V
>regulator, the who thing would be done.

---
Geez, where's the fun in that? ;)

Besides I seem to recall the OP (who seems to have dropped off the face
of the earth) asked for a hardware solution.

JF  

On Mon, 8 Dec 2008 17:53:44 -0800 (PST), MooseFET <k...@rahul.net>
wrote:

>On Dec 8, 8:55 am, John Fields <jfie...@austininstruments.com> wrote:
>> On Sun, 7 Dec 2008 17:02:55 -0800 (PST), MooseFET <kensm...@rahul.net>
>> wrote:
>>
>>
>>
>> >On Dec 7, 10:31 am, John Fields <jfie...@austininstruments.com> wrote:
>> >> On Sun, 07 Dec 2008 14:33:09 GMT, N0S...@daqarta.com (Bob Masta) wrote:
>> >> >On Sat, 06 Dec 2008 08:20:51 -0600, John Fields
>> >> ><jfie...@austininstruments.com> wrote:
>> >> >>I think the trick is to get rid of the up-counter and to load the
>> >> >>numerical output from the peak detector into the down-counter, then to
>> >> >>count it down after the next zero crossing.
>>
>> >> >The problem is that the peak detector as shown
>> >> >only detects the peak *time* (as a count), which
>> >> >contains no information about amplitude... only
>> >> >*when* the peak arrived.
>>
>> >> ---
>> >> Right.
>> >> What I had in mind was a digital peak detector using an ADC, a couple of
>> >> latches and a magnitude comparator.
>>
>> >> I'm working on the schematic of the whole thing right now and I'll post
>> >> it to abse when I'm done, which will probably be late this afternoon or
>> >> early tomorrow.
>>
>> >How about this:
>>
>> >If you integrate (sum) the ADC output over a half cycle, the total
>> >will give the length of time to hold the output high on the next half
>> >cycle.  This makes your amplitude the average rectified instead of the
>> >peak but that seems just as good.
>>
>> ---
>> Maybe even better, since it gets rid of the peak detector!
>>
>> The down side I see, in hardware, is the need for 16 bit adders to do
>> the integration for an 8 bit input.
>
>You don't need real 16 bit adders because the ADC is much slower than
>HC logic.  You can use a serial adder.
>
>Another idea would be to have a 20MHz clock and a 20KHz saw tooth.
>Any time the voltage is greater than the sawtooth, the counter is
>enabled.  By using a somewhat perverted sort of ADC, you get the
>summing action with just counting.  It is only good to about 10 bits
>on the ADC but perhaps that is enough.
>
>>
>> Here's what I've got so far:
>>
>> news:b...@4ax.com
>
>Unfortunately I can't deal with the URL.  Perhaps if I wasn't so lazy
>I would have a real news reader, but if a sled had wheels it would be
>a wagon too.

---
I'll email you a copy if you like.

JF  

On Dec 9, 2:18=A0pm, John Fields <jfie...@austininstruments.com> wrote:
> On Mon, 8 Dec 2008 17:53:44 -0800 (PST), MooseFET <kensm...@rahul.net>
> wrote:
>
>
>
> >On Dec 8, 8:55=A0am, John Fields <jfie...@austininstruments.com> wrote:
> >> On Sun, 7 Dec 2008 17:02:55 -0800 (PST), MooseFET <kensm...@rahul.net>
> >> wrote:
>
> >> >On Dec 7, 10:31=A0am, John Fields <jfie...@austininstruments.com> wro=
te:
> >> >> On Sun, 07 Dec 2008 14:33:09 GMT, N0S...@daqarta.com (Bob Masta) wr=
ote:
> >> >> >On Sat, 06 Dec 2008 08:20:51 -0600, John Fields
> >> >> ><jfie...@austininstruments.com> wrote:
> >> >> >>I think the trick is to get rid of the up-counter and to load the
> >> >> >>numerical output from the peak detector into the down-counter, th=
en to
> >> >> >>count it down after the next zero crossing.
>
> >> >> >The problem is that the peak detector as shown
> >> >> >only detects the peak *time* (as a count), which
> >> >> >contains no information about amplitude... only
> >> >> >*when* the peak arrived.
>
> >> >> ---
> >> >> Right.
> >> >> What I had in mind was a digital peak detector using an ADC, a coup=
le of
> >> >> latches and a magnitude comparator.
>
> >> >> I'm working on the schematic of the whole thing right now and I'll =
post
> >> >> it to abse when I'm done, which will probably be late this afternoo=
n or
> >> >> early tomorrow.
>
> >> >How about this:
>
> >> >If you integrate (sum) the ADC output over a half cycle, the total
> >> >will give the length of time to hold the output high on the next half
> >> >cycle. =A0This makes your amplitude the average rectified instead of =
the
> >> >peak but that seems just as good.
>
> >> ---
> >> Maybe even better, since it gets rid of the peak detector!
>
> >> The down side I see, in hardware, is the need for 16 bit adders to do
> >> the integration for an 8 bit input.
>
> >You don't need real 16 bit adders because the ADC is much slower than
> >HC logic. =A0You can use a serial adder.
>
> >Another idea would be to have a 20MHz clock and a 20KHz saw tooth.
> >Any time the voltage is greater than the sawtooth, the counter is
> >enabled. =A0By using a somewhat perverted sort of ADC, you get the
> >summing action with just counting. =A0It is only good to about 10 bits
> >on the ADC but perhaps that is enough.
>
> >> Here's what I've got so far:
>
> >>news:b...@4ax.com
>
> >Unfortunately I can't deal with the URL. =A0Perhaps if I wasn't so lazy
> >I would have a real news reader, but if a sled had wheels it would be
> >a wagon too.
>
> >> I did it in 4 bits instead of 8 because I thought that would make it
> >> simpler but, in actuality, doing it in 8 ( using an HC688 for the
> >> magnitude comparator, a couple of HC273's for the input latches, an
> >> HC40103 for the counter and a single HC175 instead of the HC74's) woul=
d
> >> have resulted in one less chip.
>
> >> If I get ambitious I'll redraw it... :-)
>
> >Did someone already say "use a PIC" yet?. =A0This sort of thing would be
> >falling off a log simple with something like Cygnal F120 processor.
> >You could sample the ADC at 40KHz and use one of the DACs to make the
> >output pulses. =A0With just some lightning protection and a 3.3V
> >regulator, the who thing would be done.
>
> ---
> Geez, where's the fun in that? ;)
>
> Besides I seem to recall the OP (who seems to have dropped off the face
> of the earth) asked for a hardware solution.

I find myself losing interest now that the problem appears to be not
all that hard to solve.  If I had to do it with all hardware, I would
look at the ramp ADC method I suggested elsewhere but it has too many
parts in it even at that.

Was there some reason that analog oneshot like circuits got
abandoned?  It seems like they would do what the OP wanted well
enough.

>
> JF =A0

On Dec 9, 2:24=C2=A0pm, John Fields <jfie...@austininstruments.com> wrote:
> On Mon, 8 Dec 2008 17:53:44 -0800 (PST), MooseFET <kensm...@rahul.net>
> wrote:
>
>
>
> >On Dec 8, 8:55=C2=A0am, John Fields <jfie...@austininstruments.com> wrot=
e:
> >> On Sun, 7 Dec 2008 17:02:55 -0800 (PST), MooseFET <kensm...@rahul.net>
> >> wrote:
>
> >> >On Dec 7, 10:31=C2=A0am, John Fields <jfie...@austininstruments.com> =
wrote:
> >> >> On Sun, 07 Dec 2008 14:33:09 GMT, N0S...@daqarta.com (Bob Masta) wr=
ote:
> >> >> >On Sat, 06 Dec 2008 08:20:51 -0600, John Fields
> >> >> ><jfie...@austininstruments.com> wrote:
> >> >> >>I think the trick is to get rid of the up-counter and to load the
> >> >> >>numerical output from the peak detector into the down-counter, th=
en to
> >> >> >>count it down after the next zero crossing.
>
> >> >> >The problem is that the peak detector as shown
> >> >> >only detects the peak *time* (as a count), which
> >> >> >contains no information about amplitude... only
> >> >> >*when* the peak arrived.
>
> >> >> ---
> >> >> Right.
> >> >> What I had in mind was a digital peak detector using an ADC, a coup=
le of
> >> >> latches and a magnitude comparator.
>
> >> >> I'm working on the schematic of the whole thing right now and I'll =
post
> >> >> it to abse when I'm done, which will probably be late this afternoo=
n or
> >> >> early tomorrow.
>
> >> >How about this:
>
> >> >If you integrate (sum) the ADC output over a half cycle, the total
> >> >will give the length of time to hold the output high on the next half
> >> >cycle. =C2=A0This makes your amplitude the average rectified instead =
of the
> >> >peak but that seems just as good.
>
> >> ---
> >> Maybe even better, since it gets rid of the peak detector!
>
> >> The down side I see, in hardware, is the need for 16 bit adders to do
> >> the integration for an 8 bit input.
>
> >You don't need real 16 bit adders because the ADC is much slower than
> >HC logic. =C2=A0You can use a serial adder.
>
> >Another idea would be to have a 20MHz clock and a 20KHz saw tooth.
> >Any time the voltage is greater than the sawtooth, the counter is
> >enabled. =C2=A0By using a somewhat perverted sort of ADC, you get the
> >summing action with just counting. =C2=A0It is only good to about 10 bit=
s
> >on the ADC but perhaps that is enough.
>
> >> Here's what I've got so far:
>
> >>news:b...@4ax.com
>
> >Unfortunately I can't deal with the URL. =C2=A0Perhaps if I wasn't so la=
zy
> >I would have a real news reader, but if a sled had wheels it would be
> >a wagon too.
>
> ---
> I'll email you a copy if you like.
Spice biffs every time I put the comparitor in but you'll get the
idea.

I'm sure it is more complex than needs be

Version 4
SHEET 1 11172 2756
WIRE 2448 -2864 2112 -2864
WIRE 2112 -2816 2112 -2864
WIRE 2064 -2800 2032 -2800
WIRE 2064 -2752 2000 -2752
WIRE 1728 -2672 1696 -2672
WIRE 2112 -2672 2112 -2736
WIRE 2112 -2672 1808 -2672
WIRE 2112 -2640 2112 -2672
WIRE 2256 -2640 2112 -2640
WIRE 2448 -2640 2448 -2864
WIRE 2448 -2640 2320 -2640
WIRE 1792 -2608 1792 -2624
WIRE 1840 -2608 1792 -2608
WIRE 2448 -2576 2448 -2640
WIRE 2976 -2576 2448 -2576
WIRE 1744 -2560 1744 -2624
WIRE 2272 -2496 2272 -2512
WIRE 2112 -2480 2112 -2640
WIRE 2240 -2480 2112 -2480
WIRE 2448 -2464 2448 -2576
WIRE 2448 -2464 2304 -2464
WIRE 2240 -2448 2224 -2448
WIRE 2272 -2400 2272 -2432
WIRE 2976 -2064 2976 -2576
WIRE 3440 -2064 2976 -2064
WIRE 3712 -2064 3520 -2064
WIRE 2480 -2016 2144 -2016
WIRE 3504 -2000 3504 -2016
WIRE 3552 -2000 3504 -2000
WIRE 2144 -1968 2144 -2016
WIRE 2096 -1952 2064 -1952
WIRE 3456 -1952 3456 -2016
WIRE 2096 -1904 2032 -1904
WIRE 1696 -1824 1696 -2672
WIRE 1760 -1824 1696 -1824
WIRE 2144 -1824 2144 -1888
WIRE 2144 -1824 1840 -1824
WIRE 2144 -1792 2144 -1824
WIRE 2288 -1792 2144 -1792
WIRE 2480 -1792 2480 -2016
WIRE 2480 -1792 2352 -1792
WIRE 2640 -1792 2480 -1792
WIRE 2640 -1776 2640 -1792
WIRE 3440 -1776 2640 -1776
WIRE 3712 -1776 3712 -2064
WIRE 3712 -1776 3520 -1776
WIRE 1824 -1760 1824 -1776
WIRE 1872 -1760 1824 -1760
WIRE 1776 -1712 1776 -1776
WIRE 3504 -1712 3504 -1728
WIRE 3552 -1712 3504 -1712
WIRE 3456 -1664 3456 -1728
WIRE 2304 -1648 2304 -1664
WIRE 2144 -1632 2144 -1792
WIRE 2272 -1632 2144 -1632
WIRE 2480 -1616 2480 -1792
WIRE 2480 -1616 2336 -1616
WIRE 2272 -1600 2256 -1600
WIRE 2304 -1552 2304 -1584
WIRE 3456 -1488 3040 -1488
WIRE 3712 -1488 3712 -1776
WIRE 3712 -1488 3536 -1488
WIRE 3712 -1472 3712 -1488
WIRE 3840 -1472 3712 -1472
WIRE 4624 -1472 3840 -1472
WIRE 3520 -1424 3520 -1440
WIRE 3568 -1424 3520 -1424
WIRE 3472 -1376 3472 -1440
WIRE 3840 -1360 3840 -1472
WIRE 2480 -1280 2144 -1280
WIRE 3040 -1280 3040 -1488
WIRE 3040 -1280 2480 -1280
WIRE 3840 -1248 3840 -1280
WIRE 2144 -1232 2144 -1280
WIRE 2096 -1216 2064 -1216
WIRE 3456 -1184 3088 -1184
WIRE 3712 -1184 3712 -1472
WIRE 3712 -1184 3536 -1184
WIRE 2096 -1168 2032 -1168
WIRE 3520 -1120 3520 -1136
WIRE 3568 -1120 3520 -1120
WIRE 1696 -1088 1696 -1824
WIRE 1760 -1088 1696 -1088
WIRE 2144 -1088 2144 -1152
WIRE 2144 -1088 1840 -1088
WIRE 3472 -1072 3472 -1136
WIRE 2144 -1056 2144 -1088
WIRE 2288 -1056 2144 -1056
WIRE 2480 -1056 2480 -1280
WIRE 2480 -1056 2352 -1056
WIRE 1824 -1024 1824 -1040
WIRE 1872 -1024 1824 -1024
WIRE 1776 -976 1776 -1040
WIRE 2304 -912 2304 -928
WIRE 2144 -896 2144 -1056
WIRE 2272 -896 2144 -896
WIRE 2480 -880 2480 -1056
WIRE 2480 -880 2336 -880
WIRE 2272 -864 2256 -864
WIRE 2304 -816 2304 -848
WIRE 2512 -432 2176 -432
WIRE 3088 -432 3088 -1184
WIRE 3088 -432 2512 -432
WIRE 2176 -384 2176 -432
WIRE 2128 -368 2096 -368
WIRE 2128 -320 2064 -320
WIRE 5504 -288 5504 -304
WIRE 928 -272 768 -272
WIRE 976 -272 928 -272
WIRE 1136 -272 1056 -272
WIRE 1200 -272 1136 -272
WIRE 1296 -272 1280 -272
WIRE 1296 -240 1296 -272
WIRE 1472 -240 1296 -240
WIRE 1696 -240 1696 -1088
WIRE 1696 -240 1552 -240
WIRE 1792 -240 1696 -240
WIRE 2176 -240 2176 -304
WIRE 2176 -240 1872 -240
WIRE 5360 -224 5360 -288
WIRE 2176 -208 2176 -240
WIRE 2320 -208 2176 -208
WIRE 2512 -208 2512 -432
WIRE 2512 -208 2384 -208
WIRE 5328 -192 4912 -192
WIRE 1856 -176 1856 -192
WIRE 1904 -176 1856 -176
WIRE 5504 -176 5504 -208
WIRE 5504 -176 5408 -176
WIRE 5648 -176 5504 -176
WIRE 928 -160 928 -272
WIRE 4624 -160 4624 -1472
WIRE 5328 -160 4624 -160
WIRE 880 -144 848 -144
WIRE 1184 -128 1184 -144
WIRE 1808 -128 1808 -192
WIRE 1136 -112 1136 -272
WIRE 1152 -112 1136 -112
WIRE 5360 -112 5360 -128
WIRE 5440 -112 5360 -112
WIRE 880 -96 656 -96
WIRE 1296 -96 1296 -240
WIRE 1296 -96 1216 -96
WIRE 5344 -96 5344 -128
WIRE 5376 -96 5376 -128
WIRE 5376 -96 5344 -96
WIRE 1104 -80 928 -80
WIRE 1152 -80 1104 -80
WIRE 5344 -80 5344 -96
WIRE 2336 -64 2336 -80
WIRE 928 -48 928 -80
WIRE 2176 -48 2176 -208
WIRE 2304 -48 2176 -48
WIRE 880 -32 848 -32
WIRE 1184 -32 1184 -64
WIRE 2512 -32 2512 -208
WIRE 2512 -32 2368 -32
WIRE 2304 -16 2288 -16
WIRE 1104 0 1104 -80
WIRE 656 16 656 -96
WIRE 752 16 656 16
WIRE 880 16 816 16
WIRE 2336 32 2336 0
WIRE 928 48 928 32
WIRE -384 64 -384 48
WIRE 32 64 0 64
WIRE 32 80 32 64
WIRE 0 112 -112 112
WIRE 144 112 80 112
WIRE 176 112 144 112
WIRE 288 112 256 112
WIRE 384 112 384 80
WIRE 384 112 288 112
WIRE 544 112 384 112
WIRE 656 112 656 16
WIRE 656 112 544 112
WIRE 1104 112 1104 80
WIRE 288 128 288 112
WIRE 0 144 -64 144
WIRE -384 160 -384 144
WIRE 32 192 32 176
WIRE 48 192 48 176
WIRE 48 192 32 192
WIRE 640 192 592 192
WIRE 736 192 640 192
WIRE 992 192 816 192
WIRE 16 208 16 176
WIRE 16 208 0 208
WIRE 48 224 48 192
WIRE 288 224 288 192
WIRE 1088 224 1040 224
WIRE 1200 224 1168 224
WIRE 1328 224 1200 224
WIRE 592 240 592 192
WIRE 4016 272 3888 272
WIRE -144 304 -192 304
WIRE -64 304 -64 144
WIRE 0 304 -64 304
WIRE 144 304 144 112
WIRE 144 304 80 304
WIRE -448 320 -448 304
WIRE -368 320 -368 304
WIRE 640 320 640 192
WIRE 688 320 640 320
WIRE 928 320 848 320
WIRE 1040 320 1040 224
WIRE 1040 320 928 320
WIRE 1200 320 1200 288
WIRE 592 336 592 304
WIRE 3888 336 3888 272
WIRE 4576 336 4400 336
WIRE 4912 336 4912 -192
WIRE 4912 336 4576 336
WIRE 4016 352 4016 272
WIRE 544 368 544 112
WIRE 688 368 544 368
WIRE 1088 368 864 368
WIRE 1200 368 1168 368
WIRE 1344 368 1344 304
WIRE 1344 368 1200 368
WIRE -448 416 -448 400
WIRE -368 416 -368 400
WIRE 1200 464 1200 432
WIRE 4480 480 4480 464
WIRE 640 496 608 496
WIRE 720 496 640 496
WIRE 928 496 928 320
WIRE 928 496 800 496
WIRE 4400 496 4400 336
WIRE 4448 496 4400 496
WIRE 4576 512 4576 336
WIRE 4576 512 4512 512
WIRE 608 528 608 496
WIRE 4016 528 4016 432
WIRE 4272 528 4016 528
WIRE 4448 528 4352 528
WIRE 1072 544 944 544
WIRE 1184 544 1152 544
WIRE 1376 544 1184 544
WIRE 4016 560 4016 528
WIRE 4016 560 3952 560
WIRE 4096 560 4016 560
WIRE 4480 592 4480 544
WIRE 640 608 640 496
WIRE 688 608 640 608
WIRE 944 608 944 544
WIRE 944 608 848 608
WIRE 3952 608 3952 560
WIRE 608 624 608 592
WIRE 4096 624 4096 560
WIRE 1184 640 1184 608
WIRE 1392 640 1392 512
WIRE 1680 640 1392 640
WIRE 544 656 544 368
WIRE 688 656 544 656
WIRE 992 656 992 192
WIRE 992 656 864 656
WIRE 1840 656 1744 656
WIRE 3696 656 3632 656
WIRE 3840 656 3776 656
WIRE 3888 656 3840 656
WIRE 992 688 992 656
WIRE 1072 688 992 688
WIRE 1184 688 1152 688
WIRE 1392 688 1392 640
WIRE 1392 688 1184 688
WIRE 1344 704 1344 368
WIRE 1680 704 1344 704
WIRE 2944 720 2848 720
WIRE 3408 720 2944 720
WIRE 3632 720 3632 656
WIRE 3952 720 3952 704
WIRE 4096 720 4096 688
WIRE 1328 736 1328 224
WIRE 1680 736 1328 736
WIRE 3584 736 3472 736
WIRE 1840 752 1744 752
WIRE 1184 784 1184 752
WIRE 2944 784 2944 720
WIRE 2992 784 2944 784
WIRE 3120 784 3056 784
WIRE 3264 784 3200 784
WIRE 3408 784 3264 784
WIRE 3584 784 3552 784
WIRE 1392 800 1392 688
WIRE 1680 800 1392 800
WIRE 3264 816 3264 784
WIRE 3552 816 3552 784
WIRE 1328 832 1328 736
WIRE 1680 832 1328 832
WIRE 3632 832 3632 800
WIRE 1840 848 1744 848
WIRE 1376 896 1376 544
WIRE 1680 896 1376 896
WIRE 3264 912 3264 880
WIRE 1344 928 1344 704
WIRE 1680 928 1344 928
WIRE 1840 944 1744 944
WIRE 1376 992 1376 896
WIRE 1680 992 1376 992
WIRE 3728 1056 3664 1056
WIRE 3840 1056 3840 656
WIRE 3840 1056 3808 1056
WIRE 1376 1072 1376 992
WIRE 1872 1072 1376 1072
WIRE 3664 1072 3664 1056
WIRE 1344 1120 1344 928
WIRE 1872 1120 1344 1120
WIRE 1392 1168 1392 800
WIRE 1872 1168 1392 1168
WIRE 3664 1168 3664 1152
WIRE 1328 1216 1328 832
WIRE 1872 1216 1328 1216
WIRE 1328 1376 1328 1216
WIRE 1344 1376 1344 1120
WIRE 1376 1376 1376 1072
WIRE 1392 1376 1392 1168
FLAG -384 160 0
FLAG -384 48 signal
FLAG 48 224 0
FLAG 0 64 vcc
FLAG -112 112 signal
FLAG 0 208 vee
FLAG -192 304 0
FLAG -448 416 0
FLAG -368 416 0
FLAG -448 304 vcc
FLAG -368 304 vee
FLAG 384 80 IsNeg
FLAG 768 -272 signal
FLAG 848 -144 0
FLAG 848 -32 0
FLAG 928 48 0
FLAG 1184 -144 vcc
FLAG 1184 -32 vee
FLAG 608 624 0
FLAG 592 336 0
FLAG 2272 -2512 vcc
FLAG 2272 -2400 vee
FLAG 2224 -2448 0
FLAG 1744 -2560 0
FLAG 2032 -2800 0
FLAG 1840 656 state0
FLAG 1840 752 state1
FLAG 1840 848 state2
FLAG 1840 944 state3
FLAG 1872 1072 dis0
FLAG 1872 1120 dis1
FLAG 1872 1168 dis2
FLAG 1872 1216 dis3
FLAG 1840 -2608 state0
FLAG 2000 -2752 dis0
FLAG 2304 -1664 vcc
FLAG 2304 -1552 vee
FLAG 2256 -1600 0
FLAG 1776 -1712 0
FLAG 2064 -1952 0
FLAG 1872 -1760 state1
FLAG 2032 -1904 dis1
FLAG 2304 -928 vcc
FLAG 2304 -816 vee
FLAG 2256 -864 0
FLAG 1776 -976 0
FLAG 2064 -1216 0
FLAG 1872 -1024 state2
FLAG 2032 -1168 dis2
FLAG 2336 -80 vcc
FLAG 2336 32 vee
FLAG 2288 -16 0
FLAG 1808 -128 0
FLAG 2096 -368 0
FLAG 1904 -176 state3
FLAG 2064 -320 dis3
FLAG 1104 112 0
FLAG 3456 -1952 0
FLAG 3552 -2000 state1
FLAG 3472 -1072 0
FLAG 3568 -1120 state0
FLAG 3456 -1664 0
FLAG 3552 -1712 state2
FLAG 3472 -1376 0
FLAG 3568 -1424 state3
FLAG 3840 -1248 0
FLAG 288 224 0
FLAG 1200 464 0
FLAG 1200 320 0
FLAG 1184 784 0
FLAG 1184 640 0
FLAG 3264 912 0
FLAG 2848 720 IsNeg
FLAG 3952 720 0
FLAG 4096 720 0
FLAG 3552 816 0
FLAG 3632 832 0
FLAG 3888 336 0
FLAG 3664 1168 0
FLAG 4480 464 vcc
FLAG 4480 592 vee
FLAG 5360 -288 vcc
FLAG 5344 -80 0
FLAG 5440 -112 vee
FLAG 5504 -304 vcc
FLAG 5648 -176 PWMout
SYMBOL voltage -384 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 100)
SYMBOL Comparators\\LT1116 32 64 R0
SYMATTR InstName U1
SYMBOL res -48 288 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 96 288 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -448 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -368 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL res 1072 -288 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 5k
SYMBOL res 1296 -288 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 5k
SYMBOL sw 928 -176 R0
SYMATTR InstName S1
SYMATTR Value SW1
SYMBOL sw 928 -64 R0
SYMATTR InstName S2
SYMATTR Value SW1
SYMBOL Digital\\dflop 768 272 R0
SYMATTR InstName A2
SYMBOL Digital\\dflop 768 560 R0
SYMATTR InstName A3
SYMBOL cap 576 240 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL cap 592 528 R0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL res 832 176 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R6
SYMATTR Value 100
SYMBOL res 816 480 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R7
SYMATTR Value 100
SYMBOL cap 2320 -2656 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C6
SYMATTR Value 5=EF=BF=BD
SYMBOL sw 1712 -2672 R270
SYMATTR InstName S9
SYMATTR Value SW1
SYMBOL sw 2112 -2832 R0
SYMATTR InstName S10
SYMATTR Value SW1
SYMBOL Digital\\and 1712 608 R0
SYMATTR InstName A4
SYMBOL Digital\\and 1712 704 R0
SYMATTR InstName A5
SYMBOL Digital\\and 1712 800 R0
SYMATTR InstName A6
SYMBOL Digital\\and 1712 896 R0
SYMATTR InstName A7
SYMBOL cap 2352 -1808 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C1
SYMATTR Value 5=EF=BF=BD
SYMBOL sw 1744 -1824 R270
SYMATTR InstName S3
SYMATTR Value SW1
SYMBOL sw 2144 -1984 R0
SYMATTR InstName S4
SYMATTR Value SW1
SYMBOL cap 2352 -1072 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C4
SYMATTR Value 5=EF=BF=BD
SYMBOL sw 1744 -1088 R270
SYMATTR InstName S5
SYMATTR Value SW1
SYMBOL sw 2144 -1248 R0
SYMATTR InstName S6
SYMATTR Value SW1
SYMBOL res 1568 -256 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R9
SYMATTR Value 1k
SYMBOL cap 2384 -224 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C5
SYMATTR Value 5=EF=BF=BD
SYMBOL sw 1776 -240 R270
SYMATTR InstName S7
SYMATTR Value SW1
SYMBOL sw 2176 -400 R0
SYMATTR InstName S8
SYMATTR Value SW1
SYMBOL Opamps\\LT1882 2272 -2464 R0
SYMATTR InstName U3
SYMBOL Opamps\\LT1882 2304 -1616 R0
SYMATTR InstName U4
SYMBOL Opamps\\LT1882 2304 -880 R0
SYMATTR InstName U5
SYMBOL Opamps\\LT1882 2336 -32 R0
SYMATTR InstName U6
SYMBOL res 1088 -16 R0
SYMATTR InstName R13
SYMATTR Value 10
SYMBOL Opamps\\LT1037 1184 -160 R0
SYMATTR InstName U2
SYMBOL Digital\\inv 752 -48 R0
SYMATTR InstName A1
SYMBOL sw 3424 -2064 R270
SYMATTR InstName S11
SYMATTR Value SW1
SYMBOL sw 3440 -1184 R270
SYMATTR InstName S12
SYMATTR Value SW1
SYMBOL sw 3424 -1776 R270
SYMATTR InstName S13
SYMATTR Value SW1
SYMBOL sw 3440 -1488 R270
SYMATTR InstName S14
SYMATTR Value SW1
SYMBOL res 3824 -1376 R0
SYMATTR InstName R14
SYMATTR Value 10e9
SYMBOL res 272 96 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R5
SYMATTR Value 220
SYMBOL cap 272 128 R0
SYMATTR InstName C7
SYMATTR Value 2p
SYMBOL res 1184 352 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R8
SYMATTR Value 22
SYMBOL cap 1184 368 R0
SYMATTR InstName C8
SYMATTR Value 1p
SYMBOL res 1184 208 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R10
SYMATTR Value 22
SYMBOL cap 1184 224 R0
SYMATTR InstName C9
SYMATTR Value 1p
SYMBOL res 1168 672 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R11
SYMATTR Value 22
SYMBOL cap 1168 688 R0
SYMATTR InstName C10
SYMATTR Value 1p
SYMBOL res 1168 528 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R12
SYMATTR Value 22
SYMBOL cap 1168 544 R0
SYMATTR InstName C11
SYMATTR Value 1p
SYMBOL Digital\\inv 2992 720 R0
SYMATTR InstName A8
SYMBOL Digital\\and 3440 688 R0
SYMATTR InstName A9
SYMBOL cap 3248 816 R0
SYMATTR InstName C12
SYMATTR Value 4.7n
SYMBOL res 3216 768 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R15
SYMATTR Value 10k
SYMBOL res 3792 640 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R16
SYMATTR Value 1k
SYMBOL npn 3888 608 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL cap 4080 624 R0
SYMATTR InstName C13
SYMATTR Value 0.47=EF=BF=BD
SYMBOL e 3632 704 R0
SYMATTR InstName E1
SYMATTR Value 5
SYMBOL current 4016 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 0.1e-3
SYMBOL res 3824 1040 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R17
SYMATTR Value 1k
SYMBOL voltage 3664 1056 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(5 0 10u 1u)
SYMBOL Opamps\\LT1880 4480 512 R0
SYMATTR InstName U7
SYMBOL res 4368 512 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R18
SYMATTR Value 10k
SYMBOL res 5488 -304 R0
SYMATTR InstName R19
SYMATTR Value 10k
TEXT -248 600 Left 0 !.model sw1 sw(VT=3D0.5)
TEXT -482 620 Left 0 !.tran 0.1
TEXT 5240 -232 Left 0 ;compare
RECTANGLE Normal -640 2752 -800 2640
RECTANGLE Normal 11168 -4048 11008 -4160


> JF =C2=A0

On 2008-12-13, MooseFET <k...@rahul.net> wrote:
> On Dec 9, 2:24 pm, John Fields <jfie...@austininstruments.com> wrote:
>> On Mon, 8 Dec 2008 17:53:44 -0800 (PST), MooseFET <kensm...@rahul.net>
>> wrote:

> Spice biffs every time I put the comparitor in but you'll get the
> idea.

it seems LTs chips like to have the inputs at close volages
(max difference 0.6 or 1.2 v)

> I'm sure it is more complex than needs be

and less complex. using voltage controlled switches is cheating!
real parts only.

I've been playing with (a simulation) of a simpler (and less capable) 
version but had problems with max differential input, bias current, 
and oscillations. (and a glitch on rising zero crossing)

this was my starting point:

          .-------------+---->|--[R]-.
          |             |            |
          |  |\         |    |\      |
	  `--|-\        +----|-\     | |\
	     |  >--->|--+    |  >----+-| >O-- out 
     in---+--|+/        |  .-|+/       |/   
          |  |/        === | |/ -+- 
          |             |  |     |
          |   -+- +5   /// |    [1K]
          |  |\|           +-----'
          `--|-\         |/       
             |  >---[1k]-|        
          .--|+/         |>
          |  |/|           |
          |   -+- -5      /// gnd
	 ///		  

 this circuit has max output duty cycle of 50%
 only measures the amplitide of the positive half-cycle
 and is only approximately linear (but R could be replaced with a
 better current source)
 
 if I can find some ideal op-amps and comparitors 
 and install a flip-flop (or delay line?) to squash the 
 glitch it might even work!
 

On Dec 13, 3:54=A0pm, Jasen Betts <ja...@xnet.co.nz> wrote:
> On 2008-12-13, MooseFET <kensm...@rahul.net> wrote:
>
> > On Dec 9, 2:24=A0pm, John Fields <jfie...@austininstruments.com> wrote:
> >> On Mon, 8 Dec 2008 17:53:44 -0800 (PST), MooseFET <kensm...@rahul.net>
> >> wrote:
> > Spice biffs every time I put the comparitor in but you'll get the
> > idea.
>
> it seems LTs chips like to have the inputs at close volages
> (max difference 0.6 or 1.2 v)

Many of the op-amps have diodes across the inputs.

>
> > I'm sure it is more complex than needs be
>
> and less complex. using voltage controlled switches is cheating!
> real parts only.

The real parts are HC4053s.  I have an only partial model of them.
The supply voltages are +/- 5V so that the switches can be used.


> I've been playing with (a simulation) of a simpler (and less capable)
> version but had problems with max differential input, bias current,
> and oscillations. (and a glitch on rising zero crossing)
>
> this was my starting point:
>
> =A0 =A0 =A0 =A0 =A0 .-------------+---->|--[R]-.
> =A0 =A0 =A0 =A0 =A0 | =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =A0 =A0 =A0 =A0 =A0|
> =A0 =A0 =A0 =A0 =A0 | =A0|\ =A0 =A0 =A0 =A0 | =A0 =A0|\ =A0 =A0 =A0|
> =A0 =A0 =A0 =A0 =A0 `--|-\ =A0 =A0 =A0 =A0+----|-\ =A0 =A0 | |\
> =A0 =A0 =A0 =A0 =A0 =A0 =A0| =A0>--->|--+ =A0 =A0| =A0>----+-| >O-- out
> =A0 =A0 =A0in---+--|+/ =A0 =A0 =A0 =A0| =A0.-|+/ =A0 =A0 =A0 |/ =A0
> =A0 =A0 =A0 =A0 =A0 | =A0|/ =A0 =A0 =A0 =A0=3D=3D=3D | |/ -+-
> =A0 =A0 =A0 =A0 =A0 | =A0 =A0 =A0 =A0 =A0 =A0 | =A0| =A0 =A0 |
> =A0 =A0 =A0 =A0 =A0 | =A0 -+- +5 =A0 /// | =A0 =A0[1K]
> =A0 =A0 =A0 =A0 =A0 | =A0|\| =A0 =A0 =A0 =A0 =A0 +-----'
> =A0 =A0 =A0 =A0 =A0 `--|-\ =A0 =A0 =A0 =A0 |/ =A0 =A0 =A0
> =A0 =A0 =A0 =A0 =A0 =A0 =A0| =A0>---[1k]-| =A0 =A0 =A0 =A0
> =A0 =A0 =A0 =A0 =A0 .--|+/ =A0 =A0 =A0 =A0 |>
> =A0 =A0 =A0 =A0 =A0 | =A0|/| =A0 =A0 =A0 =A0 =A0 |
> =A0 =A0 =A0 =A0 =A0 | =A0 -+- -5 =A0 =A0 =A0/// gnd
> =A0 =A0 =A0 =A0 =A0/// =A0 =A0 =A0 =A0 =A0 =A0 =A0
>
> =A0this circuit has max output duty cycle of 50%
> =A0only measures the amplitide of the positive half-cycle
> =A0and is only approximately linear (but R could be replaced with a
> =A0better current source)
>
> =A0if I can find some ideal op-amps and comparitors
> =A0and install a flip-flop (or delay line?) to squash the
> =A0glitch it might even work!

There is a trick to doing the op-amp and diode rectifiers.  You want
to keep the op-amp from flying to the rails on the other half cycle.
In real life, op-amps tend to take a long time to recover from being
crashed against the rails.